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[178.235.179.36]) by smtp.gmail.com with ESMTPSA id et10-20020a170907294a00b00a2699a54888sm11968835ejc.64.2024.01.02.10.30.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 10:30:10 -0800 (PST) From: Konrad Dybcio Date: Tue, 02 Jan 2024 19:29:49 +0100 Subject: [PATCH 3/4] arm64: dts: qcom: x1e80100: Add missing system-wide PSCI power domain Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240102-topic-x1e_fixes-v1-3-70723e08d5f6@linaro.org> References: <20240102-topic-x1e_fixes-v1-0-70723e08d5f6@linaro.org> In-Reply-To: <20240102-topic-x1e_fixes-v1-0-70723e08d5f6@linaro.org> To: Bjorn Andersson , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Rajendra Nayak , Sibi Sankar , Abel Vesa Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1704220203; l=1514; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=a/TSf4p7qbd3BP7GuDisMtggCpN6jL7pGZHmOCzvoa0=; b=Z2+Ub7tjMe4FVBz3xh+JlHpM49o8IStSPlM4cL67eGCib5gN4+iKoJ3Ia03IysXQCJQdWXlPf sgDTgFj2DWxAiJ6trozz4GiSpm9w396bLUbh9mOjGL4AnQ7XlCYrX3Y X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Previous Qualcomm SoCs over the past couple years have used the Arm DSU architecture, which basically unified the meaning of the "cluster" and "system". This is however clearly not the case on X1E, as can be seen by three separate cluster power domains. Add the lacking system-level power domain. For now it's going to be always-on, as no system-wide idle states are defined at the moment. Signed-off-by: Konrad Dybcio Reviewed-by: Abel Vesa --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/q= com/x1e80100.dtsi index 6f75fc342ceb..fc164b9b3ef1 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -395,16 +395,24 @@ CPU_PD11: power-domain-cpu11 { CLUSTER_PD0: power-domain-cpu-cluster0 { #power-domain-cells =3D <0>; domain-idle-states =3D <&CLUSTER_CL4>, <&CLUSTER_CL5>; + power-domains =3D <&SYSTEM_PD>; }; =20 CLUSTER_PD1: power-domain-cpu-cluster1 { #power-domain-cells =3D <0>; domain-idle-states =3D <&CLUSTER_CL4>, <&CLUSTER_CL5>; + power-domains =3D <&SYSTEM_PD>; }; =20 CLUSTER_PD2: power-domain-cpu-cluster2 { #power-domain-cells =3D <0>; domain-idle-states =3D <&CLUSTER_CL4>, <&CLUSTER_CL5>; + power-domains =3D <&SYSTEM_PD>; + }; + + SYSTEM_PD: power-domain-system { + #power-domain-cells =3D <0>; + /* TODO: system-wide idle states */ }; }; =20 --=20 2.43.0