[PATCH] clk: sprd: Fix thm_parents incorrect configuration

Zhifeng Tang posted 1 patch 2 years, 1 month ago
There is a newer version of this series
drivers/clk/sprd/ums512-clk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
[PATCH] clk: sprd: Fix thm_parents incorrect configuration
Posted by Zhifeng Tang 2 years, 1 month ago
The thm*_clk have two clock sources 32k and 250k,excluding 32m.

Signed-off-by: Zhifeng Tang <zhifeng.tang@unisoc.com>
---
 drivers/clk/sprd/ums512-clk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/sprd/ums512-clk.c b/drivers/clk/sprd/ums512-clk.c
index fc25bdd85e4e..f43bb10bd5ae 100644
--- a/drivers/clk/sprd/ums512-clk.c
+++ b/drivers/clk/sprd/ums512-clk.c
@@ -800,7 +800,7 @@ static SPRD_MUX_CLK_DATA(uart1_clk, "uart1-clk", uart_parents,
 			 0x250, 0, 3, UMS512_MUX_FLAG);
 
 static const struct clk_parent_data thm_parents[] = {
-	{ .fw_name = "ext-32m" },
+	{ .fw_name = "ext-32k" },
 	{ .hw = &clk_250k.hw  },
 };
 static SPRD_MUX_CLK_DATA(thm0_clk, "thm0-clk", thm_parents,
-- 
2.17.1
Re: [PATCH] clk: sprd: Fix thm_parents incorrect configuration
Posted by Baolin Wang 2 years ago

On 8/5/2023 2:48 PM, Zhifeng Tang wrote:
> The thm*_clk have two clock sources 32k and 250k,excluding 32m.
> 
> Signed-off-by: Zhifeng Tang <zhifeng.tang@unisoc.com>

Please add a Fixes tag. With that, you can add:
Reviewed-by: Baolin Wang <baolin.wang@linux.alibaba.com>

> ---
>   drivers/clk/sprd/ums512-clk.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/sprd/ums512-clk.c b/drivers/clk/sprd/ums512-clk.c
> index fc25bdd85e4e..f43bb10bd5ae 100644
> --- a/drivers/clk/sprd/ums512-clk.c
> +++ b/drivers/clk/sprd/ums512-clk.c
> @@ -800,7 +800,7 @@ static SPRD_MUX_CLK_DATA(uart1_clk, "uart1-clk", uart_parents,
>   			 0x250, 0, 3, UMS512_MUX_FLAG);
>   
>   static const struct clk_parent_data thm_parents[] = {
> -	{ .fw_name = "ext-32m" },
> +	{ .fw_name = "ext-32k" },
>   	{ .hw = &clk_250k.hw  },
>   };
>   static SPRD_MUX_CLK_DATA(thm0_clk, "thm0-clk", thm_parents,
Re: [PATCH] clk: sprd: Fix thm_parents incorrect configuration
Posted by Chunyan Zhang 2 years ago
On Sat, 5 Aug 2023 at 14:48, Zhifeng Tang <zhifeng.tang@unisoc.com> wrote:
>
> The thm*_clk have two clock sources 32k and 250k,excluding 32m.
>
> Signed-off-by: Zhifeng Tang <zhifeng.tang@unisoc.com>

Acked-by: Chunyan Zhang <zhang.lyra@gmail.com>

Thanks,
Chunyan

> ---
>  drivers/clk/sprd/ums512-clk.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/sprd/ums512-clk.c b/drivers/clk/sprd/ums512-clk.c
> index fc25bdd85e4e..f43bb10bd5ae 100644
> --- a/drivers/clk/sprd/ums512-clk.c
> +++ b/drivers/clk/sprd/ums512-clk.c
> @@ -800,7 +800,7 @@ static SPRD_MUX_CLK_DATA(uart1_clk, "uart1-clk", uart_parents,
>                          0x250, 0, 3, UMS512_MUX_FLAG);
>
>  static const struct clk_parent_data thm_parents[] = {
> -       { .fw_name = "ext-32m" },
> +       { .fw_name = "ext-32k" },
>         { .hw = &clk_250k.hw  },
>  };
>  static SPRD_MUX_CLK_DATA(thm0_clk, "thm0-clk", thm_parents,
> --
> 2.17.1
>