[PATCH v3 0/4] clk: add BCM63268 timer clock and reset

Álvaro Fernández Rojas posted 4 patches 2 years, 10 months ago
There is a newer version of this series
.../clock/brcm,bcm63268-timer-clocks.yaml     |  40 +++
drivers/clk/bcm/Kconfig                       |   9 +
drivers/clk/bcm/Makefile                      |   1 +
drivers/clk/bcm/clk-bcm63268-timer.c          | 232 ++++++++++++++++++
include/dt-bindings/clock/bcm63268-clock.h    |  13 +
include/dt-bindings/reset/bcm63268-reset.h    |   4 +
6 files changed, 299 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm63268-timer-clocks.yaml
create mode 100644 drivers/clk/bcm/clk-bcm63268-timer.c
[PATCH v3 0/4] clk: add BCM63268 timer clock and reset
Posted by Álvaro Fernández Rojas 2 years, 10 months ago
Broadcom BCM63268 has a timer clock and reset controller which has the
following layout:
  #define POR_RESET_STATUS            (1 << 31)
  #define HW_RESET_STATUS             (1 << 30)
  #define SW_RESET_STATUS             (1 << 29)
  #define USB_REF_CLKEN               (1 << 18)
  #define UTO_EXTIN_CLKEN             (1 << 17)
  #define UTO_CLK50_SEL               (1 << 16)
  #define FAP2_PLL_CLKEN              (1 << 15)
  #define FAP2_PLL_FREQ_SHIFT         12
  #define FAP1_PLL_CLKEN              (1 << 11)
  #define FAP1_PLL_FREQ_SHIFT         8
  #define WAKEON_DSL                  (1 << 7)
  #define WAKEON_EPHY                 (1 << 6)
  #define DSL_ENERGY_DETECT_ENABLE    (1 << 4)
  #define GPHY_1_ENERGY_DETECT_ENABLE (1 << 3)
  #define EPHY_3_ENERGY_DETECT_ENABLE (1 << 2)
  #define EPHY_2_ENERGY_DETECT_ENABLE (1 << 1)
  #define EPHY_1_ENERGY_DETECT_ENABLE (1 << 0)

Also excuse me for the delay in the v3, but I totally forgot about this...

v3: add missing <linux/io.h> include to fix build warning
v2: add changes suggested by Stephen Boyd.

Álvaro Fernández Rojas (4):
  dt-bindings: clk: add BCM63268 timer clock definitions
  dt-bindings: reset: add BCM63268 timer reset definitions
  dt-bindings: clock: Add BCM63268 timer binding
  clk: bcm: Add BCM63268 timer clock and reset driver

 .../clock/brcm,bcm63268-timer-clocks.yaml     |  40 +++
 drivers/clk/bcm/Kconfig                       |   9 +
 drivers/clk/bcm/Makefile                      |   1 +
 drivers/clk/bcm/clk-bcm63268-timer.c          | 232 ++++++++++++++++++
 include/dt-bindings/clock/bcm63268-clock.h    |  13 +
 include/dt-bindings/reset/bcm63268-reset.h    |   4 +
 6 files changed, 299 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm63268-timer-clocks.yaml
 create mode 100644 drivers/clk/bcm/clk-bcm63268-timer.c

-- 
2.30.2

Re: [PATCH v3 0/4] clk: add BCM63268 timer clock and reset
Posted by Stephen Boyd 2 years, 10 months ago
Quoting Álvaro Fernández Rojas (2023-03-21 13:10:18)
> Broadcom BCM63268 has a timer clock and reset controller which has the
> following layout:
>   #define POR_RESET_STATUS            (1 << 31)
>   #define HW_RESET_STATUS             (1 << 30)
>   #define SW_RESET_STATUS             (1 << 29)
>   #define USB_REF_CLKEN               (1 << 18)
>   #define UTO_EXTIN_CLKEN             (1 << 17)
>   #define UTO_CLK50_SEL               (1 << 16)
>   #define FAP2_PLL_CLKEN              (1 << 15)
>   #define FAP2_PLL_FREQ_SHIFT         12
>   #define FAP1_PLL_CLKEN              (1 << 11)
>   #define FAP1_PLL_FREQ_SHIFT         8
>   #define WAKEON_DSL                  (1 << 7)
>   #define WAKEON_EPHY                 (1 << 6)
>   #define DSL_ENERGY_DETECT_ENABLE    (1 << 4)
>   #define GPHY_1_ENERGY_DETECT_ENABLE (1 << 3)
>   #define EPHY_3_ENERGY_DETECT_ENABLE (1 << 2)
>   #define EPHY_2_ENERGY_DETECT_ENABLE (1 << 1)
>   #define EPHY_1_ENERGY_DETECT_ENABLE (1 << 0)
> 
> Also excuse me for the delay in the v3, but I totally forgot about this...

Please don't send as a reply to a previous round. It makes applying the
patch series more difficult and buries the new series deep down in the
mail thread.
Re: [PATCH v3 0/4] clk: add BCM63268 timer clock and reset
Posted by Álvaro Fernández Rojas 2 years, 10 months ago
El mar, 21 mar 2023 a las 23:54, Stephen Boyd (<sboyd@kernel.org>) escribió:
>
> Quoting Álvaro Fernández Rojas (2023-03-21 13:10:18)
> > Broadcom BCM63268 has a timer clock and reset controller which has the
> > following layout:
> >   #define POR_RESET_STATUS            (1 << 31)
> >   #define HW_RESET_STATUS             (1 << 30)
> >   #define SW_RESET_STATUS             (1 << 29)
> >   #define USB_REF_CLKEN               (1 << 18)
> >   #define UTO_EXTIN_CLKEN             (1 << 17)
> >   #define UTO_CLK50_SEL               (1 << 16)
> >   #define FAP2_PLL_CLKEN              (1 << 15)
> >   #define FAP2_PLL_FREQ_SHIFT         12
> >   #define FAP1_PLL_CLKEN              (1 << 11)
> >   #define FAP1_PLL_FREQ_SHIFT         8
> >   #define WAKEON_DSL                  (1 << 7)
> >   #define WAKEON_EPHY                 (1 << 6)
> >   #define DSL_ENERGY_DETECT_ENABLE    (1 << 4)
> >   #define GPHY_1_ENERGY_DETECT_ENABLE (1 << 3)
> >   #define EPHY_3_ENERGY_DETECT_ENABLE (1 << 2)
> >   #define EPHY_2_ENERGY_DETECT_ENABLE (1 << 1)
> >   #define EPHY_1_ENERGY_DETECT_ENABLE (1 << 0)
> >
> > Also excuse me for the delay in the v3, but I totally forgot about this...
>
> Please don't send as a reply to a previous round. It makes applying the
> patch series more difficult and buries the new series deep down in the
> mail thread.

Excuse me for that, but other kernel maintainers prefer it this way.

--
Álvaro