[PATCH] arm64: dts: qcom: sm8150: Fix the iommu mask used for PCIe controllers

Manivannan Sadhasivam posted 1 patch 2 years, 6 months ago
arch/arm64/boot/dts/qcom/sm8150.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
[PATCH] arm64: dts: qcom: sm8150: Fix the iommu mask used for PCIe controllers
Posted by Manivannan Sadhasivam 2 years, 6 months ago
The iommu mask should be 0x3f as per Qualcomm internal documentation.
Without the correct mask, the PCIe transactions from the endpoint will
result in SMMU faults. Hence, fix it!

Cc: stable@vger.kernel.org # 5.19
Fixes: a1c86c680533 ("arm64: dts: qcom: sm8150: Add PCIe nodes")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index fd20096cfc6e..13e0ce828606 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -1826,7 +1826,7 @@ pcie0: pci@1c00000 {
 				      "slave_q2a",
 				      "tbu";
 
-			iommus = <&apps_smmu 0x1d80 0x7f>;
+			iommus = <&apps_smmu 0x1d80 0x3f>;
 			iommu-map = <0x0   &apps_smmu 0x1d80 0x1>,
 				    <0x100 &apps_smmu 0x1d81 0x1>;
 
@@ -1925,7 +1925,7 @@ pcie1: pci@1c08000 {
 			assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
 			assigned-clock-rates = <19200000>;
 
-			iommus = <&apps_smmu 0x1e00 0x7f>;
+			iommus = <&apps_smmu 0x1e00 0x3f>;
 			iommu-map = <0x0   &apps_smmu 0x1e00 0x1>,
 				    <0x100 &apps_smmu 0x1e01 0x1>;
 
-- 
2.25.1
Re: [PATCH] arm64: dts: qcom: sm8150: Fix the iommu mask used for PCIe controllers
Posted by Bjorn Andersson 2 years, 6 months ago
On Fri, 24 Feb 2023 13:30:45 +0530, Manivannan Sadhasivam wrote:
> The iommu mask should be 0x3f as per Qualcomm internal documentation.
> Without the correct mask, the PCIe transactions from the endpoint will
> result in SMMU faults. Hence, fix it!
> 
> 

Applied, thanks!

[1/1] arm64: dts: qcom: sm8150: Fix the iommu mask used for PCIe controllers
      commit: 672a58fc7c477e59981653a11241566870fff852

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>
Re: [PATCH] arm64: dts: qcom: sm8150: Fix the iommu mask used for PCIe controllers
Posted by Konrad Dybcio 2 years, 6 months ago

On 24.02.2023 09:00, Manivannan Sadhasivam wrote:
> The iommu mask should be 0x3f as per Qualcomm internal documentation.
> Without the correct mask, the PCIe transactions from the endpoint will
> result in SMMU faults. Hence, fix it!
> 
> Cc: stable@vger.kernel.org # 5.19
> Fixes: a1c86c680533 ("arm64: dts: qcom: sm8150: Add PCIe nodes")
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index fd20096cfc6e..13e0ce828606 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -1826,7 +1826,7 @@ pcie0: pci@1c00000 {
>  				      "slave_q2a",
>  				      "tbu";
>  
> -			iommus = <&apps_smmu 0x1d80 0x7f>;
> +			iommus = <&apps_smmu 0x1d80 0x3f>;
>  			iommu-map = <0x0   &apps_smmu 0x1d80 0x1>,
>  				    <0x100 &apps_smmu 0x1d81 0x1>;
>  
> @@ -1925,7 +1925,7 @@ pcie1: pci@1c08000 {
>  			assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
>  			assigned-clock-rates = <19200000>;
>  
> -			iommus = <&apps_smmu 0x1e00 0x7f>;
> +			iommus = <&apps_smmu 0x1e00 0x3f>;
>  			iommu-map = <0x0   &apps_smmu 0x1e00 0x1>,
>  				    <0x100 &apps_smmu 0x1e01 0x1>;
>
Re: [PATCH] arm64: dts: qcom: sm8150: Fix the iommu mask used for PCIe controllers
Posted by Bhupesh Sharma 2 years, 6 months ago
On Fri, 24 Feb 2023 at 13:30, Manivannan Sadhasivam
<manivannan.sadhasivam@linaro.org> wrote:
>
> The iommu mask should be 0x3f as per Qualcomm internal documentation.
> Without the correct mask, the PCIe transactions from the endpoint will
> result in SMMU faults. Hence, fix it!
>
> Cc: stable@vger.kernel.org # 5.19
> Fixes: a1c86c680533 ("arm64: dts: qcom: sm8150: Add PCIe nodes")
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index fd20096cfc6e..13e0ce828606 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -1826,7 +1826,7 @@ pcie0: pci@1c00000 {
>                                       "slave_q2a",
>                                       "tbu";
>
> -                       iommus = <&apps_smmu 0x1d80 0x7f>;
> +                       iommus = <&apps_smmu 0x1d80 0x3f>;
>                         iommu-map = <0x0   &apps_smmu 0x1d80 0x1>,
>                                     <0x100 &apps_smmu 0x1d81 0x1>;
>
> @@ -1925,7 +1925,7 @@ pcie1: pci@1c08000 {
>                         assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
>                         assigned-clock-rates = <19200000>;
>
> -                       iommus = <&apps_smmu 0x1e00 0x7f>;
> +                       iommus = <&apps_smmu 0x1e00 0x3f>;
>                         iommu-map = <0x0   &apps_smmu 0x1e00 0x1>,
>                                     <0x100 &apps_smmu 0x1e01 0x1>;
>

Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>

Thanks.