From: Balsam CHIHI <bchihi@baylibre.com>
Add thermal zones and thermal nodes for the mt8195.
Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 129 +++++++++++++++++++++++
1 file changed, 129 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 09df105f4606..636676f4ba25 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -14,6 +14,7 @@
#include <dt-bindings/pinctrl/mt8195-pinfunc.h>
#include <dt-bindings/power/mt8195-power.h>
#include <dt-bindings/reset/mt8195-resets.h>
+#include <dt-bindings/thermal/mediatek-lvts.h>
/ {
compatible = "mediatek,mt8195";
@@ -954,6 +955,17 @@ spi0: spi@1100a000 {
status = "disabled";
};
+ lvts_ap: thermal-sensor@1100b000 {
+ compatible = "mediatek,mt8195-lvts-ap";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
+ resets = <&infracfg_ao MT8195_INFRA_RST0_THERM_CTRL_SWRST>;
+ nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>;
+ nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2";
+ #thermal-sensor-cells = <1>;
+ };
+
spi1: spi@11010000 {
compatible = "mediatek,mt8195-spi",
"mediatek,mt6765-spi";
@@ -1114,6 +1126,17 @@ mmc2: mmc@11250000 {
status = "disabled";
};
+ lvts_mcu: thermal-sensor@11278000 {
+ compatible = "mediatek,mt8195-lvts-mcu";
+ reg = <0 0x11278000 0 0x1000>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
+ resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>;
+ nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>;
+ nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2";
+ #thermal-sensor-cells = <1>;
+ };
+
xhci1: usb@11290000 {
compatible = "mediatek,mt8195-xhci",
"mediatek,mtk-xhci";
@@ -2387,4 +2410,110 @@ dp_tx: dp-tx@1c600000 {
status = "disabled";
};
};
+
+ thermal_zones: thermal-zones {
+ cpu0-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>;
+ trips {
+ cpu0_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu1-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU1>;
+ trips {
+ cpu1_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu2-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU2>;
+ trips {
+ cpu2_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu3-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU3>;
+ trips {
+ cpu3_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu4-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU0>;
+ trips {
+ cpu4_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu5-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU1>;
+ trips {
+ cpu5_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu6-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU2>;
+ trips {
+ cpu6_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu7-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU3>;
+ trips {
+ cpu7_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+ };
};
--
2.34.1Il 24/01/23 14:17, bchihi@baylibre.com ha scritto: > From: Balsam CHIHI <bchihi@baylibre.com> > > Add thermal zones and thermal nodes for the mt8195. > > Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> You should change the commit title to reflect the same syntax that you can find in a `git log --oneline arch/arm64/boot/dts/mediatek/`. arm64: dts: mediatek: mt8195: Add thermal zones and thermal nodes or arm64: dts: mt8195: Add thermal zones and thermal nodes ...otherwise: Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
On Tue, Jan 24, 2023 at 4:37 PM AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> wrote: > > Il 24/01/23 14:17, bchihi@baylibre.com ha scritto: > > From: Balsam CHIHI <bchihi@baylibre.com> > > > > Add thermal zones and thermal nodes for the mt8195. > > > > Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> > > You should change the commit title to reflect the same syntax that you can find > in a `git log --oneline arch/arm64/boot/dts/mediatek/`. > > arm64: dts: mediatek: mt8195: Add thermal zones and thermal nodes > > or > > arm64: dts: mt8195: Add thermal zones and thermal nodes > Hi Angelo, Thank you for the review. Should I resend with the fix? Or you would fix it when applying it like Matthias did for "[PATCH v11 3/6] arm64/dts/mt8195: Add efuse node to mt8195"? Best regards, Balsam > > ...otherwise: > > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> >
On 25/01/2023 16:10, Balsam CHIHI wrote: > On Tue, Jan 24, 2023 at 4:37 PM AngeloGioacchino Del Regno > <angelogioacchino.delregno@collabora.com> wrote: >> >> Il 24/01/23 14:17, bchihi@baylibre.com ha scritto: >>> From: Balsam CHIHI <bchihi@baylibre.com> >>> >>> Add thermal zones and thermal nodes for the mt8195. >>> >>> Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> >> >> You should change the commit title to reflect the same syntax that you can find >> in a `git log --oneline arch/arm64/boot/dts/mediatek/`. >> >> arm64: dts: mediatek: mt8195: Add thermal zones and thermal nodes >> >> or >> >> arm64: dts: mt8195: Add thermal zones and thermal nodes >> > > Hi Angelo, > > Thank you for the review. > Should I resend with the fix? > Or you would fix it when applying it like Matthias did for "[PATCH v11 > 3/6] arm64/dts/mt8195: Add efuse node to mt8195"? > If you need to send a new version for any reason, then please update. Otherwise I'll fix it once I can take it. Regards, Matthias
On Wed, Jan 25, 2023 at 8:09 PM Matthias Brugger <matthias.bgg@gmail.com> wrote: > > > > On 25/01/2023 16:10, Balsam CHIHI wrote: > > On Tue, Jan 24, 2023 at 4:37 PM AngeloGioacchino Del Regno > > <angelogioacchino.delregno@collabora.com> wrote: > >> > >> Il 24/01/23 14:17, bchihi@baylibre.com ha scritto: > >>> From: Balsam CHIHI <bchihi@baylibre.com> > >>> > >>> Add thermal zones and thermal nodes for the mt8195. > >>> > >>> Signed-off-by: Balsam CHIHI <bchihi@baylibre.com> > >> > >> You should change the commit title to reflect the same syntax that you can find > >> in a `git log --oneline arch/arm64/boot/dts/mediatek/`. > >> > >> arm64: dts: mediatek: mt8195: Add thermal zones and thermal nodes > >> > >> or > >> > >> arm64: dts: mt8195: Add thermal zones and thermal nodes > >> > > > > Hi Angelo, > > > > Thank you for the review. > > Should I resend with the fix? > > Or you would fix it when applying it like Matthias did for "[PATCH v11 > > 3/6] arm64/dts/mt8195: Add efuse node to mt8195"? > > > > If you need to send a new version for any reason, then please update. Otherwise > I'll fix it once I can take it. Hi Matthias, OK. I appreciate it, thank you. Best regards, Balsam > > Regards, > Matthias
From: Balsam CHIHI <bchihi@baylibre.com>
Add thermal zones and thermal nodes for the mt8195.
Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
Changelog:
v12:
- Fixed subject prefix
- Rename "include/dt-bindings/thermal/mediatek-lvts.h"
to "include/dt-bindings/thermal/mediatek,lvts-thermal.h"
due to this patch
https://lore.kernel.org/all/20230131140439.600164-1-bchihi@baylibre.com/
---
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 129 +++++++++++++++++++++++
1 file changed, 129 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 09df105f4606..c7e958f8f1b5 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -14,6 +14,7 @@
#include <dt-bindings/pinctrl/mt8195-pinfunc.h>
#include <dt-bindings/power/mt8195-power.h>
#include <dt-bindings/reset/mt8195-resets.h>
+#include <dt-bindings/thermal/mediatek,lvts-thermal.h>
/ {
compatible = "mediatek,mt8195";
@@ -954,6 +955,17 @@ spi0: spi@1100a000 {
status = "disabled";
};
+ lvts_ap: thermal-sensor@1100b000 {
+ compatible = "mediatek,mt8195-lvts-ap";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
+ resets = <&infracfg_ao MT8195_INFRA_RST0_THERM_CTRL_SWRST>;
+ nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>;
+ nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2";
+ #thermal-sensor-cells = <1>;
+ };
+
spi1: spi@11010000 {
compatible = "mediatek,mt8195-spi",
"mediatek,mt6765-spi";
@@ -1114,6 +1126,17 @@ mmc2: mmc@11250000 {
status = "disabled";
};
+ lvts_mcu: thermal-sensor@11278000 {
+ compatible = "mediatek,mt8195-lvts-mcu";
+ reg = <0 0x11278000 0 0x1000>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
+ resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>;
+ nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>;
+ nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2";
+ #thermal-sensor-cells = <1>;
+ };
+
xhci1: usb@11290000 {
compatible = "mediatek,mt8195-xhci",
"mediatek,mtk-xhci";
@@ -2387,4 +2410,110 @@ dp_tx: dp-tx@1c600000 {
status = "disabled";
};
};
+
+ thermal_zones: thermal-zones {
+ cpu0-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>;
+ trips {
+ cpu0_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu1-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU1>;
+ trips {
+ cpu1_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu2-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU2>;
+ trips {
+ cpu2_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu3-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU3>;
+ trips {
+ cpu3_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu4-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU0>;
+ trips {
+ cpu4_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu5-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU1>;
+ trips {
+ cpu5_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu6-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU2>;
+ trips {
+ cpu6_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu7-thermal {
+ polling-delay = <0>;
+ polling-delay-passive = <0>;
+ thermal-sensors = <&lvts_mcu MT8195_MCU_BIG_CPU3>;
+ trips {
+ cpu7_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+ };
};
--
2.34.1© 2016 - 2024 Red Hat, Inc.