Changes in v2:
 - Moved dt-bindings CLK_DUMMY to clk-mtk.h instead


This series performs cleanups and improvements on MediaTek clock
drivers, greatly reducing code duplication (hence also reducing
kernel size).

There would be a lot to say about it, but summarizing:

* Propagates struct device where possible in order to introduce the
  possibility of using Runtime PM on clock drivers as needed,
  possibly enhancing reliability of some platforms (obviously, this
  will do nothing unless power-domains are added to devicetree);

* Cleans up some duplicated clock(s) registration attempt(s): on
  some platforms the 26M fixed factor clock is registered early,
  but then upon platform_driver probe, an attempt to re-register
  that clock was performed;

* Removes some early clock registration where possible, moving
  everything to platform_driver clock probe;

* Breaks down the big MT8173 clock driver in multiple ones, as it's
  already done with the others, cleans it up and adds possibility
  possibility to compile non-boot-critical clock drivers (for 8173)
  as modules;

* Extends the common mtk_clk_simple_probe() function to be able to
  register multiple MediaTek clock types;

* Removes duplicated [...]_probe functions from multiple MediaTek SoC
  clock drivers, migrating almost everything to the common functions
  mtk_clk_simple_probe();

* Adds a .remove() callback, pointing to the common mtk_clk_simple_remove()
  function to all clock drivers that were migrated to the common probe;

* Some more spare cleanups here and there.

All of this was manually tested on various Chromebooks (with different MTK
SoCs) and no regression was detected.

Cheers!

AngeloGioacchino Del Regno (23):
  clk: mediatek: mt8192: Correctly unregister and free clocks on failure
  clk: mediatek: mt8192: Propagate struct device for gate clocks
  clk: mediatek: clk-gate: Propagate struct device with
    mtk_clk_register_gates()
  clk: mediatek: cpumux: Propagate struct device where possible
  clk: mediatek: clk-mtk: Propagate struct device for composites
  clk: mediatek: clk-mux: Propagate struct device for mtk-mux
  clk: mediatek: clk-mtk: Add dummy clock ops
  clk: mediatek: mt8173: Migrate to platform driver and common probe
  clk: mediatek: mt8173: Remove mtk_clk_enable_critical()
  clk: mediatek: mt8173: Break down clock drivers and allow module build
  clk: mediatek: Switch to mtk_clk_simple_probe() where possible
  clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe()
  clk: mediatek: mt8173: Migrate pericfg/topckgen to
    mtk_clk_simple_probe()
  clk: mediatek: clk-mt8192: Move CLK_TOP_CSW_F26M_D2 in top_divs
  clk: mediatek: mt8192: Join top_adj_divs and top_muxes
  clk: mediatek: mt8186: Join top_adj_div and top_muxes
  clk: mediatek: clk-mt8183: Join top_aud_muxes and top_aud_divs
  clk: mediatek: clk-mtk: Register MFG notifier in
    mtk_clk_simple_probe()
  clk: mediatek: clk-mt8192: Migrate topckgen to mtk_clk_simple_probe()
  clk: mediatek: clk-mt8186-topckgen: Migrate to mtk_clk_simple_probe()
  clk: mediatek: clk-mt6795-topckgen: Migrate to mtk_clk_simple_probe()
  clk: mediatek: clk-mt7986-topckgen: Properly keep some clocks enabled
  clk: mediatek: clk-mt7986-topckgen: Migrate to mtk_clk_simple_probe()

 drivers/clk/mediatek/Kconfig                 |   30 +-
 drivers/clk/mediatek/Makefile                |    6 +-
 drivers/clk/mediatek/clk-cpumux.c            |    9 +-
 drivers/clk/mediatek/clk-cpumux.h            |    3 +-
 drivers/clk/mediatek/clk-gate.c              |   16 +-
 drivers/clk/mediatek/clk-gate.h              |    8 +-
 drivers/clk/mediatek/clk-mt2701-aud.c        |   26 +-
 drivers/clk/mediatek/clk-mt2701-eth.c        |   34 +-
 drivers/clk/mediatek/clk-mt2701-g3d.c        |   56 +-
 drivers/clk/mediatek/clk-mt2701-hif.c        |   36 +-
 drivers/clk/mediatek/clk-mt2701-mm.c         |    2 +-
 drivers/clk/mediatek/clk-mt2701.c            |   12 +-
 drivers/clk/mediatek/clk-mt2712-mm.c         |    2 +-
 drivers/clk/mediatek/clk-mt2712.c            |   89 +-
 drivers/clk/mediatek/clk-mt6765.c            |    8 +-
 drivers/clk/mediatek/clk-mt6779-mm.c         |    2 +-
 drivers/clk/mediatek/clk-mt6779.c            |   50 +-
 drivers/clk/mediatek/clk-mt6795-infracfg.c   |    6 +-
 drivers/clk/mediatek/clk-mt6795-mm.c         |    3 +-
 drivers/clk/mediatek/clk-mt6795-pericfg.c    |    5 +-
 drivers/clk/mediatek/clk-mt6795-topckgen.c   |   84 +-
 drivers/clk/mediatek/clk-mt6797-mm.c         |    2 +-
 drivers/clk/mediatek/clk-mt6797.c            |    4 +-
 drivers/clk/mediatek/clk-mt7622-aud.c        |   49 +-
 drivers/clk/mediatek/clk-mt7622-eth.c        |   82 +-
 drivers/clk/mediatek/clk-mt7622-hif.c        |   85 +-
 drivers/clk/mediatek/clk-mt7622.c            |   16 +-
 drivers/clk/mediatek/clk-mt7629-eth.c        |    5 +-
 drivers/clk/mediatek/clk-mt7629-hif.c        |   85 +-
 drivers/clk/mediatek/clk-mt7629.c            |   12 +-
 drivers/clk/mediatek/clk-mt7986-eth.c        |    6 +-
 drivers/clk/mediatek/clk-mt7986-infracfg.c   |    4 +-
 drivers/clk/mediatek/clk-mt7986-topckgen.c   |   98 +-
 drivers/clk/mediatek/clk-mt8135.c            |    8 +-
 drivers/clk/mediatek/clk-mt8167-aud.c        |    2 +-
 drivers/clk/mediatek/clk-mt8167-img.c        |    2 +-
 drivers/clk/mediatek/clk-mt8167-mfgcfg.c     |    2 +-
 drivers/clk/mediatek/clk-mt8167-mm.c         |    2 +-
 drivers/clk/mediatek/clk-mt8167-vdec.c       |    3 +-
 drivers/clk/mediatek/clk-mt8167.c            |    6 +-
 drivers/clk/mediatek/clk-mt8173-apmixedsys.c |  157 +++
 drivers/clk/mediatek/clk-mt8173-img.c        |   55 +
 drivers/clk/mediatek/clk-mt8173-infracfg.c   |  154 +++
 drivers/clk/mediatek/clk-mt8173-mm.c         |    2 +-
 drivers/clk/mediatek/clk-mt8173-pericfg.c    |  122 ++
 drivers/clk/mediatek/clk-mt8173-topckgen.c   |  653 ++++++++++
 drivers/clk/mediatek/clk-mt8173-vdecsys.c    |   57 +
 drivers/clk/mediatek/clk-mt8173-vencsys.c    |   64 +
 drivers/clk/mediatek/clk-mt8173.c            | 1125 ------------------
 drivers/clk/mediatek/clk-mt8183-audio.c      |   19 +-
 drivers/clk/mediatek/clk-mt8183-mm.c         |    2 +-
 drivers/clk/mediatek/clk-mt8183.c            |  119 +-
 drivers/clk/mediatek/clk-mt8186-mcu.c        |    2 +-
 drivers/clk/mediatek/clk-mt8186-mm.c         |    3 +-
 drivers/clk/mediatek/clk-mt8186-topckgen.c   |  112 +-
 drivers/clk/mediatek/clk-mt8192-aud.c        |   24 +-
 drivers/clk/mediatek/clk-mt8192-mm.c         |    3 +-
 drivers/clk/mediatek/clk-mt8192.c            |  183 +--
 drivers/clk/mediatek/clk-mt8195-apmixedsys.c |    3 +-
 drivers/clk/mediatek/clk-mt8195-topckgen.c   |    7 +-
 drivers/clk/mediatek/clk-mt8195-vdo0.c       |    3 +-
 drivers/clk/mediatek/clk-mt8195-vdo1.c       |    3 +-
 drivers/clk/mediatek/clk-mt8365-mm.c         |    5 +-
 drivers/clk/mediatek/clk-mt8365.c            |    9 +-
 drivers/clk/mediatek/clk-mt8516-aud.c        |    2 +-
 drivers/clk/mediatek/clk-mt8516.c            |    6 +-
 drivers/clk/mediatek/clk-mtk.c               |  133 ++-
 drivers/clk/mediatek/clk-mtk.h               |   35 +-
 drivers/clk/mediatek/clk-mux.c               |    9 +-
 drivers/clk/mediatek/clk-mux.h               |    3 +-
 70 files changed, 1913 insertions(+), 2121 deletions(-)
 create mode 100644 drivers/clk/mediatek/clk-mt8173-apmixedsys.c
 create mode 100644 drivers/clk/mediatek/clk-mt8173-img.c
 create mode 100644 drivers/clk/mediatek/clk-mt8173-infracfg.c
 create mode 100644 drivers/clk/mediatek/clk-mt8173-pericfg.c
 create mode 100644 drivers/clk/mediatek/clk-mt8173-topckgen.c
 create mode 100644 drivers/clk/mediatek/clk-mt8173-vdecsys.c
 create mode 100644 drivers/clk/mediatek/clk-mt8173-vencsys.c
 delete mode 100644 drivers/clk/mediatek/clk-mt8173.c

-- 
2.39.0

> Changes in v2:
>  - Moved dt-bindings CLK_DUMMY to clk-mtk.h instead
> 
> 
> This series performs cleanups and improvements on MediaTek clock
> drivers, greatly reducing code duplication (hence also reducing
> kernel size).
> 
> There would be a lot to say about it, but summarizing:
> 
> * Propagates struct device where possible in order to introduce the
>   possibility of using Runtime PM on clock drivers as needed,
>   possibly enhancing reliability of some platforms (obviously, this
>   will do nothing unless power-domains are added to devicetree);
> 
> * Cleans up some duplicated clock(s) registration attempt(s): on
>   some platforms the 26M fixed factor clock is registered early,
>   but then upon platform_driver probe, an attempt to re-register
>   that clock was performed;
> 
> * Removes some early clock registration where possible, moving
>   everything to platform_driver clock probe;
> 
> * Breaks down the big MT8173 clock driver in multiple ones, as it's
>   already done with the others, cleans it up and adds possibility
>   possibility to compile non-boot-critical clock drivers (for 8173)
>   as modules;
> 
> * Extends the common mtk_clk_simple_probe() function to be able to
>   register multiple MediaTek clock types;
> 
> * Removes duplicated [...]_probe functions from multiple MediaTek SoC
>   clock drivers, migrating almost everything to the common functions
>   mtk_clk_simple_probe();
> 
> * Adds a .remove() callback, pointing to the common mtk_clk_simple_remove()
>   function to all clock drivers that were migrated to the common probe;
> 
> * Some more spare cleanups here and there.
> 
> All of this was manually tested on various Chromebooks (with different MTK
> SoCs) and no regression was detected.
> 
> Cheers!

I tested this v2 series on mt6779 and mt8192 without any problem.

thanks,
Miles

On Fri, Dec 30, 2022 at 2:13 PM Miles Chen <miles.chen@mediatek.com> wrote:
> > Changes in v2:
> >  - Moved dt-bindings CLK_DUMMY to clk-mtk.h instead
> >
> >
> > This series performs cleanups and improvements on MediaTek clock
> > drivers, greatly reducing code duplication (hence also reducing
> > kernel size).
> >
> > There would be a lot to say about it, but summarizing:
> >
> > * Propagates struct device where possible in order to introduce the
> >   possibility of using Runtime PM on clock drivers as needed,
> >   possibly enhancing reliability of some platforms (obviously, this
> >   will do nothing unless power-domains are added to devicetree);
> >
> > * Cleans up some duplicated clock(s) registration attempt(s): on
> >   some platforms the 26M fixed factor clock is registered early,
> >   but then upon platform_driver probe, an attempt to re-register
> >   that clock was performed;
> >
> > * Removes some early clock registration where possible, moving
> >   everything to platform_driver clock probe;
> >
> > * Breaks down the big MT8173 clock driver in multiple ones, as it's
> >   already done with the others, cleans it up and adds possibility
> >   possibility to compile non-boot-critical clock drivers (for 8173)
> >   as modules;
> >
> > * Extends the common mtk_clk_simple_probe() function to be able to
> >   register multiple MediaTek clock types;
> >
> > * Removes duplicated [...]_probe functions from multiple MediaTek SoC
> >   clock drivers, migrating almost everything to the common functions
> >   mtk_clk_simple_probe();
> >
> > * Adds a .remove() callback, pointing to the common mtk_clk_simple_remove()
> >   function to all clock drivers that were migrated to the common probe;
> >
> > * Some more spare cleanups here and there.
> >
> > All of this was manually tested on various Chromebooks (with different MTK
> > SoCs) and no regression was detected.
> >
> > Cheers!
>
> I tested this v2 series on mt6779 and mt8192 without any problem.

Please give Tested-by. :)

>> >
>> > All of this was manually tested on various Chromebooks (with different MTK
>> > SoCs) and no regression was detected.
>> >
>> > Cheers!
>>
>> I tested this v2 series on mt6779 and mt8192 without any problem.
>
>Please give Tested-by. :)

Sure for v2 and I expect a v3 series (I will newer series)

Tested-by: Miles Chen <miles.chen@mediatek.com>

On Fri, Dec 23, 2022 at 5:43 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com> wrote:
>
>
> Changes in v2:
>  - Moved dt-bindings CLK_DUMMY to clk-mtk.h instead
>
>
> This series performs cleanups and improvements on MediaTek clock
> drivers, greatly reducing code duplication (hence also reducing
> kernel size).
>
> There would be a lot to say about it, but summarizing:
>
> * Propagates struct device where possible in order to introduce the
>   possibility of using Runtime PM on clock drivers as needed,
>   possibly enhancing reliability of some platforms (obviously, this
>   will do nothing unless power-domains are added to devicetree);
>
> * Cleans up some duplicated clock(s) registration attempt(s): on
>   some platforms the 26M fixed factor clock is registered early,
>   but then upon platform_driver probe, an attempt to re-register
>   that clock was performed;
>
> * Removes some early clock registration where possible, moving
>   everything to platform_driver clock probe;
>
> * Breaks down the big MT8173 clock driver in multiple ones, as it's
>   already done with the others, cleans it up and adds possibility
>   possibility to compile non-boot-critical clock drivers (for 8173)
>   as modules;
>
> * Extends the common mtk_clk_simple_probe() function to be able to
>   register multiple MediaTek clock types;
>
> * Removes duplicated [...]_probe functions from multiple MediaTek SoC
>   clock drivers, migrating almost everything to the common functions
>   mtk_clk_simple_probe();
>
> * Adds a .remove() callback, pointing to the common mtk_clk_simple_remove()
>   function to all clock drivers that were migrated to the common probe;
>
> * Some more spare cleanups here and there.
>
> All of this was manually tested on various Chromebooks (with different MTK
> SoCs) and no regression was detected.
>
> Cheers!
>
> AngeloGioacchino Del Regno (23):
>   clk: mediatek: mt8192: Correctly unregister and free clocks on failure
>   clk: mediatek: mt8192: Propagate struct device for gate clocks
>   clk: mediatek: clk-gate: Propagate struct device with
>     mtk_clk_register_gates()
>   clk: mediatek: cpumux: Propagate struct device where possible
>   clk: mediatek: clk-mtk: Propagate struct device for composites
>   clk: mediatek: clk-mux: Propagate struct device for mtk-mux
>   clk: mediatek: clk-mtk: Add dummy clock ops
>   clk: mediatek: mt8173: Migrate to platform driver and common probe
>   clk: mediatek: mt8173: Remove mtk_clk_enable_critical()
>   clk: mediatek: mt8173: Break down clock drivers and allow module build
>   clk: mediatek: Switch to mtk_clk_simple_probe() where possible
>   clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe()
>   clk: mediatek: mt8173: Migrate pericfg/topckgen to
>     mtk_clk_simple_probe()
>   clk: mediatek: clk-mt8192: Move CLK_TOP_CSW_F26M_D2 in top_divs
>   clk: mediatek: mt8192: Join top_adj_divs and top_muxes
>   clk: mediatek: mt8186: Join top_adj_div and top_muxes
>   clk: mediatek: clk-mt8183: Join top_aud_muxes and top_aud_divs
>   clk: mediatek: clk-mtk: Register MFG notifier in
>     mtk_clk_simple_probe()
>   clk: mediatek: clk-mt8192: Migrate topckgen to mtk_clk_simple_probe()
>   clk: mediatek: clk-mt8186-topckgen: Migrate to mtk_clk_simple_probe()
>   clk: mediatek: clk-mt6795-topckgen: Migrate to mtk_clk_simple_probe()
>   clk: mediatek: clk-mt7986-topckgen: Properly keep some clocks enabled
>   clk: mediatek: clk-mt7986-topckgen: Migrate to mtk_clk_simple_probe()

Boot tested on MT8183 and MT8192 (which needs CLK_OPS_PARENT_ENABLE fix
I just sent), so for the whole series:

Tested-by: Chen-Yu Tsai <wenst@chromium.org>