Add bindings documentation for clock TCSR driver on SM8550.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../bindings/clock/qcom,sm8550-tcsrcc.yaml | 45 +++++++++++++++++++
.../dt-bindings/clock/qcom,sm8550-tcsrcc.h | 18 ++++++++
2 files changed, 63 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml
create mode 100644 include/dt-bindings/clock/qcom,sm8550-tcsrcc.h
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml
new file mode 100644
index 000000000000..b2de251328e4
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml
@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsrcc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm TCSR Clock Controller on SM8550
+
+maintainers:
+ - Bjorn Andersson <andersson@kernel.org>
+
+description: |
+ Qualcomm TCSR clock control module provides the clocks, resets and
+ power domains on SM8550
+
+ See also:: include/dt-bindings/clock/qcom,sm8550-tcsrcc.h
+
+properties:
+ compatible:
+ const: qcom,sm8550-tcsrcc
+
+ reg:
+ maxItems: 1
+
+ '#clock-cells':
+ const: 1
+
+ '#reset-cells':
+ const: 1
+
+required:
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |
+ clock-controller@1fc0000 {
+ compatible = "qcom,sm8550-tcsrcc";
+ reg = <0x1fc0000 0x30000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+...
diff --git a/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h b/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h
new file mode 100644
index 000000000000..091cb76f953a
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2022, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022, Linaro Limited
+ */
+
+#ifndef _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H
+#define _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H
+
+/* TCSR CC clocks */
+#define TCSR_PCIE_0_CLKREF_EN 0
+#define TCSR_PCIE_1_CLKREF_EN 1
+#define TCSR_UFS_CLKREF_EN 2
+#define TCSR_UFS_PAD_CLKREF_EN 3
+#define TCSR_USB2_CLKREF_EN 4
+#define TCSR_USB3_CLKREF_EN 5
+
+#endif
--
2.34.1
On Wed, Nov 30, 2022 at 01:28:45PM +0200, Abel Vesa wrote: > Add bindings documentation for clock TCSR driver on SM8550. > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../bindings/clock/qcom,sm8550-tcsrcc.yaml | 45 +++++++++++++++++++ > .../dt-bindings/clock/qcom,sm8550-tcsrcc.h | 18 ++++++++ > 2 files changed, 63 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml > create mode 100644 include/dt-bindings/clock/qcom,sm8550-tcsrcc.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml > new file mode 100644 > index 000000000000..b2de251328e4 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml > @@ -0,0 +1,45 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsrcc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm TCSR Clock Controller on SM8550 > + > +maintainers: > + - Bjorn Andersson <andersson@kernel.org> > + > +description: | > + Qualcomm TCSR clock control module provides the clocks, resets and > + power domains on SM8550 > + > + See also:: include/dt-bindings/clock/qcom,sm8550-tcsrcc.h > + > +properties: > + compatible: > + const: qcom,sm8550-tcsrcc The block described is the TCSR block, the clock controller represents one of the functions provided. I think it would be more appropriate if the compatible represented the generic nature of the block, even though you currently only care about exposing these clocks. > + > + reg: > + maxItems: 1 > + > + '#clock-cells': > + const: 1 > + > + '#reset-cells': > + const: 1 > + Your clocks are fed by cxo. While there might be reasons for not wire the parent up in the clocks, I think you should represent it in the binding. Regards, Bjorn > +required: > + - compatible > + > +additionalProperties: false > + > +examples: > + - | > + clock-controller@1fc0000 { > + compatible = "qcom,sm8550-tcsrcc"; > + reg = <0x1fc0000 0x30000>; > + #clock-cells = <1>; > + #reset-cells = <1>; > + }; > + > +... > diff --git a/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h b/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h > new file mode 100644 > index 000000000000..091cb76f953a > --- /dev/null > +++ b/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h > @@ -0,0 +1,18 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > +/* > + * Copyright (c) 2022, The Linux Foundation. All rights reserved. > + * Copyright (c) 2022, Linaro Limited > + */ > + > +#ifndef _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H > +#define _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H > + > +/* TCSR CC clocks */ > +#define TCSR_PCIE_0_CLKREF_EN 0 > +#define TCSR_PCIE_1_CLKREF_EN 1 > +#define TCSR_UFS_CLKREF_EN 2 > +#define TCSR_UFS_PAD_CLKREF_EN 3 > +#define TCSR_USB2_CLKREF_EN 4 > +#define TCSR_USB3_CLKREF_EN 5 > + > +#endif > -- > 2.34.1 >
On 22-12-01 16:12:20, Bjorn Andersson wrote: > On Wed, Nov 30, 2022 at 01:28:45PM +0200, Abel Vesa wrote: > > Add bindings documentation for clock TCSR driver on SM8550. > > > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > --- > > .../bindings/clock/qcom,sm8550-tcsrcc.yaml | 45 +++++++++++++++++++ > > .../dt-bindings/clock/qcom,sm8550-tcsrcc.h | 18 ++++++++ > > 2 files changed, 63 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml > > create mode 100644 include/dt-bindings/clock/qcom,sm8550-tcsrcc.h > > > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml > > new file mode 100644 > > index 000000000000..b2de251328e4 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsrcc.yaml > > @@ -0,0 +1,45 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsrcc.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Qualcomm TCSR Clock Controller on SM8550 > > + > > +maintainers: > > + - Bjorn Andersson <andersson@kernel.org> > > + > > +description: | > > + Qualcomm TCSR clock control module provides the clocks, resets and > > + power domains on SM8550 > > + > > + See also:: include/dt-bindings/clock/qcom,sm8550-tcsrcc.h > > + > > +properties: > > + compatible: > > + const: qcom,sm8550-tcsrcc > > The block described is the TCSR block, the clock controller represents > one of the functions provided. I think it would be more appropriate if > the compatible represented the generic nature of the block, even though > you currently only care about exposing these clocks. I think there is a rule that says the compatible string to be the same as the schema filename. Should I then also rename the schema file and also the binding IDs header? Like qcom,sm8550-tcsr.yaml and qcom,sm8550-tcsr.h ? > > > + > > + reg: > > + maxItems: 1 > > + > > + '#clock-cells': > > + const: 1 > > + > > + '#reset-cells': > > + const: 1 > > + > > Your clocks are fed by cxo. While there might be reasons for not wire > the parent up in the clocks, I think you should represent it in the > binding. Right, will document the clocks property as well and describe the clock as xo-board. > > Regards, > Bjorn > > > +required: > > + - compatible > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + clock-controller@1fc0000 { > > + compatible = "qcom,sm8550-tcsrcc"; > > + reg = <0x1fc0000 0x30000>; > > + #clock-cells = <1>; > > + #reset-cells = <1>; > > + }; > > + > > +... > > diff --git a/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h b/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h > > new file mode 100644 > > index 000000000000..091cb76f953a > > --- /dev/null > > +++ b/include/dt-bindings/clock/qcom,sm8550-tcsrcc.h > > @@ -0,0 +1,18 @@ > > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > > +/* > > + * Copyright (c) 2022, The Linux Foundation. All rights reserved. > > + * Copyright (c) 2022, Linaro Limited > > + */ > > + > > +#ifndef _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H > > +#define _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H > > + > > +/* TCSR CC clocks */ > > +#define TCSR_PCIE_0_CLKREF_EN 0 > > +#define TCSR_PCIE_1_CLKREF_EN 1 > > +#define TCSR_UFS_CLKREF_EN 2 > > +#define TCSR_UFS_PAD_CLKREF_EN 3 > > +#define TCSR_USB2_CLKREF_EN 4 > > +#define TCSR_USB3_CLKREF_EN 5 > > + > > +#endif > > -- > > 2.34.1 > >
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