drivers/gpu/drm/bridge/ite-it6505.c | 35 ++++++++++++++++++++++++++--- 1 file changed, 32 insertions(+), 3 deletions(-)
From: allen chen <allen.chen@ite.com.tw>
add read max-lane and max-pixel-clock from dt property
Signed-off-by: Allen-kh Cheng <allen-kh.cheng@mediatek.corp-partner.google.com>
Signed-off-by: Pin-yen Lin <treapking@chromium.org>
---
drivers/gpu/drm/bridge/ite-it6505.c | 35 ++++++++++++++++++++++++++---
1 file changed, 32 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c
index 4b673c4792d77..c9121d4635a52 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -436,6 +436,8 @@ struct it6505 {
bool powered;
bool hpd_state;
u32 afe_setting;
+ u32 max_dpi_pixel_clock;
+ u32 max_lane_count;
enum hdcp_state hdcp_status;
struct delayed_work hdcp_work;
struct work_struct hdcp_wait_ksv_list;
@@ -1466,7 +1468,8 @@ static void it6505_parse_link_capabilities(struct it6505 *it6505)
it6505->lane_count = link->num_lanes;
DRM_DEV_DEBUG_DRIVER(dev, "Sink support %d lanes training",
it6505->lane_count);
- it6505->lane_count = min_t(int, it6505->lane_count, MAX_LANE_COUNT);
+ it6505->lane_count = min_t(int, it6505->lane_count,
+ it6505->max_lane_count);
it6505->branch_device = drm_dp_is_branch(it6505->dpcd);
DRM_DEV_DEBUG_DRIVER(dev, "Sink %sbranch device",
@@ -2895,7 +2898,7 @@ it6505_bridge_mode_valid(struct drm_bridge *bridge,
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
return MODE_NO_INTERLACE;
- if (mode->clock > DPI_PIXEL_CLK_MAX)
+ if (mode->clock > it6505->max_dpi_pixel_clock)
return MODE_CLOCK_HIGH;
it6505->video_info.clock = mode->clock;
@@ -3057,6 +3060,8 @@ static void it6505_parse_dt(struct it6505 *it6505)
{
struct device *dev = &it6505->client->dev;
u32 *afe_setting = &it6505->afe_setting;
+ u32 *max_lane_count = &it6505->max_lane_count;
+ u32 *max_dpi_pixel_clock = &it6505->max_dpi_pixel_clock;
it6505->lane_swap_disabled =
device_property_read_bool(dev, "no-laneswap");
@@ -3072,7 +3077,31 @@ static void it6505_parse_dt(struct it6505 *it6505)
} else {
*afe_setting = 0;
}
- DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %d", *afe_setting);
+
+ if (device_property_read_u32(dev, "max-lane-count",
+ max_lane_count) == 0) {
+ if (*max_lane_count > 4 || *max_lane_count == 3) {
+ dev_err(dev, "max lane count error, use default");
+ *max_lane_count = MAX_LANE_COUNT;
+ }
+ } else {
+ *max_lane_count = MAX_LANE_COUNT;
+ }
+
+ if (device_property_read_u32(dev, "max-dpi-pixel-clock",
+ max_dpi_pixel_clock) == 0) {
+ if (*max_dpi_pixel_clock > 297000) {
+ dev_err(dev, "max pixel clock error, use default");
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ }
+ } else {
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ }
+
+ DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %u, max_lane_count: %u",
+ it6505->afe_setting, it6505->max_lane_count);
+ DRM_DEV_DEBUG_DRIVER(dev, "using max_dpi_pixel_clock: %u kHz",
+ it6505->max_dpi_pixel_clock);
}
static ssize_t receive_timing_debugfs_show(struct file *file, char __user *buf,
--
2.25.1Il 23/06/22 11:31, allen ha scritto:
> From: allen chen <allen.chen@ite.com.tw>
>
> add read max-lane and max-pixel-clock from dt property
>
> Signed-off-by: Allen-kh Cheng <allen-kh.cheng@mediatek.corp-partner.google.com>
> Signed-off-by: Pin-yen Lin <treapking@chromium.org>
Hello Allen,
as Sam also pointed out, please fix your S-o-b email: it has to match with the
author one.
Anyway, you're adding devicetree properties, so this implies that you should
also change the dt-bindings documentation for this driver... and also, I have
some more comments, check below:
> ---
> drivers/gpu/drm/bridge/ite-it6505.c | 35 ++++++++++++++++++++++++++---
> 1 file changed, 32 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c
> index 4b673c4792d77..c9121d4635a52 100644
> --- a/drivers/gpu/drm/bridge/ite-it6505.c
> +++ b/drivers/gpu/drm/bridge/ite-it6505.c
> @@ -436,6 +436,8 @@ struct it6505 {
> bool powered;
> bool hpd_state;
> u32 afe_setting;
> + u32 max_dpi_pixel_clock;
> + u32 max_lane_count;
> enum hdcp_state hdcp_status;
> struct delayed_work hdcp_work;
> struct work_struct hdcp_wait_ksv_list;
> @@ -1466,7 +1468,8 @@ static void it6505_parse_link_capabilities(struct it6505 *it6505)
> it6505->lane_count = link->num_lanes;
> DRM_DEV_DEBUG_DRIVER(dev, "Sink support %d lanes training",
> it6505->lane_count);
> - it6505->lane_count = min_t(int, it6505->lane_count, MAX_LANE_COUNT);
> + it6505->lane_count = min_t(int, it6505->lane_count,
> + it6505->max_lane_count);
>
> it6505->branch_device = drm_dp_is_branch(it6505->dpcd);
> DRM_DEV_DEBUG_DRIVER(dev, "Sink %sbranch device",
> @@ -2895,7 +2898,7 @@ it6505_bridge_mode_valid(struct drm_bridge *bridge,
> if (mode->flags & DRM_MODE_FLAG_INTERLACE)
> return MODE_NO_INTERLACE;
>
> - if (mode->clock > DPI_PIXEL_CLK_MAX)
> + if (mode->clock > it6505->max_dpi_pixel_clock)
> return MODE_CLOCK_HIGH;
>
> it6505->video_info.clock = mode->clock;
> @@ -3057,6 +3060,8 @@ static void it6505_parse_dt(struct it6505 *it6505)
> {
> struct device *dev = &it6505->client->dev;
> u32 *afe_setting = &it6505->afe_setting;
> + u32 *max_lane_count = &it6505->max_lane_count;
> + u32 *max_dpi_pixel_clock = &it6505->max_dpi_pixel_clock;
>
> it6505->lane_swap_disabled =
> device_property_read_bool(dev, "no-laneswap");
> @@ -3072,7 +3077,31 @@ static void it6505_parse_dt(struct it6505 *it6505)
> } else {
> *afe_setting = 0;
> }
> - DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %d", *afe_setting);
> +
> + if (device_property_read_u32(dev, "max-lane-count",
Please use the standard property "data-lanes" from video-interfaces.yaml.
> + max_lane_count) == 0) {
> + if (*max_lane_count > 4 || *max_lane_count == 3) {
> + dev_err(dev, "max lane count error, use default");
> + *max_lane_count = MAX_LANE_COUNT;
> + }
> + } else {
> + *max_lane_count = MAX_LANE_COUNT;
> + }
> +
> + if (device_property_read_u32(dev, "max-dpi-pixel-clock",
> + max_dpi_pixel_clock) == 0) {
What about "max-pixel-clock-khz" or "max-pixel-clock-hz"?
Regards,
Angelo
Hi AngeloGioacchino
According to video-interfaces.yaml, property data-lanes should in the endpoint. It6505 has dpi input and no data-lanes parameters. It6505 has dp output and has data-lanes parameters. We want to use data-lanes in the output, but output point use extcon instead of endpoint. Do not have output endpoint.
Which line in dts should data-lanes be in?
Below is it6505 dts
Thanks for your suggestion!
dp-bridge@5c {
compatible = "ite,it6505";
interrupts = <152 IRQ_TYPE_EDGE_FALLING 152 0>;
reg = <0x5c>;
pinctrl-names = "default";
pinctrl-0 = <&it6505_pins>;
ovdd-supply = <&mt6358_vsim1_reg>;
pwr18-supply = <&it6505_pp18_reg>;
reset-gpios = <&pio 179 1>;
extcon = <&usbc_extcon>;
port {
it6505_in: endpoint {
remote-endpoint = <&dpi_out>;
};
};
};
-----Original Message-----
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Sent: Monday, June 27, 2022 8:55 PM
To: Allen Chen (陳柏宇) <allen.chen@ite.com.tw>
Cc: Pin-yen Lin <treapking@google.com>; Jau-Chih Tseng (曾昭智) <Jau-Chih.Tseng@ite.com.tw>; Hermes Wu (吳佳宏) <Hermes.Wu@ite.com.tw>; Kenneth Hung (洪家倫) <Kenneth.Hung@ite.com.tw>; Allen-kh Cheng <allen-kh.cheng@mediatek.corp-partner.google.com>; Pin-yen Lin <treapking@chromium.org>; Andrzej Hajda <andrzej.hajda@intel.com>; Neil Armstrong <narmstrong@baylibre.com>; Robert Foss <robert.foss@linaro.org>; Laurent Pinchart <Laurent.pinchart@ideasonboard.com>; Jonas Karlman <jonas@kwiboo.se>; Jernej Skrabec <jernej.skrabec@gmail.com>; David Airlie <airlied@linux.ie>; Daniel Vetter <daniel@ffwll.ch>; Matthias Brugger <matthias.bgg@gmail.com>; open list:DRM DRIVERS <dri-devel@lists.freedesktop.org>; open list <linux-kernel@vger.kernel.org>; moderated list:ARM/Mediatek SoC support <linux-arm-kernel@lists.infradead.org>; moderated list:ARM/Mediatek SoC support <linux-mediatek@lists.infradead.org>
Subject: Re: [PATCH] drm/bridge: add it6505 driver read config from dt property
Il 23/06/22 11:31, allen ha scritto:
> From: allen chen <allen.chen@ite.com.tw>
>
> add read max-lane and max-pixel-clock from dt property
>
> Signed-off-by: Allen-kh Cheng
> <allen-kh.cheng@mediatek.corp-partner.google.com>
> Signed-off-by: Pin-yen Lin <treapking@chromium.org>
Hello Allen,
as Sam also pointed out, please fix your S-o-b email: it has to match with the author one.
Anyway, you're adding devicetree properties, so this implies that you should also change the dt-bindings documentation for this driver... and also, I have some more comments, check below:
> ---
> drivers/gpu/drm/bridge/ite-it6505.c | 35 ++++++++++++++++++++++++++---
> 1 file changed, 32 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/ite-it6505.c
> b/drivers/gpu/drm/bridge/ite-it6505.c
> index 4b673c4792d77..c9121d4635a52 100644
> --- a/drivers/gpu/drm/bridge/ite-it6505.c
> +++ b/drivers/gpu/drm/bridge/ite-it6505.c
> @@ -436,6 +436,8 @@ struct it6505 {
> bool powered;
> bool hpd_state;
> u32 afe_setting;
> + u32 max_dpi_pixel_clock;
> + u32 max_lane_count;
> enum hdcp_state hdcp_status;
> struct delayed_work hdcp_work;
> struct work_struct hdcp_wait_ksv_list; @@ -1466,7 +1468,8 @@ static
> void it6505_parse_link_capabilities(struct it6505 *it6505)
> it6505->lane_count = link->num_lanes;
> DRM_DEV_DEBUG_DRIVER(dev, "Sink support %d lanes training",
> it6505->lane_count);
> - it6505->lane_count = min_t(int, it6505->lane_count, MAX_LANE_COUNT);
> + it6505->lane_count = min_t(int, it6505->lane_count,
> + it6505->max_lane_count);
>
> it6505->branch_device = drm_dp_is_branch(it6505->dpcd);
> DRM_DEV_DEBUG_DRIVER(dev, "Sink %sbranch device", @@ -2895,7
> +2898,7 @@ it6505_bridge_mode_valid(struct drm_bridge *bridge,
> if (mode->flags & DRM_MODE_FLAG_INTERLACE)
> return MODE_NO_INTERLACE;
>
> - if (mode->clock > DPI_PIXEL_CLK_MAX)
> + if (mode->clock > it6505->max_dpi_pixel_clock)
> return MODE_CLOCK_HIGH;
>
> it6505->video_info.clock = mode->clock; @@ -3057,6 +3060,8 @@
> static void it6505_parse_dt(struct it6505 *it6505)
> {
> struct device *dev = &it6505->client->dev;
> u32 *afe_setting = &it6505->afe_setting;
> + u32 *max_lane_count = &it6505->max_lane_count;
> + u32 *max_dpi_pixel_clock = &it6505->max_dpi_pixel_clock;
>
> it6505->lane_swap_disabled =
> device_property_read_bool(dev, "no-laneswap"); @@ -3072,7 +3077,31
> @@ static void it6505_parse_dt(struct it6505 *it6505)
> } else {
> *afe_setting = 0;
> }
> - DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %d", *afe_setting);
> +
> + if (device_property_read_u32(dev, "max-lane-count",
Please use the standard property "data-lanes" from video-interfaces.yaml.
> + max_lane_count) == 0) {
> + if (*max_lane_count > 4 || *max_lane_count == 3) {
> + dev_err(dev, "max lane count error, use default");
> + *max_lane_count = MAX_LANE_COUNT;
> + }
> + } else {
> + *max_lane_count = MAX_LANE_COUNT;
> + }
> +
> + if (device_property_read_u32(dev, "max-dpi-pixel-clock",
> + max_dpi_pixel_clock) == 0) {
What about "max-pixel-clock-khz" or "max-pixel-clock-hz"?
Regards,
Angelo
Hi allen.
On Thu, Jun 23, 2022 at 05:31:54PM +0800, allen wrote:
> From: allen chen <allen.chen@ite.com.tw>
>
> add read max-lane and max-pixel-clock from dt property
>
> Signed-off-by: Allen-kh Cheng <allen-kh.cheng@mediatek.corp-partner.google.com>
Can you fix so your s-o-b mail and author mail matches?
As it is now an error is flagged as they do not match.
Sam
> Signed-off-by: Pin-yen Lin <treapking@chromium.org>
> ---
> drivers/gpu/drm/bridge/ite-it6505.c | 35 ++++++++++++++++++++++++++---
> 1 file changed, 32 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c
> index 4b673c4792d77..c9121d4635a52 100644
> --- a/drivers/gpu/drm/bridge/ite-it6505.c
> +++ b/drivers/gpu/drm/bridge/ite-it6505.c
> @@ -436,6 +436,8 @@ struct it6505 {
> bool powered;
> bool hpd_state;
> u32 afe_setting;
> + u32 max_dpi_pixel_clock;
> + u32 max_lane_count;
> enum hdcp_state hdcp_status;
> struct delayed_work hdcp_work;
> struct work_struct hdcp_wait_ksv_list;
> @@ -1466,7 +1468,8 @@ static void it6505_parse_link_capabilities(struct it6505 *it6505)
> it6505->lane_count = link->num_lanes;
> DRM_DEV_DEBUG_DRIVER(dev, "Sink support %d lanes training",
> it6505->lane_count);
> - it6505->lane_count = min_t(int, it6505->lane_count, MAX_LANE_COUNT);
> + it6505->lane_count = min_t(int, it6505->lane_count,
> + it6505->max_lane_count);
>
> it6505->branch_device = drm_dp_is_branch(it6505->dpcd);
> DRM_DEV_DEBUG_DRIVER(dev, "Sink %sbranch device",
> @@ -2895,7 +2898,7 @@ it6505_bridge_mode_valid(struct drm_bridge *bridge,
> if (mode->flags & DRM_MODE_FLAG_INTERLACE)
> return MODE_NO_INTERLACE;
>
> - if (mode->clock > DPI_PIXEL_CLK_MAX)
> + if (mode->clock > it6505->max_dpi_pixel_clock)
> return MODE_CLOCK_HIGH;
>
> it6505->video_info.clock = mode->clock;
> @@ -3057,6 +3060,8 @@ static void it6505_parse_dt(struct it6505 *it6505)
> {
> struct device *dev = &it6505->client->dev;
> u32 *afe_setting = &it6505->afe_setting;
> + u32 *max_lane_count = &it6505->max_lane_count;
> + u32 *max_dpi_pixel_clock = &it6505->max_dpi_pixel_clock;
>
> it6505->lane_swap_disabled =
> device_property_read_bool(dev, "no-laneswap");
> @@ -3072,7 +3077,31 @@ static void it6505_parse_dt(struct it6505 *it6505)
> } else {
> *afe_setting = 0;
> }
> - DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %d", *afe_setting);
> +
> + if (device_property_read_u32(dev, "max-lane-count",
> + max_lane_count) == 0) {
> + if (*max_lane_count > 4 || *max_lane_count == 3) {
> + dev_err(dev, "max lane count error, use default");
> + *max_lane_count = MAX_LANE_COUNT;
> + }
> + } else {
> + *max_lane_count = MAX_LANE_COUNT;
> + }
> +
> + if (device_property_read_u32(dev, "max-dpi-pixel-clock",
> + max_dpi_pixel_clock) == 0) {
> + if (*max_dpi_pixel_clock > 297000) {
> + dev_err(dev, "max pixel clock error, use default");
> + *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
> + }
> + } else {
> + *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
> + }
> +
> + DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %u, max_lane_count: %u",
> + it6505->afe_setting, it6505->max_lane_count);
> + DRM_DEV_DEBUG_DRIVER(dev, "using max_dpi_pixel_clock: %u kHz",
> + it6505->max_dpi_pixel_clock);
> }
>
> static ssize_t receive_timing_debugfs_show(struct file *file, char __user *buf,
> --
> 2.25.1
© 2016 - 2024 Red Hat, Inc.