This is a small series that happens on the back of [0] (implementing
additional features in KVM's vgic) and allows for a couple of
performance optimisations.

Thanks,

        M.

* From v1 [1]:
  - Moved the RWP polling fix to -fixes, to be merged independently
  - Fixed bit numbers for CES and IR
  - Added some comments about the respective relations between
    DirectLPIs, RVPEID and IR.
  - Some cosmetic changes
  - Rebased on 5.18-rc1

[0] https://lore.kernel.org/r/20220405182327.205520-1-maz@kernel.org
[1] https://lore.kernel.org/r/20220315165034.794482-1-maz@kernel.org

Marc Zyngier (3):
  irqchip/gic-v3: Exposes bit values for GICR_CTLR.{IR,CES}
  irqchip/gic-v3: Detect LPI invalidation MMIO registers
  irqchip/gic-v3: Relax polling of GIC{R,D}_CTLR.RWP

 drivers/irqchip/irq-gic-v3.c       | 58 +++++++++++++++++-------------
 include/linux/irqchip/arm-gic-v3.h |  2 ++
 2 files changed, 36 insertions(+), 24 deletions(-)

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2.34.1