The following commit has been merged into the irq/irqchip-fixes branch of irqchip:

Commit-ID:     e4a7e67a08ac409f1485c82a2190636d5c81b932
Gitweb:        https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/e4a7e67a08ac409f1485c82a2190636d5c81b932
Author:        Frank Li <Frank.Li@nxp.com>
AuthorDate:    Tue, 04 Oct 2022 15:24:14 -05:00
Committer:     Marc Zyngier <maz@kernel.org>
CommitterDate: Tue, 04 Oct 2022 23:35:36 +01:00

irqchip/imx-mu-msi: Fix wrong register offset for 8ulp

Offset 0x124 should be for IMX_MU_TSR, not IMX_MU_GSR.

Fixes: 70afdab904d2 ("irqchip: Add IMX MU MSI controller driver")
Reported-by: Colin King <colin.i.king@gmail.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
[maz: updated commit message, tags]
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221004202414.216577-1-Frank.Li@nxp.com
---
 drivers/irqchip/irq-imx-mu-msi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-imx-mu-msi.c b/drivers/irqchip/irq-imx-mu-msi.c
index b62139d..229039e 100644
--- a/drivers/irqchip/irq-imx-mu-msi.c
+++ b/drivers/irqchip/irq-imx-mu-msi.c
@@ -292,7 +292,7 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx8ulp = {
 	.xSR    = {
 			[IMX_MU_SR]  = 0xC,
 			[IMX_MU_GSR] = 0x118,
-			[IMX_MU_GSR] = 0x124,
+			[IMX_MU_TSR] = 0x124,
 			[IMX_MU_RSR] = 0x12C,
 		  },
 	.xCR    = {