From nobody Mon Apr 6 18:12:19 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 50184C433F5 for ; Tue, 4 Oct 2022 22:45:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230198AbiJDWpc (ORCPT ); Tue, 4 Oct 2022 18:45:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32782 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229890AbiJDWp3 (ORCPT ); Tue, 4 Oct 2022 18:45:29 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F05DD3740F for ; Tue, 4 Oct 2022 15:45:28 -0700 (PDT) Date: Tue, 04 Oct 2022 22:45:23 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1664923525; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=IzWIUcB/ec1t1znH9iekpaeRW0CuVuWZtb0ZABwxZ7E=; b=dBaYhdX8Z76MNyq5SLRZQNpiCXFqUxmkXkePKLA/NXBbUJDsfCQbQ3sAmGPktC4CpViHCH HGwL9IvydKwlHdr22ck0CAuaV60MrHWrhldgXTvM6tc/R82NUCbxbwW3Ng3E+frPNxww3f 74OdCdnM6x3JtMzAB5jWgYfTxTHTqbZ91lx+yZzAwh4pKOHmQUY050CwD6/RS0djdc53n/ 5WSCRZEB5uXAOIhtQAPOxgkctpqVI2/jmhx+8dfyp0D4eEM/9bZW2suk+VNnid+0j39Moz hJGLrio6l4rwKtbdHgQlvYvf/4etfU2q9F7tJNx+P3pD/Ej5q+r/UEOemDZ9Kg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1664923525; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=IzWIUcB/ec1t1znH9iekpaeRW0CuVuWZtb0ZABwxZ7E=; b=Q+tc2ApkbWwRA99ou7eidv0pu38jduvJCQZMZX8n2YwXzkksj9TWIHRyO9oGq+Kug8T+lY UzIjGGcqLiRwgUAQ== From: "irqchip-bot for Frank Li" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-kernel@vger.kernel.org Subject: [irqchip: irq/irqchip-fixes] irqchip/imx-mu-msi: Fix wrong register offset for 8ulp Cc: Colin King , Frank Li , Marc Zyngier , tglx@linutronix.de In-Reply-To: <20221004202414.216577-1-Frank.Li@nxp.com> References: <20221004202414.216577-1-Frank.Li@nxp.com> MIME-Version: 1.0 Message-ID: <166492352354.401.14610078569378494148.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the irq/irqchip-fixes branch of i= rqchip: Commit-ID: e4a7e67a08ac409f1485c82a2190636d5c81b932 Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-plat= forms/e4a7e67a08ac409f1485c82a2190636d5c81b932 Author: Frank Li AuthorDate: Tue, 04 Oct 2022 15:24:14 -05:00 Committer: Marc Zyngier CommitterDate: Tue, 04 Oct 2022 23:35:36 +01:00 irqchip/imx-mu-msi: Fix wrong register offset for 8ulp Offset 0x124 should be for IMX_MU_TSR, not IMX_MU_GSR. Fixes: 70afdab904d2 ("irqchip: Add IMX MU MSI controller driver") Reported-by: Colin King Signed-off-by: Frank Li [maz: updated commit message, tags] Signed-off-by: Marc Zyngier Link: https://lore.kernel.org/r/20221004202414.216577-1-Frank.Li@nxp.com --- drivers/irqchip/irq-imx-mu-msi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-imx-mu-msi.c b/drivers/irqchip/irq-imx-mu-= msi.c index b62139d..229039e 100644 --- a/drivers/irqchip/irq-imx-mu-msi.c +++ b/drivers/irqchip/irq-imx-mu-msi.c @@ -292,7 +292,7 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx8ulp =3D { .xSR =3D { [IMX_MU_SR] =3D 0xC, [IMX_MU_GSR] =3D 0x118, - [IMX_MU_GSR] =3D 0x124, + [IMX_MU_TSR] =3D 0x124, [IMX_MU_RSR] =3D 0x12C, }, .xCR =3D {