According to the "Arm Generic Interrupt Controller (GIC) Architecture
Specification, v3 and v3", revision H.b[1], there can be only 64
Extended PPI interrupts.

[1] https://developer.arm.com/documentation/ihi0069/hb/

Fixes: 4b049063e0bcbfd3 ("dt-bindings: interrupt-controller: arm,gic-v3: Describe EPPI range support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 .../devicetree/bindings/interrupt-controller/arm,gic-v3.yaml    | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
index bfd30aae682bf3f7..360a0643a0b567a4 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
@@ -50,7 +50,7 @@ properties:
       The 2nd cell contains the interrupt number for the interrupt type.
       SPI interrupts are in the range [0-987]. PPI interrupts are in the
       range [0-15]. Extended SPI interrupts are in the range [0-1023].
-      Extended PPI interrupts are in the range [0-127].
+      Extended PPI interrupts are in the range [0-63].
 
       The 3rd cell is the flags, encoded as follows:
       bits[3:0] trigger type and level flags.
-- 
2.43.0

On Wed, 04 Mar 2026 14:04:10 +0000,
Geert Uytterhoeven <geert+renesas@glider.be> wrote:
> 
> According to the "Arm Generic Interrupt Controller (GIC) Architecture
> Specification, v3 and v3", revision H.b[1], there can be only 64

v3 and v4?

> Extended PPI interrupts.
> 
> [1] https://developer.arm.com/documentation/ihi0069/hb/
> 
> Fixes: 4b049063e0bcbfd3 ("dt-bindings: interrupt-controller: arm,gic-v3: Describe EPPI range support")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
>  .../devicetree/bindings/interrupt-controller/arm,gic-v3.yaml    | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
> index bfd30aae682bf3f7..360a0643a0b567a4 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
> @@ -50,7 +50,7 @@ properties:
>        The 2nd cell contains the interrupt number for the interrupt type.
>        SPI interrupts are in the range [0-987]. PPI interrupts are in the
>        range [0-15]. Extended SPI interrupts are in the range [0-1023].
> -      Extended PPI interrupts are in the range [0-127].
> +      Extended PPI interrupts are in the range [0-63].
>  
>        The 3rd cell is the flags, encoded as follows:
>        bits[3:0] trigger type and level flags.

Duh. Thankfully the code didn't have the same problem... Thanks for
noticing it. With the above fixed:

Brain-farted-by: Marc Zyngier <maz@kernel.org>
Acked-by: Marc Zyngier <maz@kernel.org>

	M.

-- 
Without deviation from the norm, progress is not possible.

Hi Marc,

On Wed, 4 Mar 2026 at 15:32, Marc Zyngier <maz@kernel.org> wrote:
> On Wed, 04 Mar 2026 14:04:10 +0000,
> Geert Uytterhoeven <geert+renesas@glider.be> wrote:
> >
> > According to the "Arm Generic Interrupt Controller (GIC) Architecture
> > Specification, v3 and v3", revision H.b[1], there can be only 64
>
> v3 and v4?

Doh, no one is immune to hallucinations ;-)

> > Extended PPI interrupts.
> >
> > [1] https://developer.arm.com/documentation/ihi0069/hb/
> >
> > Fixes: 4b049063e0bcbfd3 ("dt-bindings: interrupt-controller: arm,gic-v3: Describe EPPI range support")
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > ---
> >  .../devicetree/bindings/interrupt-controller/arm,gic-v3.yaml    | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
> > index bfd30aae682bf3f7..360a0643a0b567a4 100644
> > --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
> > +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
> > @@ -50,7 +50,7 @@ properties:
> >        The 2nd cell contains the interrupt number for the interrupt type.
> >        SPI interrupts are in the range [0-987]. PPI interrupts are in the
> >        range [0-15]. Extended SPI interrupts are in the range [0-1023].
> > -      Extended PPI interrupts are in the range [0-127].
> > +      Extended PPI interrupts are in the range [0-63].
> >
> >        The 3rd cell is the flags, encoded as follows:
> >        bits[3:0] trigger type and level flags.
>
> Duh. Thankfully the code didn't have the same problem... Thanks for
> noticing it. With the above fixed:
>
> Brain-farted-by: Marc Zyngier <maz@kernel.org>

Is that a common and acceptable tag? ;-)

> Acked-by: Marc Zyngier <maz@kernel.org>

Thanks!

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds