[PATCH v11 0/5] hw/riscv: Server Platform Reference Board

Daniel Henrique Barboza posted 5 patches 2 weeks, 2 days ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260909210756.1767711-1-daniel.barboza@oss.qualcomm.com
Maintainers: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Chao Liu <chao.liu@processmission.com>, Paolo Bonzini <pbonzini@redhat.com>
There is a newer version of this series
configs/devices/riscv64-softmmu/default.mak |   1 +
docs/system/riscv/riscv-server-ref.rst      |  65 ++
docs/system/target-riscv.rst                |   1 +
hw/riscv/Kconfig                            |  16 +
hw/riscv/meson.build                        |   1 +
hw/riscv/server_platform_ref.c              | 790 ++++++++++++++++++++
target/riscv/cpu-qom.h                      |   1 +
target/riscv/cpu.c                          |  33 +-
tests/functional/riscv64/meson.build        |   2 +
tests/functional/riscv64/test_opensbi.py    |   4 +
tests/functional/riscv64/test_server_ref.py |  88 +++
11 files changed, 1001 insertions(+), 1 deletion(-)
create mode 100644 docs/system/riscv/riscv-server-ref.rst
create mode 100644 hw/riscv/server_platform_ref.c
create mode 100755 tests/functional/riscv64/test_server_ref.py
[PATCH v11 0/5] hw/riscv: Server Platform Reference Board
Posted by Daniel Henrique Barboza 2 weeks, 2 days ago
Greetings,

This version has review changes proposed by Drew in v10.

Most notable change is that we're now defaulting s->aia_guests to 5.
Users can set a different value N using the already existing "aia_guests"
machine option:

"-M riscv-server-ref,aia-guests=N"

Docs were also updated.  We're now commiting to do a new board version
for every riscv-server-ref spec release. 

Patches are based on top of sdext-v9 patches:

"[PATCH v9 0/7] riscv: add initial sdext support"


Changes from v10:
- patch 2:
  - added sdext as dependency
  - renamed profile to "riscv-server-ref-1.0"
  - reworded profile comment
- patch 3:
  - added RVSERVER_IRQCHIP_DEFAULT_AIA_GUESTS macro, default value = 5
  - s->aia_guests is now set to 5 by default.  Users can set a different
    value for testing purposes using "-M riscv-server-ref,aia-guests=N"
  - fixed whitespace issues
- patch 5:
  - reworded the "versioning" paragraph to make it clear that every new
    riscv-server-ref spec version will trigger a new version of the
    riscv-server-ref board
- v10 link: https://lore.kernel.org/qemu-devel/20260904195610.964829-1-daniel.barboza@oss.qualcomm.com/

Daniel Henrique Barboza (5):
  target/riscv/cpu.c: remove 'bare' condition for .profile
  target/riscv: add riscv-server-ref CPU
  hw/riscv: server platform reference machine
  tests/functional/riscv64: add riscv-server-ref tests
  docs: add riscv-server-ref.rst

 configs/devices/riscv64-softmmu/default.mak |   1 +
 docs/system/riscv/riscv-server-ref.rst      |  65 ++
 docs/system/target-riscv.rst                |   1 +
 hw/riscv/Kconfig                            |  16 +
 hw/riscv/meson.build                        |   1 +
 hw/riscv/server_platform_ref.c              | 790 ++++++++++++++++++++
 target/riscv/cpu-qom.h                      |   1 +
 target/riscv/cpu.c                          |  33 +-
 tests/functional/riscv64/meson.build        |   2 +
 tests/functional/riscv64/test_opensbi.py    |   4 +
 tests/functional/riscv64/test_server_ref.py |  88 +++
 11 files changed, 1001 insertions(+), 1 deletion(-)
 create mode 100644 docs/system/riscv/riscv-server-ref.rst
 create mode 100644 hw/riscv/server_platform_ref.c
 create mode 100755 tests/functional/riscv64/test_server_ref.py

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2.43.0