Hi,

In this new version we have lots of changes suggested by Drew on v11.

The most notable change is the removal of default e1000e NIC and default
AHCI ich9 bus, following the idea where the board should be as minimalist
as possible w.r.t default features.  Note that both can be added again
with:

-device ich9-ahci,id=ahci0 -device ide-hd,drive=hd0,bus=ahci0.0
-netdev user,id=net0 -device e1000e,netdev=net0

So I feel comfortable removing them from the default design since it's
just a matter of adding them in the command line.

Patches are based on top of sdext-v9 patches:

"[PATCH v9 0/7] riscv: add initial sdext support"


Changes from v11:
- patch 2:
  - commit msg: s/trigger-count/num-triggers
  - removed the "N < 128" num-trigger bit from commit msg
  - added an explicit "PRIV_VERSION_1_13_0" val in RVServerRef1_0 description
  - default pmu_mask is now set to MAKE_64BIT_MASK(3, 6) (i.e. 6 counters)
- patch 3:
  - Kconfig changes:
    - changed PCI_DEVICES to PCIE_DEVICES
    - changed SERIAL to SERIAL_MM
    - added PLATFORM_BUS
  - removed duplicated "system/qtest.h" header
  - aligned macros names and values
  - fixed "accommodate" typo
  - removed default NIC and AHCI bus by removing rvserver_init_pci_devices()
  - removed RVSERVER_DEBUG memmap
  - added RVSERVER_ACLINT_TIMEBASE_FREQ 1Ghz macro
  - added .instance_finalize() to clean up the s->flash[] objects
  - added NULL at the end of valid_cpu_types[] declaration
- patch 4:
  - added ahci bus and e1000e command line in do_test_boot_linux_test()
- patch 5:
  - fixed nvme disk command line example
- v11 link: https://lore.kernel.org/qemu-devel/20260909210756.1767711-1-daniel.barboza@oss.qualcomm.com/  

Daniel Henrique Barboza (5):
  target/riscv/cpu.c: remove 'bare' condition for .profile
  target/riscv: add riscv-server-ref CPU
  hw/riscv: server platform reference machine
  tests/functional/riscv64: add riscv-server-ref tests
  docs: add riscv-server-ref.rst

 configs/devices/riscv64-softmmu/default.mak |   1 +
 docs/system/riscv/riscv-server-ref.rst      |  64 ++
 docs/system/target-riscv.rst                |   1 +
 hw/riscv/Kconfig                            |  17 +
 hw/riscv/meson.build                        |   1 +
 hw/riscv/server_platform_ref.c              | 776 ++++++++++++++++++++
 target/riscv/cpu-qom.h                      |   1 +
 target/riscv/cpu.c                          |  35 +-
 tests/functional/riscv64/meson.build        |   2 +
 tests/functional/riscv64/test_opensbi.py    |   4 +
 tests/functional/riscv64/test_server_ref.py |  90 +++
 11 files changed, 991 insertions(+), 1 deletion(-)
 create mode 100644 docs/system/riscv/riscv-server-ref.rst
 create mode 100644 hw/riscv/server_platform_ref.c
 create mode 100755 tests/functional/riscv64/test_server_ref.py

-- 
2.43.0