[PATCH 0/2] Fix mtfsf, mtfsfi and mtfsb1 bug

Lucas Mateus Castro (alqotel) posted 2 patches 2 years, 6 months ago
Test checkpatch failed
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20211020125724.78028-1-lucas.araujo@eldorado.org.br
Maintainers: Greg Kurz <groug@kaod.org>, David Gibson <david@gibson.dropbear.id.au>
There is a newer version of this series
target/ppc/cpu.c                   |  2 +-
target/ppc/cpu.h                   |  3 +++
target/ppc/fpu_helper.c            | 41 ++++++++++++++++++++++++++++++
target/ppc/helper.h                |  1 +
target/ppc/translate/fp-impl.c.inc |  6 ++---
5 files changed, 49 insertions(+), 4 deletions(-)
[PATCH 0/2] Fix mtfsf, mtfsfi and mtfsb1 bug
Posted by Lucas Mateus Castro (alqotel) 2 years, 6 months ago
From: "Lucas Mateus Castro (alqotel)" <lucas.castro@eldorado.org.br>

The instructions mtfsf, mtfsfi and mtfsb, when called, fail to set the FI
bit (bit 46 in the FPSCR) and can set to 1 the reserved bit 52 of the
FPSCR, as reported in https://gitlab.com/qemu-project/qemu/-/issues/266
(although the bug report is only for mtfsf, the bug applies to mtfsfi and
mtfsb1 as well).

These instructions also fail to throw an exception when the exception
and enabling bits are set, this can be tested by adding
'prctl(PR_SET_FPEXC, PR_FP_EXC_PRECISE);' before the __builtin_mtfsf
call in the test case of the bug report.
 
These patches aim to fix these issues.

Lucas Mateus Castro (alqotel) (2):
  target/ppc: Fixed call to deferred exception
  target/ppc: ppc_store_fpscr doesn't update bit 52

 target/ppc/cpu.c                   |  2 +-
 target/ppc/cpu.h                   |  3 +++
 target/ppc/fpu_helper.c            | 41 ++++++++++++++++++++++++++++++
 target/ppc/helper.h                |  1 +
 target/ppc/translate/fp-impl.c.inc |  6 ++---
 5 files changed, 49 insertions(+), 4 deletions(-)

-- 
2.31.1


Re: [PATCH 0/2] Fix mtfsf, mtfsfi and mtfsb1 bug
Posted by Matheus K. Ferst 2 years, 6 months ago
CC'ing the reporter

On 20/10/2021 09:57, Lucas Mateus Castro (alqotel) wrote:
> From: "Lucas Mateus Castro (alqotel)" <lucas.castro@eldorado.org.br>
> 
> The instructions mtfsf, mtfsfi and mtfsb, when called, fail to set the FI
> bit (bit 46 in the FPSCR) and can set to 1 the reserved bit 52 of the
> FPSCR, as reported in https://gitlab.com/qemu-project/qemu/-/issues/266
> (although the bug report is only for mtfsf, the bug applies to mtfsfi and
> mtfsb1 as well).
> 
> These instructions also fail to throw an exception when the exception
> and enabling bits are set, this can be tested by adding
> 'prctl(PR_SET_FPEXC, PR_FP_EXC_PRECISE);' before the __builtin_mtfsf
> call in the test case of the bug report.
> 
> These patches aim to fix these issues.
> 
> Lucas Mateus Castro (alqotel) (2):
>    target/ppc: Fixed call to deferred exception
>    target/ppc: ppc_store_fpscr doesn't update bit 52
> 
>   target/ppc/cpu.c                   |  2 +-
>   target/ppc/cpu.h                   |  3 +++
>   target/ppc/fpu_helper.c            | 41 ++++++++++++++++++++++++++++++
>   target/ppc/helper.h                |  1 +
>   target/ppc/translate/fp-impl.c.inc |  6 ++---
>   5 files changed, 49 insertions(+), 4 deletions(-)
> 
> --
> 2.31.1
> 
> 
-- 
Matheus K. Ferst
Instituto de Pesquisas ELDORADO <http://www.eldorado.org.br/>
Analista de Software
Aviso Legal - Disclaimer <https://www.eldorado.org.br/disclaimer.html>