On 12/1/21 17:38, Lucas Mateus Castro (alqotel) wrote:
> The instructions mtfsf, mtfsfi and mtfsb1, when called, fail to set the FI
> bit (bit 46 in the FPSCR) and can set to 1 the reserved bit 52 of the
> FPSCR, as reported in https://gitlab.com/qemu-project/qemu/-/issues/266
> (although the bug report is only for mtfsf, the bug applies to mtfsfi and
> mtfsb1 as well).
>
> These instructions also fail to throw an exception when the exception
> and enabling bits are set, this can be tested by adding
> 'prctl(PR_SET_FPEXC, PR_FP_EXC_PRECISE);' before the __builtin_mtfsf
> call in the test case of the bug report.
>
> These patches aim to fix these issues.
>
> Changes from v3:
> - rebased on the master branch of https://gitlab.com/qemu-project/qemu
Richard had reviewed patch 1 and 2. It is better to keep the
Reviewed-by when resending. Please do if there is a v5. I will
add them for v4.
Thanks,
C.
>
> Changes from v2:
> - changed patch order to add the mtfsf test after the FI bit and
> deferred exception fix(patch 1) as these are the errors tested here
> - moved code to check FP_VE only once in helper_fpscr_check_status
> - tests/tcg/ppc64le/mtfsf.c tests if the signal code is correct
> - FPSCR bits 0-28 can't be set anymore as they're reserved bits
> - changed (11ull << 11) in FPSCR_MTFS_MASK to PPC_BIT(52) to make it clearer
>
> Changes from v1:
> - added a test for mtfsf (patch 3)
> - moved "Resolves" to second patch
> - removed gen_reset_fpstatus() from mtfsf,mtfsfi and mtfsb1 instructions
>
>
> Lucas Mateus Castro (alqotel) (3):
> target/ppc: Fixed call to deferred exception
> test/tcg/ppc64le: test mtfsf
> target/ppc: ppc_store_fpscr doesn't update bits 0 to 28 and 52
>
> target/ppc/cpu.c | 2 +-
> target/ppc/cpu.h | 4 ++
> target/ppc/fpu_helper.c | 48 +++++++++++++++++++++++
> target/ppc/helper.h | 1 +
> target/ppc/translate/fp-impl.c.inc | 9 ++---
> tests/tcg/ppc64/Makefile.target | 1 +
> tests/tcg/ppc64le/Makefile.target | 1 +
> tests/tcg/ppc64le/mtfsf.c | 61 ++++++++++++++++++++++++++++++
> 8 files changed, 120 insertions(+), 7 deletions(-)
> create mode 100644 tests/tcg/ppc64le/mtfsf.c
>