Patchew URL: https://patchew.org/QEMU/20190819213755.26175-1-richard.henderson@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PATCH v2 00/68] target/arm: Convert aa32 base isa to decodetree
Message-id: 20190819213755.26175-1-richard.henderson@linaro.org
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
* [new tag] patchew/1566250936-14538-1-git-send-email-pc@us.ibm.com -> patchew/1566250936-14538-1-git-send-email-pc@us.ibm.com
* [new tag] patchew/20190819213755.26175-1-richard.henderson@linaro.org -> patchew/20190819213755.26175-1-richard.henderson@linaro.org
Submodule 'capstone' (https://git.qemu.org/git/capstone.git) registered for path 'capstone'
Submodule 'dtc' (https://git.qemu.org/git/dtc.git) registered for path 'dtc'
Submodule 'roms/QemuMacDrivers' (https://git.qemu.org/git/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers'
Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path 'roms/SLOF'
Submodule 'roms/edk2' (https://git.qemu.org/git/edk2.git) registered for path 'roms/edk2'
Submodule 'roms/ipxe' (https://git.qemu.org/git/ipxe.git) registered for path 'roms/ipxe'
Submodule 'roms/openbios' (https://git.qemu.org/git/openbios.git) registered for path 'roms/openbios'
Submodule 'roms/openhackware' (https://git.qemu.org/git/openhackware.git) registered for path 'roms/openhackware'
Submodule 'roms/opensbi' (https://git.qemu.org/git/opensbi.git) registered for path 'roms/opensbi'
Submodule 'roms/qemu-palcode' (https://git.qemu.org/git/qemu-palcode.git) registered for path 'roms/qemu-palcode'
Submodule 'roms/seabios' (https://git.qemu.org/git/seabios.git/) registered for path 'roms/seabios'
Submodule 'roms/seabios-hppa' (https://git.qemu.org/git/seabios-hppa.git) registered for path 'roms/seabios-hppa'
Submodule 'roms/sgabios' (https://git.qemu.org/git/sgabios.git) registered for path 'roms/sgabios'
Submodule 'roms/skiboot' (https://git.qemu.org/git/skiboot.git) registered for path 'roms/skiboot'
Submodule 'roms/u-boot' (https://git.qemu.org/git/u-boot.git) registered for path 'roms/u-boot'
Submodule 'roms/u-boot-sam460ex' (https://git.qemu.org/git/u-boot-sam460ex.git) registered for path 'roms/u-boot-sam460ex'
Submodule 'slirp' (https://git.qemu.org/git/libslirp.git) registered for path 'slirp'
Submodule 'tests/fp/berkeley-softfloat-3' (https://git.qemu.org/git/berkeley-softfloat-3.git) registered for path 'tests/fp/berkeley-softfloat-3'
Submodule 'tests/fp/berkeley-testfloat-3' (https://git.qemu.org/git/berkeley-testfloat-3.git) registered for path 'tests/fp/berkeley-testfloat-3'
Submodule 'ui/keycodemapdb' (https://git.qemu.org/git/keycodemapdb.git) registered for path 'ui/keycodemapdb'
Cloning into 'capstone'...
Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf'
Cloning into 'dtc'...
Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536'
Cloning into 'roms/QemuMacDrivers'...
Submodule path 'roms/QemuMacDrivers': checked out '90c488d5f4a407342247b9ea869df1c2d9c8e266'
Cloning into 'roms/SLOF'...
Submodule path 'roms/SLOF': checked out 'ba1ab360eebe6338bb8d7d83a9220ccf7e213af3'
Cloning into 'roms/edk2'...
Submodule path 'roms/edk2': checked out '20d2e5a125e34fc8501026613a71549b2a1a3e54'
Submodule 'SoftFloat' (https://github.com/ucb-bar/berkeley-softfloat-3.git) registered for path 'ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3'
Submodule 'CryptoPkg/Library/OpensslLib/openssl' (https://github.com/openssl/openssl) registered for path 'CryptoPkg/Library/OpensslLib/openssl'
Cloning into 'ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3'...
Submodule path 'roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037'
Cloning into 'CryptoPkg/Library/OpensslLib/openssl'...
Submodule path 'roms/edk2/CryptoPkg/Library/OpensslLib/openssl': checked out '50eaac9f3337667259de725451f201e784599687'
Submodule 'boringssl' (https://boringssl.googlesource.com/boringssl) registered for path 'boringssl'
Submodule 'krb5' (https://github.com/krb5/krb5) registered for path 'krb5'
Submodule 'pyca.cryptography' (https://github.com/pyca/cryptography.git) registered for path 'pyca-cryptography'
Cloning into 'boringssl'...
Submodule path 'roms/edk2/CryptoPkg/Library/OpensslLib/openssl/boringssl': checked out '2070f8ad9151dc8f3a73bffaa146b5e6937a583f'
Cloning into 'krb5'...
Submodule path 'roms/edk2/CryptoPkg/Library/OpensslLib/openssl/krb5': checked out 'b9ad6c49505c96a088326b62a52568e3484f2168'
Cloning into 'pyca-cryptography'...
Submodule path 'roms/edk2/CryptoPkg/Library/OpensslLib/openssl/pyca-cryptography': checked out '09403100de2f6f1cdd0d484dcb8e620f1c335c8f'
Cloning into 'roms/ipxe'...
Submodule path 'roms/ipxe': checked out 'de4565cbe76ea9f7913a01f331be3ee901bb6e17'
Cloning into 'roms/openbios'...
Submodule path 'roms/openbios': checked out 'c79e0ecb84f4f1ee3f73f521622e264edd1bf174'
Cloning into 'roms/openhackware'...
Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5'
Cloning into 'roms/opensbi'...
Submodule path 'roms/opensbi': checked out 'ce228ee0919deb9957192d723eecc8aaae2697c6'
Cloning into 'roms/qemu-palcode'...
Submodule path 'roms/qemu-palcode': checked out 'bf0e13698872450164fa7040da36a95d2d4b326f'
Cloning into 'roms/seabios'...
Submodule path 'roms/seabios': checked out 'a5cab58e9a3fb6e168aba919c5669bea406573b4'
Cloning into 'roms/seabios-hppa'...
Submodule path 'roms/seabios-hppa': checked out '0f4fe84658165e96ce35870fd19fc634e182e77b'
Cloning into 'roms/sgabios'...
Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a'
Cloning into 'roms/skiboot'...
Submodule path 'roms/skiboot': checked out '261ca8e779e5138869a45f174caa49be6a274501'
Cloning into 'roms/u-boot'...
Submodule path 'roms/u-boot': checked out 'd3689267f92c5956e09cc7d1baa4700141662bff'
Cloning into 'roms/u-boot-sam460ex'...
Submodule path 'roms/u-boot-sam460ex': checked out '60b3916f33e617a815973c5a6df77055b2e3a588'
Cloning into 'slirp'...
Submodule path 'slirp': checked out '126c04acbabd7ad32c2b018fe10dfac2a3bc1210'
Cloning into 'tests/fp/berkeley-softfloat-3'...
Submodule path 'tests/fp/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037'
Cloning into 'tests/fp/berkeley-testfloat-3'...
Submodule path 'tests/fp/berkeley-testfloat-3': checked out '5a59dcec19327396a011a17fd924aed4fec416b3'
Cloning into 'ui/keycodemapdb'...
Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce'
Switched to a new branch 'test'
9cf741a target/arm: Inline gen_bx_im into callers
48b4783 target/arm: Clean up disas_thumb_insn
7b817ae target/arm: Convert T16, long branches
be5cc1e target/arm: Convert T16, Unconditional branch
d0e5bff target/arm: Convert T16, load (literal)
18fbe28 target/arm: Convert T16, shift immediate
ac5fdeb target/arm: Convert T16, Miscellaneous 16-bit instructions
752250c target/arm: Convert T16, Conditional branches, Supervisor call
e29bafe target/arm: Convert T16, push and pop
e315fe9 target/arm: Split gen_nop_hint
cd70a86 target/arm: Convert T16, nop hints
f4692b2 target/arm: Convert T16, Reverse bytes
61236b9 target/arm: Convert T16, Change processor state
ed3f6de target/arm: Convert T16, extract
f29293e target/arm: Convert T16 adjust sp (immediate)
8957151 target/arm: Convert T16 add, compare, move (two high registers)
c31fb9f target/arm: Convert T16 branch and exchange
baa4f77 target/arm: Convert T16 one low register and immediate
953d4a8 target/arm: Convert T16 add/sub (3 low, 2 low and imm)
6b6ba6d target/arm: Convert T16 load/store multiple
af5c568 target/arm: Convert T16 add pc/sp (immediate)
3485a62 target/arm: Convert T16 load/store (immediate offset)
021d99d target/arm: Convert T16 load/store (register offset)
1c43540 target/arm: Convert T16 data-processing (two low regs)
5248de9 target/arm: Add skeleton for T16 decodetree
b8934a8 target/arm: Simplify disas_arm_insn
97be8c9 target/arm: Simplify disas_thumb2_insn
8a7221f target/arm: Convert TT
8ea1bbd target/arm: Convert SG
33ba8c6 target/arm: Convert Table Branch
2920713 target/arm: Convert Unallocated memory hint
0b71bb8 target/arm: Convert PLI, PLD, PLDW
9dc3c44 target/arm: Convert SETEND
9dba58d target/arm: Convert CPS (privileged)
849c576 target/arm: Convert Clear-Exclusive, Barriers
9f903c8 target/arm: Convert RFE and SRS
55a56f8 target/arm: Convert SVC
dd741d7 target/arm: Convert B, BL, BLX (immediate)
49f2eb2 target/arm: Diagnose base == pc for LDM/STM
a199907 target/arm: Diagnose too few registers in list for LDM/STM
eb2381e target/arm: Diagnose writeback register in list for LDM for v7
fcc9efd target/arm: Convert LDM, STM
8860640 target/arm: Convert MOVW, MOVT
72b4fa1 target/arm: Convert Signed multiply, signed and unsigned divide
8bad224 target/arm: Convert Packing, unpacking, saturation, and reversal
381ac5a target/arm: Convert Parallel addition and subtraction
eb3dba6 target/arm: Convert USAD8, USADA8, SBFX, UBFX, BFC, BFI, UDF
9b55d25 target/arm: Convert Synchronization primitives
0aaff62 target/arm: Convert load/store (register, immediate, literal)
5c074d9 target/arm: Convert T32 ADDW/SUBW
b2d0f00 target/arm: Convert the rest of A32 Miscelaneous instructions
0bd507e target/arm: Convert ERET
ee6c1d6 target/arm: Convert CLZ
c59e7f9 target/arm: Convert BX, BXJ, BLX (register)
1f17d37 target/arm: Convert Cyclic Redundancy Check
916fd4b target/arm: Convert MRS/MSR (banked, register)
baced65 target/arm: Convert MSR (immediate) and hints
326fe75 target/arm: Simplify op_smlawx for SMLAW*
b2d6dee target/arm: Simplify op_smlaxxx for SMLAL*
80e1053 target/arm: Convert Halfword multiply and multiply accumulate
dc4468d target/arm: Convert Saturating addition and subtraction
11a5bba target/arm: Simplify UMAAL
6dd8f38 target/arm: Convert multiply and multiply accumulate
7c575ee target/arm: Convert Data Processing (immediate)
d6ba33d target/arm: Convert Data Processing (reg-shifted-reg)
8fc40a9 target/arm: Convert Data Processing (register)
8c7d323 target/arm: Add stubs for aa32 decodetree
801e81b target/arm: Use store_reg_from_load in thumb2 code
=== OUTPUT BEGIN ===
1/68 Checking commit 801e81bd71e1 (target/arm: Use store_reg_from_load in thumb2 code)
2/68 Checking commit 8c7d323e5aba (target/arm: Add stubs for aa32 decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#47:
new file mode 100644
total: 0 errors, 1 warnings, 154 lines checked
Patch 2/68 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
3/68 Checking commit 8fc40a991cc2 (target/arm: Convert Data Processing (register))
4/68 Checking commit d6ba33d677f1 (target/arm: Convert Data Processing (reg-shifted-reg))
5/68 Checking commit 7c575ee0c5a2 (target/arm: Convert Data Processing (immediate))
6/68 Checking commit 6dd8f38809ea (target/arm: Convert multiply and multiply accumulate)
7/68 Checking commit 11a5bbaa7270 (target/arm: Simplify UMAAL)
8/68 Checking commit dc4468de03df (target/arm: Convert Saturating addition and subtraction)
9/68 Checking commit 80e1053c2dc5 (target/arm: Convert Halfword multiply and multiply accumulate)
10/68 Checking commit b2d6deebb79e (target/arm: Simplify op_smlaxxx for SMLAL*)
11/68 Checking commit 326fe7534df3 (target/arm: Simplify op_smlawx for SMLAW*)
12/68 Checking commit baced6556f30 (target/arm: Convert MSR (immediate) and hints)
13/68 Checking commit 916fd4b661aa (target/arm: Convert MRS/MSR (banked, register))
14/68 Checking commit 1f17d372a938 (target/arm: Convert Cyclic Redundancy Check)
15/68 Checking commit c59e7f919c7f (target/arm: Convert BX, BXJ, BLX (register))
16/68 Checking commit ee6c1d6d1ab3 (target/arm: Convert CLZ)
17/68 Checking commit 0bd507e5ab5a (target/arm: Convert ERET)
18/68 Checking commit b2d0f0089317 (target/arm: Convert the rest of A32 Miscelaneous instructions)
19/68 Checking commit 5c074d972967 (target/arm: Convert T32 ADDW/SUBW)
20/68 Checking commit 0aaff624caab (target/arm: Convert load/store (register, immediate, literal))
21/68 Checking commit 9b55d2553aea (target/arm: Convert Synchronization primitives)
22/68 Checking commit eb3dba69aa52 (target/arm: Convert USAD8, USADA8, SBFX, UBFX, BFC, BFI, UDF)
23/68 Checking commit 381ac5acc82e (target/arm: Convert Parallel addition and subtraction)
24/68 Checking commit 8bad22410125 (target/arm: Convert Packing, unpacking, saturation, and reversal)
ERROR: trailing statements should be on next line
#785: FILE: target/arm/translate.c:11407:
+ case 1: gen_rev16(tmp, tmp); break;
ERROR: trailing statements should be on next line
#786: FILE: target/arm/translate.c:11408:
+ case 3: gen_revsh(tmp, tmp); break;
total: 2 errors, 0 warnings, 747 lines checked
Patch 24/68 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
25/68 Checking commit 72b4fa15489a (target/arm: Convert Signed multiply, signed and unsigned divide)
26/68 Checking commit 88606403e2ce (target/arm: Convert MOVW, MOVT)
27/68 Checking commit fcc9efd3a061 (target/arm: Convert LDM, STM)
28/68 Checking commit eb2381ee269a (target/arm: Diagnose writeback register in list for LDM for v7)
29/68 Checking commit a199907e898e (target/arm: Diagnose too few registers in list for LDM/STM)
30/68 Checking commit 49f2eb2d2d4d (target/arm: Diagnose base == pc for LDM/STM)
31/68 Checking commit dd741d7c790c (target/arm: Convert B, BL, BLX (immediate))
32/68 Checking commit 55a56f805281 (target/arm: Convert SVC)
33/68 Checking commit 9f903c8c5604 (target/arm: Convert RFE and SRS)
ERROR: trailing statements should be on next line
#73: FILE: target/arm/translate.c:9999:
+ case 0: offset = -4; break; /* DA */
ERROR: trailing statements should be on next line
#74: FILE: target/arm/translate.c:10000:
+ case 1: offset = 0; break; /* IA */
ERROR: trailing statements should be on next line
#75: FILE: target/arm/translate.c:10001:
+ case 2: offset = -8; break; /* DB */
ERROR: trailing statements should be on next line
#76: FILE: target/arm/translate.c:10002:
+ case 3: offset = 4; break; /* IB */
ERROR: trailing statements should be on next line
#92: FILE: target/arm/translate.c:10018:
+ case 0: offset = -8; break;
ERROR: trailing statements should be on next line
#93: FILE: target/arm/translate.c:10019:
+ case 1: offset = 4; break;
ERROR: trailing statements should be on next line
#94: FILE: target/arm/translate.c:10020:
+ case 2: offset = -4; break;
ERROR: trailing statements should be on next line
#95: FILE: target/arm/translate.c:10021:
+ case 3: offset = 0; break;
total: 8 errors, 0 warnings, 208 lines checked
Patch 33/68 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/68 Checking commit 849c57626cc8 (target/arm: Convert Clear-Exclusive, Barriers)
35/68 Checking commit 9dba58d26692 (target/arm: Convert CPS (privileged))
36/68 Checking commit 9dc3c44dc741 (target/arm: Convert SETEND)
37/68 Checking commit 0b71bb81cdf2 (target/arm: Convert PLI, PLD, PLDW)
38/68 Checking commit 29207130d718 (target/arm: Convert Unallocated memory hint)
39/68 Checking commit 33ba8c68a887 (target/arm: Convert Table Branch)
40/68 Checking commit 8ea1bbd5ed9e (target/arm: Convert SG)
41/68 Checking commit 8a7221f66032 (target/arm: Convert TT)
42/68 Checking commit 97be8c9402e5 (target/arm: Simplify disas_thumb2_insn)
43/68 Checking commit b8934a87aca7 (target/arm: Simplify disas_arm_insn)
44/68 Checking commit 5248de90136c (target/arm: Add skeleton for T16 decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#35:
new file mode 100644
total: 0 errors, 1 warnings, 56 lines checked
Patch 44/68 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
45/68 Checking commit 1c43540f3fd0 (target/arm: Convert T16 data-processing (two low regs))
46/68 Checking commit 021d99dee9c4 (target/arm: Convert T16 load/store (register offset))
47/68 Checking commit 3485a62d96cb (target/arm: Convert T16 load/store (immediate offset))
48/68 Checking commit af5c568d810c (target/arm: Convert T16 add pc/sp (immediate))
49/68 Checking commit 6b6ba6db2ec4 (target/arm: Convert T16 load/store multiple)
50/68 Checking commit 953d4a85187c (target/arm: Convert T16 add/sub (3 low, 2 low and imm))
51/68 Checking commit baa4f77d8d1b (target/arm: Convert T16 one low register and immediate)
52/68 Checking commit c31fb9f172bd (target/arm: Convert T16 branch and exchange)
53/68 Checking commit 8957151f9a14 (target/arm: Convert T16 add, compare, move (two high registers))
54/68 Checking commit f29293e6fee1 (target/arm: Convert T16 adjust sp (immediate))
55/68 Checking commit ed3f6de75abf (target/arm: Convert T16, extract)
56/68 Checking commit 61236b9a3417 (target/arm: Convert T16, Change processor state)
57/68 Checking commit f4692b20335e (target/arm: Convert T16, Reverse bytes)
58/68 Checking commit cd70a869429c (target/arm: Convert T16, nop hints)
59/68 Checking commit e315fe99052b (target/arm: Split gen_nop_hint)
60/68 Checking commit e29bafe84595 (target/arm: Convert T16, push and pop)
61/68 Checking commit 752250c8004b (target/arm: Convert T16, Conditional branches, Supervisor call)
62/68 Checking commit ac5fdeb19f19 (target/arm: Convert T16, Miscellaneous 16-bit instructions)
63/68 Checking commit 18fbe2887d2c (target/arm: Convert T16, shift immediate)
64/68 Checking commit d0e5bffdc383 (target/arm: Convert T16, load (literal))
65/68 Checking commit be5cc1e102e1 (target/arm: Convert T16, Unconditional branch)
66/68 Checking commit 7b817ae27a6c (target/arm: Convert T16, long branches)
67/68 Checking commit 48b478392f1e (target/arm: Clean up disas_thumb_insn)
68/68 Checking commit 9cf741a2a8c7 (target/arm: Inline gen_bx_im into callers)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190819213755.26175-1-richard.henderson@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com