Arm reference design Fixed Virtual Platforms (FVPs) such as the RD-N2
platform variants have multiple IO virtualization blocks that allow
connecting PCIe root bus or non-PCIe SoC peripherals to the system.
Each of these IO virtualization blocks consists of an Arm SMMUv3, a
GIC-ITS and a NCI (network chip interconnect).

SoC expansion blocks connect to the IO virtualization blocks via x4, x8
or x16 ports exposed by the system. A SoC expansion block implementation
includes 2 UARTs, 2 DMA devices and 2 Memory nodes.

In addition, Arm reference design platforms support Virtio-P9 device as
part of the Rest of System (RoS). The Virtio-P9 device implements a
subset of the Plan 9 file protocol over a virtio transport that enables
accessing a shared directory on the host's filesystem from a running
FVP platform.

This patch series adds SSDT tables for various RD-N2 platforms such as
RD-N2, RD-N2-Cfg1, and RD-N2-Cfg2 to describe the SoC expansion block
devices - UARTs, and DMAs and the Virtio-P9 devices present on the
platforms. The patches also add support for platform DXE driver to
initialize the UARTs that are present in SoC expansion blocks. By
default these UARTs are kept disabled and can be enabled with a Pcd -
PcdIoVirtSocExpBlkUartEnable.

This patch series is now a combination of two patch series [1] and [2]
that added Virtio-P9 support and SoC expansion block (non-discoverable)
IO block for RD-N2:
[edk2-platforms][PATCH V1 0/2] Enable Virtio-P9 on RD-N2 platforms
[edk2-platforms][PATCH V1 0/6] Add non-discoverable IO block for Rd-N2

[1] https://edk2.groups.io/g/devel/message/94936
[2] https://edk2.groups.io/g/devel/message/86646

Changes since v1:
 - Minor update to Virtio-P9 SSDT table:
   - Name of the DefinitionBlock() is set to SsdtRosVirtioP9.aml rather
     than SsdtRosVirtioP9Table.aml
 - Updates to SoC expansion block:
   - Removed IORT table for SoC expansion block and kept only the SSDT
     table for devices.
   - SSDT table now uses arithmetic operations to calculate the start
     and end addresses of the devices in QWordMemory() blocks.
   - The number of PCDs for UARTs and DMAs are now reduced as the
     addresses are now calculated within the SSDT table based on the
     SoC expansion block base address and device offsets.
   - Defined macros for Interrupt() block for various DMA nodes.
   - Removed the first patch of the series that added PCDs for SMMU:
     [PATCH V1 1/6] Platform/Sgi: add PCDs for SMMUv3 base address and interrupts
   - Added support for SoC expansion block on RD-N2-Cfg2 platform as
     well.

Shriram K (1):
  Platform/Sgi: Initialize additional UART controllers

Vivek Gautam (4):
  Platform/Sgi: Add SSDT table for Virtio-P9
  Platform/Sgi: Enable virtio-p9 device on RD-N2 platform variants
  Platform/Sgi: Add SSDT table for IO virtualization SoC expansion block
  Platform/Sgi: Enable SoC expansion block for RD-N2 variants

 Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc                |  12 +-
 Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf        |  15 +-
 Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf    |  15 +-
 Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf    |  11 +-
 Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf  |  10 +-
 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf  |   7 +-
 Platform/ARM/SgiPkg/Include/IoVirtSoCExp.h               | 189 ++++++++++++++++++++
 Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c    |  64 ++++++-
 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c |  43 ++++-
 Platform/ARM/SgiPkg/AcpiTables/SsdtIoVirtSocExp.asl      |  96 ++++++++++
 Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl       |  42 +++++
 Platform/ARM/SgiPkg/SgiPlatform.dec                      |  13 +-
 12 files changed, 503 insertions(+), 14 deletions(-)
 create mode 100644 Platform/ARM/SgiPkg/Include/IoVirtSoCExp.h
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/SsdtIoVirtSocExp.asl
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl

-- 
2.25.1



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Hello Vivek,

On 1/27/23 10:23, Vivek Gautam wrote:
> Arm reference design Fixed Virtual Platforms (FVPs) such as the RD-N2
> platform variants have multiple IO virtualization blocks that allow
> connecting PCIe root bus or non-PCIe SoC peripherals to the system.
> Each of these IO virtualization blocks consists of an Arm SMMUv3, a
> GIC-ITS and a NCI (network chip interconnect).
> 
> SoC expansion blocks connect to the IO virtualization blocks via x4, x8
> or x16 ports exposed by the system. A SoC expansion block implementation
> includes 2 UARTs, 2 DMA devices and 2 Memory nodes.
> 
> In addition, Arm reference design platforms support Virtio-P9 device as
> part of the Rest of System (RoS). The Virtio-P9 device implements a
> subset of the Plan 9 file protocol over a virtio transport that enables
> accessing a shared directory on the host's filesystem from a running
> FVP platform.
> 
> This patch series adds SSDT tables for various RD-N2 platforms such as
> RD-N2, RD-N2-Cfg1, and RD-N2-Cfg2 to describe the SoC expansion block
> devices - UARTs, and DMAs and the Virtio-P9 devices present on the
> platforms. The patches also add support for platform DXE driver to
> initialize the UARTs that are present in SoC expansion blocks. By
> default these UARTs are kept disabled and can be enabled with a Pcd -
> PcdIoVirtSocExpBlkUartEnable.
> 
> This patch series is now a combination of two patch series [1] and [2]
> that added Virtio-P9 support and SoC expansion block (non-discoverable)
> IO block for RD-N2:
> [edk2-platforms][PATCH V1 0/2] Enable Virtio-P9 on RD-N2 platforms
> [edk2-platforms][PATCH V1 0/6] Add non-discoverable IO block for Rd-N2
> 
> [1] https://edk2.groups.io/g/devel/message/94936
> [2] https://edk2.groups.io/g/devel/message/86646
> 
> Changes since v1:
>   - Minor update to Virtio-P9 SSDT table:
>     - Name of the DefinitionBlock() is set to SsdtRosVirtioP9.aml rather
>       than SsdtRosVirtioP9Table.aml
>   - Updates to SoC expansion block:
>     - Removed IORT table for SoC expansion block and kept only the SSDT
>       table for devices.

Is it possible to know why the IORT table was removed ?

>     - SSDT table now uses arithmetic operations to calculate the start
>       and end addresses of the devices in QWordMemory() blocks.
>     - The number of PCDs for UARTs and DMAs are now reduced as the
>       addresses are now calculated within the SSDT table based on the
>       SoC expansion block base address and device offsets.
>     - Defined macros for Interrupt() block for various DMA nodes.
>     - Removed the first patch of the series that added PCDs for SMMU:
>       [PATCH V1 1/6] Platform/Sgi: add PCDs for SMMUv3 base address and interrupts
>     - Added support for SoC expansion block on RD-N2-Cfg2 platform as
>       well.
> 
> Shriram K (1):
>    Platform/Sgi: Initialize additional UART controllers
> 
> Vivek Gautam (4):
>    Platform/Sgi: Add SSDT table for Virtio-P9
>    Platform/Sgi: Enable virtio-p9 device on RD-N2 platform variants
>    Platform/Sgi: Add SSDT table for IO virtualization SoC expansion block
>    Platform/Sgi: Enable SoC expansion block for RD-N2 variants

For the Virtio-P9 patches:
- Platform/Sgi: Add SSDT table for Virtio-P9
- Platform/Sgi: Enable virtio-p9 device on RD-N2 platform variants
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
I had some questions for the other patches.

Regards,
Pierre

> 
>   Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc                |  12 +-
>   Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf        |  15 +-
>   Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf    |  15 +-
>   Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf    |  11 +-
>   Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf  |  10 +-
>   Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf  |   7 +-
>   Platform/ARM/SgiPkg/Include/IoVirtSoCExp.h               | 189 ++++++++++++++++++++
>   Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c    |  64 ++++++-
>   Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c |  43 ++++-
>   Platform/ARM/SgiPkg/AcpiTables/SsdtIoVirtSocExp.asl      |  96 ++++++++++
>   Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl       |  42 +++++
>   Platform/ARM/SgiPkg/SgiPlatform.dec                      |  13 +-
>   12 files changed, 503 insertions(+), 14 deletions(-)
>   create mode 100644 Platform/ARM/SgiPkg/Include/IoVirtSoCExp.h
>   create mode 100644 Platform/ARM/SgiPkg/AcpiTables/SsdtIoVirtSocExp.asl
>   create mode 100644 Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl
> 


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Hi Pierre,


On 2/3/23 21:28, Pierre Gondois wrote:
> Hello Vivek,
> 
> On 1/27/23 10:23, Vivek Gautam wrote:
>> Arm reference design Fixed Virtual Platforms (FVPs) such as the RD-N2
>> platform variants have multiple IO virtualization blocks that allow
>> connecting PCIe root bus or non-PCIe SoC peripherals to the system.
>> Each of these IO virtualization blocks consists of an Arm SMMUv3, a
>> GIC-ITS and a NCI (network chip interconnect).
>>
>> SoC expansion blocks connect to the IO virtualization blocks via x4, x8
>> or x16 ports exposed by the system. A SoC expansion block implementation
>> includes 2 UARTs, 2 DMA devices and 2 Memory nodes.
>>
>> In addition, Arm reference design platforms support Virtio-P9 device as
>> part of the Rest of System (RoS). The Virtio-P9 device implements a
>> subset of the Plan 9 file protocol over a virtio transport that enables
>> accessing a shared directory on the host's filesystem from a running
>> FVP platform.
>>
>> This patch series adds SSDT tables for various RD-N2 platforms such as
>> RD-N2, RD-N2-Cfg1, and RD-N2-Cfg2 to describe the SoC expansion block
>> devices - UARTs, and DMAs and the Virtio-P9 devices present on the
>> platforms. The patches also add support for platform DXE driver to
>> initialize the UARTs that are present in SoC expansion blocks. By
>> default these UARTs are kept disabled and can be enabled with a Pcd -
>> PcdIoVirtSocExpBlkUartEnable.
>>
>> This patch series is now a combination of two patch series [1] and [2]
>> that added Virtio-P9 support and SoC expansion block (non-discoverable)
>> IO block for RD-N2:
>> [edk2-platforms][PATCH V1 0/2] Enable Virtio-P9 on RD-N2 platforms
>> [edk2-platforms][PATCH V1 0/6] Add non-discoverable IO block for Rd-N2
>>
>> [1] https://edk2.groups.io/g/devel/message/94936
>> [2] https://edk2.groups.io/g/devel/message/86646
>>
>> Changes since v1:
>>   - Minor update to Virtio-P9 SSDT table:
>>     - Name of the DefinitionBlock() is set to SsdtRosVirtioP9.aml rather
>>       than SsdtRosVirtioP9Table.aml
>>   - Updates to SoC expansion block:
>>     - Removed IORT table for SoC expansion block and kept only the SSDT
>>       table for devices.
> 
> Is it possible to know why the IORT table was removed ?

The IORT table is removed as that will come along with the common IORT 
table changes that includes all the GIT ITS nodes, SMMUv3 nodes, PCIe 
RCs, and the Named Component nodes for DMA PL330 devices.
I will update this in the cover letter.

> 
>>     - SSDT table now uses arithmetic operations to calculate the start
>>       and end addresses of the devices in QWordMemory() blocks.
>>     - The number of PCDs for UARTs and DMAs are now reduced as the
>>       addresses are now calculated within the SSDT table based on the
>>       SoC expansion block base address and device offsets.
>>     - Defined macros for Interrupt() block for various DMA nodes.
>>     - Removed the first patch of the series that added PCDs for SMMU:
>>       [PATCH V1 1/6] Platform/Sgi: add PCDs for SMMUv3 base address 
>> and interrupts
>>     - Added support for SoC expansion block on RD-N2-Cfg2 platform as
>>       well.
>>
>> Shriram K (1):
>>    Platform/Sgi: Initialize additional UART controllers
>>
>> Vivek Gautam (4):
>>    Platform/Sgi: Add SSDT table for Virtio-P9
>>    Platform/Sgi: Enable virtio-p9 device on RD-N2 platform variants
>>    Platform/Sgi: Add SSDT table for IO virtualization SoC expansion block
>>    Platform/Sgi: Enable SoC expansion block for RD-N2 variants
> 
> For the Virtio-P9 patches:
> - Platform/Sgi: Add SSDT table for Virtio-P9
> - Platform/Sgi: Enable virtio-p9 device on RD-N2 platform variants
> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
> I had some questions for the other patches.

Thanks for your review. I will rework the other patches and re-post them.

Best regards
Vivek

> 
> Regards,
> Pierre
> 
>>
>>   Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc                |  12 +-
>>   Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf        |  15 +-
>>   Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf    |  15 +-
>>   Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf    |  11 +-
>>   Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf  |  10 +-
>>   Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf  |   7 +-
>>   Platform/ARM/SgiPkg/Include/IoVirtSoCExp.h               | 189 
>> ++++++++++++++++++++
>>   Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c    |  64 ++++++-
>>   Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c |  43 ++++-
>>   Platform/ARM/SgiPkg/AcpiTables/SsdtIoVirtSocExp.asl      |  96 
>> ++++++++++
>>   Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl       |  42 +++++
>>   Platform/ARM/SgiPkg/SgiPlatform.dec                      |  13 +-
>>   12 files changed, 503 insertions(+), 14 deletions(-)
>>   create mode 100644 Platform/ARM/SgiPkg/Include/IoVirtSoCExp.h
>>   create mode 100644 Platform/ARM/SgiPkg/AcpiTables/SsdtIoVirtSocExp.asl
>>   create mode 100644 Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl
>>


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