Arm reference design Fixed Virtual Platforms (FVPs) such as the RD-N2
platform variants have multiple IO virtualization blocks that allow
connecting PCIe root bus or non-PCIe SoC peripherals to the system.
Each of these IO virtualization blocks consists of an Arm SMMUv3, a
GIC-ITS and a NCI (network chip interconnect).

SoC expansion blocks connect to the IO virtualization blocks via x4, x8
or x16 ports exposed by the system. A SoC expansion block implementation
includes 2 UARTs, 2 DMA devices and 2 Memory nodes.

In addition, Arm reference design platforms support Virtio-P9 device as
part of the Rest of System (RoS). The Virtio-P9 device implements a
subset of the Plan 9 file protocol over a virtio transport that enables
accessing a shared directory on the host's filesystem from a running
FVP platform.

This patch series adds SSDT tables for various RD-N2 platforms such as
RD-N2, RD-N2-Cfg1, and RD-N2-Cfg2 to describe the SoC expansion block
devices - UARTs, and DMAs and the Virtio-P9 devices present on the
platforms. The patches also add support for platform DXE driver to
initialize the UARTs that are present in SoC expansion blocks. By
default these UARTs are kept disabled and can be enabled with a Pcd -
PcdIoVirtSocExpBlkUartEnable.

This patch series is now a combination of two patch series [1] and [2]
that added Virtio-P9 support and SoC expansion block (non-discoverable)
IO block for RD-N2:
[edk2-platforms][PATCH V1 0/2] Enable Virtio-P9 on RD-N2 platforms
[edk2-platforms][PATCH V1 0/6] Add non-discoverable IO block for Rd-N2

[1] https://edk2.groups.io/g/devel/message/94936
[2] https://edk2.groups.io/g/devel/message/86646

Changes since v2:
 - Updates to SoC expansion block patches:
   - Replaced PcdIoVirtSocExpBlkPeriOffset and PcdIoVirtSocExpBlkResourceSize
     PCDs with corresponding macros.
   - Updated SSDT table to add definitions at build time with #if macro for PCD
     for chip count rather than checking at run time with LGreater() method.
   - Fixed the comments at multiple places as suggested.
 - Updates to Virtio-P9 patches:
   - Added Reviewed-by tag given by Pierre. Thanks for his review.

Changes since v1:
 - Minor update to Virtio-P9 SSDT table:
   - Name of the DefinitionBlock() is set to SsdtRosVirtioP9.aml rather
     than SsdtRosVirtioP9Table.aml
 - Updates to SoC expansion block patches:
   - Removed IORT table for SoC expansion block and kept only the SSDT
     table for devices as the IORT table changes will come later as part
     of a different series.
   - SSDT table now uses arithmetic operations to calculate the start
     and end addresses of the devices in QWordMemory() blocks.
   - The number of PCDs for UARTs and DMAs are now reduced as the
     addresses are now calculated within the SSDT table based on the
     SoC expansion block base address and device offsets.
   - Defined macros for Interrupt() block for various DMA nodes.
   - Removed the first patch of the series that added PCDs for SMMU:
     [PATCH V1 1/6] Platform/Sgi: add PCDs for SMMUv3 base address and interrupts
   - Added support for SoC expansion block on RD-N2-Cfg2 platform as
     well.

Shriram K (1):
  Platform/Sgi: Initialize additional UART controllers

Vivek Gautam (4):
  Platform/Sgi: Add SSDT table for Virtio-P9
  Platform/Sgi: Enable virtio-p9 device on RD-N2 platform variants
  Platform/Sgi: Add SSDT table for IO virtualization SoC expansion block
  Platform/Sgi: Enable SoC expansion block for RD-N2 variants

 Platform/ARM/SgiPkg/SgiPlatform.dec                      |  11 +-
 Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc                |  10 +-
 Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf        |  13 +-
 Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf    |  13 +-
 Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf    |   9 +-
 Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf  |   9 +-
 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf  |   6 +-
 Platform/ARM/SgiPkg/Include/IoVirtSoCExp.h               | 188 ++++++++++++++++++++
 Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c    |  64 ++++++-
 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c |  44 ++++-
 Platform/ARM/SgiPkg/AcpiTables/SsdtIoVirtSocExp.asl      |  96 ++++++++++
 Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl       |  42 +++++
 12 files changed, 491 insertions(+), 14 deletions(-)
 create mode 100644 Platform/ARM/SgiPkg/Include/IoVirtSoCExp.h
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/SsdtIoVirtSocExp.asl
 create mode 100644 Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl

-- 
2.25.1



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Hello Vivek,
Thanks for the new version,

Reviewed-by: Pierre Gondois: <pierre.gondois@arm.com>

On 3/24/23 12:02, Vivek Gautam wrote:
> Arm reference design Fixed Virtual Platforms (FVPs) such as the RD-N2
> platform variants have multiple IO virtualization blocks that allow
> connecting PCIe root bus or non-PCIe SoC peripherals to the system.
> Each of these IO virtualization blocks consists of an Arm SMMUv3, a
> GIC-ITS and a NCI (network chip interconnect).
> 
> SoC expansion blocks connect to the IO virtualization blocks via x4, x8
> or x16 ports exposed by the system. A SoC expansion block implementation
> includes 2 UARTs, 2 DMA devices and 2 Memory nodes.
> 
> In addition, Arm reference design platforms support Virtio-P9 device as
> part of the Rest of System (RoS). The Virtio-P9 device implements a
> subset of the Plan 9 file protocol over a virtio transport that enables
> accessing a shared directory on the host's filesystem from a running
> FVP platform.
> 
> This patch series adds SSDT tables for various RD-N2 platforms such as
> RD-N2, RD-N2-Cfg1, and RD-N2-Cfg2 to describe the SoC expansion block
> devices - UARTs, and DMAs and the Virtio-P9 devices present on the
> platforms. The patches also add support for platform DXE driver to
> initialize the UARTs that are present in SoC expansion blocks. By
> default these UARTs are kept disabled and can be enabled with a Pcd -
> PcdIoVirtSocExpBlkUartEnable.
> 
> This patch series is now a combination of two patch series [1] and [2]
> that added Virtio-P9 support and SoC expansion block (non-discoverable)
> IO block for RD-N2:
> [edk2-platforms][PATCH V1 0/2] Enable Virtio-P9 on RD-N2 platforms
> [edk2-platforms][PATCH V1 0/6] Add non-discoverable IO block for Rd-N2
> 
> [1] https://edk2.groups.io/g/devel/message/94936
> [2] https://edk2.groups.io/g/devel/message/86646
> 
> Changes since v2:
>   - Updates to SoC expansion block patches:
>     - Replaced PcdIoVirtSocExpBlkPeriOffset and PcdIoVirtSocExpBlkResourceSize
>       PCDs with corresponding macros.
>     - Updated SSDT table to add definitions at build time with #if macro for PCD
>       for chip count rather than checking at run time with LGreater() method.
>     - Fixed the comments at multiple places as suggested.
>   - Updates to Virtio-P9 patches:
>     - Added Reviewed-by tag given by Pierre. Thanks for his review.
> 
> Changes since v1:
>   - Minor update to Virtio-P9 SSDT table:
>     - Name of the DefinitionBlock() is set to SsdtRosVirtioP9.aml rather
>       than SsdtRosVirtioP9Table.aml
>   - Updates to SoC expansion block patches:
>     - Removed IORT table for SoC expansion block and kept only the SSDT
>       table for devices as the IORT table changes will come later as part
>       of a different series.
>     - SSDT table now uses arithmetic operations to calculate the start
>       and end addresses of the devices in QWordMemory() blocks.
>     - The number of PCDs for UARTs and DMAs are now reduced as the
>       addresses are now calculated within the SSDT table based on the
>       SoC expansion block base address and device offsets.
>     - Defined macros for Interrupt() block for various DMA nodes.
>     - Removed the first patch of the series that added PCDs for SMMU:
>       [PATCH V1 1/6] Platform/Sgi: add PCDs for SMMUv3 base address and interrupts
>     - Added support for SoC expansion block on RD-N2-Cfg2 platform as
>       well.
> 
> Shriram K (1):
>    Platform/Sgi: Initialize additional UART controllers
> 
> Vivek Gautam (4):
>    Platform/Sgi: Add SSDT table for Virtio-P9
>    Platform/Sgi: Enable virtio-p9 device on RD-N2 platform variants
>    Platform/Sgi: Add SSDT table for IO virtualization SoC expansion block
>    Platform/Sgi: Enable SoC expansion block for RD-N2 variants
> 
>   Platform/ARM/SgiPkg/SgiPlatform.dec                      |  11 +-
>   Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc                |  10 +-
>   Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf        |  13 +-
>   Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf    |  13 +-
>   Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf    |   9 +-
>   Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf  |   9 +-
>   Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf  |   6 +-
>   Platform/ARM/SgiPkg/Include/IoVirtSoCExp.h               | 188 ++++++++++++++++++++
>   Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c    |  64 ++++++-
>   Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c |  44 ++++-
>   Platform/ARM/SgiPkg/AcpiTables/SsdtIoVirtSocExp.asl      |  96 ++++++++++
>   Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl       |  42 +++++
>   12 files changed, 491 insertions(+), 14 deletions(-)
>   create mode 100644 Platform/ARM/SgiPkg/Include/IoVirtSoCExp.h
>   create mode 100644 Platform/ARM/SgiPkg/AcpiTables/SsdtIoVirtSocExp.asl
>   create mode 100644 Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl
> 


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Hi Pierre,


On 3/30/23 15:16, Pierre Gondois wrote:
> Hello Vivek,
> Thanks for the new version,
> 
> Reviewed-by: Pierre Gondois: <pierre.gondois@arm.com>

Thanks a lot for your review.

Best regards
Vivek

[snip]


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Merged as 8758130fdbbb..0ed7b18b92e4

Thanks.

Regards,

Sami Mujawar

On 24/03/2023 11:02 am, Vivek Gautam wrote:
> Arm reference design Fixed Virtual Platforms (FVPs) such as the RD-N2
> platform variants have multiple IO virtualization blocks that allow
> connecting PCIe root bus or non-PCIe SoC peripherals to the system.
> Each of these IO virtualization blocks consists of an Arm SMMUv3, a
> GIC-ITS and a NCI (network chip interconnect).
>
> SoC expansion blocks connect to the IO virtualization blocks via x4, x8
> or x16 ports exposed by the system. A SoC expansion block implementation
> includes 2 UARTs, 2 DMA devices and 2 Memory nodes.
>
> In addition, Arm reference design platforms support Virtio-P9 device as
> part of the Rest of System (RoS). The Virtio-P9 device implements a
> subset of the Plan 9 file protocol over a virtio transport that enables
> accessing a shared directory on the host's filesystem from a running
> FVP platform.
>
> This patch series adds SSDT tables for various RD-N2 platforms such as
> RD-N2, RD-N2-Cfg1, and RD-N2-Cfg2 to describe the SoC expansion block
> devices - UARTs, and DMAs and the Virtio-P9 devices present on the
> platforms. The patches also add support for platform DXE driver to
> initialize the UARTs that are present in SoC expansion blocks. By
> default these UARTs are kept disabled and can be enabled with a Pcd -
> PcdIoVirtSocExpBlkUartEnable.
>
> This patch series is now a combination of two patch series [1] and [2]
> that added Virtio-P9 support and SoC expansion block (non-discoverable)
> IO block for RD-N2:
> [edk2-platforms][PATCH V1 0/2] Enable Virtio-P9 on RD-N2 platforms
> [edk2-platforms][PATCH V1 0/6] Add non-discoverable IO block for Rd-N2
>
> [1] https://edk2.groups.io/g/devel/message/94936
> [2] https://edk2.groups.io/g/devel/message/86646
>
> Changes since v2:
>   - Updates to SoC expansion block patches:
>     - Replaced PcdIoVirtSocExpBlkPeriOffset and PcdIoVirtSocExpBlkResourceSize
>       PCDs with corresponding macros.
>     - Updated SSDT table to add definitions at build time with #if macro for PCD
>       for chip count rather than checking at run time with LGreater() method.
>     - Fixed the comments at multiple places as suggested.
>   - Updates to Virtio-P9 patches:
>     - Added Reviewed-by tag given by Pierre. Thanks for his review.
>
> Changes since v1:
>   - Minor update to Virtio-P9 SSDT table:
>     - Name of the DefinitionBlock() is set to SsdtRosVirtioP9.aml rather
>       than SsdtRosVirtioP9Table.aml
>   - Updates to SoC expansion block patches:
>     - Removed IORT table for SoC expansion block and kept only the SSDT
>       table for devices as the IORT table changes will come later as part
>       of a different series.
>     - SSDT table now uses arithmetic operations to calculate the start
>       and end addresses of the devices in QWordMemory() blocks.
>     - The number of PCDs for UARTs and DMAs are now reduced as the
>       addresses are now calculated within the SSDT table based on the
>       SoC expansion block base address and device offsets.
>     - Defined macros for Interrupt() block for various DMA nodes.
>     - Removed the first patch of the series that added PCDs for SMMU:
>       [PATCH V1 1/6] Platform/Sgi: add PCDs for SMMUv3 base address and interrupts
>     - Added support for SoC expansion block on RD-N2-Cfg2 platform as
>       well.
>
> Shriram K (1):
>    Platform/Sgi: Initialize additional UART controllers
>
> Vivek Gautam (4):
>    Platform/Sgi: Add SSDT table for Virtio-P9
>    Platform/Sgi: Enable virtio-p9 device on RD-N2 platform variants
>    Platform/Sgi: Add SSDT table for IO virtualization SoC expansion block
>    Platform/Sgi: Enable SoC expansion block for RD-N2 variants
>
>   Platform/ARM/SgiPkg/SgiPlatform.dec                      |  11 +-
>   Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc                |  10 +-
>   Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf        |  13 +-
>   Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf    |  13 +-
>   Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf    |   9 +-
>   Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf  |   9 +-
>   Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf  |   6 +-
>   Platform/ARM/SgiPkg/Include/IoVirtSoCExp.h               | 188 ++++++++++++++++++++
>   Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c    |  64 ++++++-
>   Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c |  44 ++++-
>   Platform/ARM/SgiPkg/AcpiTables/SsdtIoVirtSocExp.asl      |  96 ++++++++++
>   Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl       |  42 +++++
>   12 files changed, 491 insertions(+), 14 deletions(-)
>   create mode 100644 Platform/ARM/SgiPkg/Include/IoVirtSoCExp.h
>   create mode 100644 Platform/ARM/SgiPkg/AcpiTables/SsdtIoVirtSocExp.asl
>   create mode 100644 Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl
>


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