From nobody Fri May 17 00:25:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+99131+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99131+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1674811430; cv=none; d=zohomail.com; s=zohoarc; b=mHeLaCgzdh/zskvSl0jFpnvokXoiUwXLEqBUKtEwephzU3/BTdTa3pmTHGXzzhelZUrxRpCjwsaXJeyqLE92D/jerbdIo2OliyL21/UahaDsjZJ0N4dnSrQubqlnTAuWJoYZ4506u66beImUOIXW7qm9ztYbTYVPMMzFDWolb4Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1674811430; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=YeTIFPW4QYr69M0iqDAu0yZOhzjXK7VFG7QvL37rKpo=; b=eMkaUF0Ssr3oiNEmnZvuCLK1bt6G5kDxT2noh+eeLIcS5ND8A/287HGGu3MSTEQul6ct0rnvNZxQM1if+VBP6HLrQzY7rzO1Hu2H8RqMxmmWJbWJaXMYPR2kthZuK/gIG7M4ycBg0CAmyxYgJoUlli765/iPFcDkJJWwjZXOijQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99131+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1674811430104432.1980121141602; Fri, 27 Jan 2023 01:23:50 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id jXX1YY1788612xoE7eu6oTvH; Fri, 27 Jan 2023 01:23:49 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.98510.1674811428933234252 for ; Fri, 27 Jan 2023 01:23:49 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5C0D02F; Fri, 27 Jan 2023 01:24:30 -0800 (PST) X-Received: from usa.arm.com (a077843.arm.com [10.162.43.190]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 3F8A93F64C; Fri, 27 Jan 2023 01:23:46 -0800 (PST) From: "Vivek Kumar Gautam" To: devel@edk2.groups.io Cc: ardb+tianocore@kernel.org, leif@nuviainc.com, Sami.Mujawar@arm.com, Pierre.Gondois@arm.com, Vivek.Gautam@arm.com Subject: [edk2-devel] [edk2-platforms][PATCH V2 1/5] Platform/Sgi: Add SSDT table for Virtio-P9 Date: Fri, 27 Jan 2023 14:53:34 +0530 Message-Id: <20230127092338.72056-2-vivek.gautam@arm.com> In-Reply-To: <20230127092338.72056-1-vivek.gautam@arm.com> References: <20230127092338.72056-1-vivek.gautam@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,vivek.gautam@arm.com X-Gm-Message-State: V5dHb2lpDQTwa8tvKxXU2q8Zx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1674811429; bh=CZYIa2gknDSrDQ7KVrQgZ0isjbTQOO7TGsvHJOL5Y98=; h=Cc:Date:From:Reply-To:Subject:To; b=lBtcUjC4P7XWlNbe8+2Oc8Occf++Z9nrFwsyunkOCSXsjjFUiQlshx8U7HJu5OUWBih RE+SqB2osiQoLkFBaEpi/b5XsZe3fdtxeMmLAtYKutNgJ8RWS26+c1U9xTeL8tDa+ZcYc QSbOFkUXeuL849c78GDw4+XT538zStEnRI0= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1674811430727100005 Content-Type: text/plain; charset="utf-8" Some of the Arm reference design FVP platforms support the Virtio-p9 device as part of the RoS subsystem. Add an entry for this device in the SSDT acpi table. The device entry is listed in a new SSDT file as only some of the reference design FVP platforms support it and so this file is included in the build for only the platforms that support Virtio-P9 device. Signed-off-by: Vivek Gautam Reviewed-by: Pierre Gondois --- Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc | 7 +++- Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl | 42 ++++++++++++++++++= ++ Platform/ARM/SgiPkg/SgiPlatform.dec | 7 +++- 3 files changed, 54 insertions(+), 2 deletions(-) diff --git a/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc b/Platform/ARM/SgiPk= g/SgiMemoryMap2.dsc.inc index 78ee48e354a8..12dcd82eb132 100644 --- a/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc @@ -1,5 +1,5 @@ # -# Copyright (c) 2020 - 2022, Arm Limited. All rights reserved. +# Copyright (c) 2020 - 2023, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -38,6 +38,11 @@ gArmSgiTokenSpaceGuid.PcdVirtioNetBaseAddress|0x0C150000 gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt|460 =20 + # Virtio P9 + gArmSgiTokenSpaceGuid.PcdVirtioP9BaseAddress|0x0C190000 + gArmSgiTokenSpaceGuid.PcdVirtioP9Size|0x10000 + gArmSgiTokenSpaceGuid.PcdVirtioP9Interrupt|459 + # PCIe gArmTokenSpaceGuid.PcdPciMmio32Base|0x60000000 gArmTokenSpaceGuid.PcdPciMmio32Size|0x10000000 diff --git a/Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl b/Platform/= ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl new file mode 100644 index 000000000000..a1aab5e094b3 --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl @@ -0,0 +1,42 @@ +/** @file +* Secondary System Description Table Fields (SSDT) for Virtio-P9 device. +* +* Some of the Arm Reference Design FVP platforms support the Virtio-P9 dev= ice +* as part of the RoS subsystem. The Virtio-P9 device implements a subset o= f the +* Plan 9 file protocol over a virtio transport. It enables accessing a sha= red +* directory on the host's filesystem from a running FVP platform. +* This file describes the SSDT entry for this Virtio-P9 device +* +* Copyright (c) 2023, Arm Ltd. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +* @par Specification Reference: +* - ACPI 6.4, Chapter 5, Section 5.2.11.2, Secondary System Description = Table +**/ + +#include "SgiAcpiHeader.h" +#include "SgiPlatform.h" + +DefinitionBlock ("SsdtRosVirtioP9.aml", "SSDT", 2, "ARMLTD", "ARMSGI", + EFI_ACPI_ARM_OEM_REVISION) { + Scope (_SB) { + // VIRTIO P9 device + Device (VP90) { + Name (_HID, "LNRO0005") + Name (_UID, 2) + Name (_CCA, 1) // mark the device coherent + + Name (_CRS, ResourceTemplate() { + Memory32Fixed ( + ReadWrite, + FixedPcdGet32 (PcdVirtioP9BaseAddress), + FixedPcdGet32 (PcdVirtioP9Size) + ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { + FixedPcdGet32 (PcdVirtioP9Interrupt) + } + }) + } + } // Scope(_SB) +} diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiP= latform.dec index b9be5c9060b6..e878af24d56b 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dec +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec @@ -1,5 +1,5 @@ # -# Copyright (c) 2018 - 2022, Arm Limited. All rights reserved. +# Copyright (c) 2018 - 2023, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -46,6 +46,11 @@ gArmSgiTokenSpaceGuid.PcdVirtioNetSize|0x00000000|UINT32|0x00000008 gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt|0x00000000|UINT32|0x00000009 =20 + # Virtio P9 + gArmSgiTokenSpaceGuid.PcdVirtioP9BaseAddress|0x00000000|UINT32|0x00000028 + gArmSgiTokenSpaceGuid.PcdVirtioP9Size|0x00000000|UINT32|0x00000029 + gArmSgiTokenSpaceGuid.PcdVirtioP9Interrupt|0x00000000|UINT32|0x0000002A + # Chip count on the platform gArmSgiTokenSpaceGuid.PcdChipCount|1|UINT32|0x0000000B =20 --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#99131): https://edk2.groups.io/g/devel/message/99131 Mute This Topic: https://groups.io/mt/96562642/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri May 17 00:25:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+99132+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99132+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1674811432; cv=none; d=zohomail.com; s=zohoarc; b=LFgawYXG45gQe3jHjcxEbfn0YKIc8fLsSsP3PJWLnxXhQUQ6ekLTmDv5EFFMD43ekKX55yNnXCIUE3MvXAWQqwlY2oTK0xCvKdJ1pkvEBYDoeFUD6BipjUReclXscVcXA+UGMw6Lwef2tBE4cia1DI0wC5XFMde6J8roYYyijSE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1674811432; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=w7GY7SDCLyJZJOhG5JnfMXYO+EUVM5H0C/TOLWd83EY=; b=FE52M8kEJTuTCuwwSmFDgHrVwK79lYOE+/9dl0e1lI2G5enKrNINl45fleD1ocQBmEWvh4nLqFfKjcsMeydJ5sGSn1/HJH7ktaR/3/ZRo/F/8IeQiWqLiL46zHkuxduwhh7Og6gmC12boVAksJkiUPdOWzegWzFtbUFEz4sBRfw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99132+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1674811432836226.8306560237254; Fri, 27 Jan 2023 01:23:52 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id J6KYYY1788612xMVjldkhOs4; Fri, 27 Jan 2023 01:23:52 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.98409.1674811431626749175 for ; Fri, 27 Jan 2023 01:23:51 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 29E262B; Fri, 27 Jan 2023 01:24:33 -0800 (PST) X-Received: from usa.arm.com (a077843.arm.com [10.162.43.190]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id EA4443F64C; Fri, 27 Jan 2023 01:23:48 -0800 (PST) From: "Vivek Kumar Gautam" To: devel@edk2.groups.io Cc: ardb+tianocore@kernel.org, leif@nuviainc.com, Sami.Mujawar@arm.com, Pierre.Gondois@arm.com, Vivek.Gautam@arm.com Subject: [edk2-devel] [edk2-platforms][PATCH V2 2/5] Platform/Sgi: Enable virtio-p9 device on RD-N2 platform variants Date: Fri, 27 Jan 2023 14:53:35 +0530 Message-Id: <20230127092338.72056-3-vivek.gautam@arm.com> In-Reply-To: <20230127092338.72056-1-vivek.gautam@arm.com> References: <20230127092338.72056-1-vivek.gautam@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,vivek.gautam@arm.com X-Gm-Message-State: Derq3aKpJSEumfrTOx22p7V4x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1674811432; bh=1Vt6P/Mat+NPq/30nOqqC3hoG1d8HWxLcOBqXSbFEQ4=; h=Cc:Date:From:Reply-To:Subject:To; b=wBCTPTZCcZdUweReU3znO5poSm3lh6EXl+fwVd4qC5HhXHis9OYePs9g45hTMHN0oUx ie1zbAUqunv0tT8DVWsHSdTGSzcE0yOQllYHP2qC1FI+4YEyHWbIDLTHHM/y+Hlcp4VJU TCB3saENv4/U8/KRQAaDnhM89FZIXGGPalQ= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1674811434903100001 Content-Type: text/plain; charset="utf-8" Enable the virtio-p9 device that is present as part of the RoS peripherals on RD-N2 platform variants. This will allow filesystem sharing between the Host PC and target platform. Signed-off-by: Vivek Gautam Reviewed-by: Pierre Gondois --- Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf | 8 ++++++-- Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf | 8 ++++++-- Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf | 6 +++++- 3 files changed, 17 insertions(+), 5 deletions(-) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf b/Platform/A= RM/SgiPkg/AcpiTables/RdN2AcpiTables.inf index 66d5422df36b..833f87c3e4be 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf @@ -1,7 +1,7 @@ ## @file # ACPI table data and ASL sources required to boot the platform. # -# Copyright (c) 2020-2021, Arm Ltd. All rights reserved. +# Copyright (c) 2020 - 2023, Arm Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -25,8 +25,9 @@ RdN2/Pptt.aslc Spcr.aslc Ssdt.asl - SsdtRos.asl SsdtEvents.asl + SsdtRos.asl + SsdtRosVirtioP9.asl =20 [Packages] ArmPkg/ArmPkg.dec @@ -70,6 +71,9 @@ gArmSgiTokenSpaceGuid.PcdVirtioNetBaseAddress gArmSgiTokenSpaceGuid.PcdVirtioNetSize gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt + gArmSgiTokenSpaceGuid.PcdVirtioP9BaseAddress + gArmSgiTokenSpaceGuid.PcdVirtioP9Size + gArmSgiTokenSpaceGuid.PcdVirtioP9Interrupt gArmSgiTokenSpaceGuid.PcdWdogWS0Gsiv gArmSgiTokenSpaceGuid.PcdWdogWS1Gsiv =20 diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf b/Platfo= rm/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf index 742734ab7348..e3e4e55bc410 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf @@ -1,7 +1,7 @@ ## @file # ACPI table data and ASL sources required to boot the platform. # -# Copyright (c) 2021, Arm Ltd. All rights reserved. +# Copyright (c) 2021 - 2023, Arm Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -25,8 +25,9 @@ RdN2Cfg1/Pptt.aslc Spcr.aslc Ssdt.asl - SsdtRos.asl SsdtEvents.asl + SsdtRos.asl + SsdtRosVirtioP9.asl =20 [Packages] ArmPkg/ArmPkg.dec @@ -71,6 +72,9 @@ gArmSgiTokenSpaceGuid.PcdVirtioNetBaseAddress gArmSgiTokenSpaceGuid.PcdVirtioNetSize gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt + gArmSgiTokenSpaceGuid.PcdVirtioP9BaseAddress + gArmSgiTokenSpaceGuid.PcdVirtioP9Size + gArmSgiTokenSpaceGuid.PcdVirtioP9Interrupt gArmSgiTokenSpaceGuid.PcdWdogWS0Gsiv gArmSgiTokenSpaceGuid.PcdWdogWS1Gsiv =20 diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf b/Platfo= rm/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf index 2354f2dc65eb..6ce78582da35 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf @@ -1,7 +1,7 @@ ## @file # ACPI table data and ASL sources required to boot the platform. # -# Copyright (c) 2022, Arm Limited. All rights reserved. +# Copyright (c) 2022 - 2023, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -24,6 +24,7 @@ RdN2Cfg2/Srat.aslc Spcr.aslc SsdtRos.asl + SsdtRosVirtioP9.asl =20 [Packages] ArmPkg/ArmPkg.dec @@ -65,6 +66,9 @@ gArmSgiTokenSpaceGuid.PcdVirtioNetBaseAddress gArmSgiTokenSpaceGuid.PcdVirtioNetSize gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt + gArmSgiTokenSpaceGuid.PcdVirtioP9BaseAddress + gArmSgiTokenSpaceGuid.PcdVirtioP9Size + gArmSgiTokenSpaceGuid.PcdVirtioP9Interrupt gArmSgiTokenSpaceGuid.PcdWdogWS0Gsiv gArmSgiTokenSpaceGuid.PcdWdogWS1Gsiv =20 --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#99132): https://edk2.groups.io/g/devel/message/99132 Mute This Topic: https://groups.io/mt/96562644/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri May 17 00:25:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+99133+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99133+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1674811435; cv=none; d=zohomail.com; s=zohoarc; b=Y6aWhE/8LXKovcSgYRUa7ZK4Si++n1K2pQCLQWx/p7S461FjNzfWcSeLveE2Lu1jLHHRD/qCQA8D2NNj/zSU09pVGCLNmC/nk4wOx6sfMmswCv9udM06AOUUmxSubO+JLvYOeizEUoJ1gkKCs6fg1MjRf5071aBAS5VsZP9rIXw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1674811435; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=rrpNUToyeeVD9UXzC9QrN1bgHQ2V4uX8lTNAD+97Lns=; b=DlE7sphTDgOKvlFXkIreq2G09RdxrlE4HljaTEIR9k4g9alPS4w0+lDIBsyD4qVCZCVsXsnsz428WtucUwfxiIyIpa+4JZmljIQsWmqJ+fLYbtCCLxyCQ4tIAmdBV3yZkNaihCXFyo5Rj3nfqKYPJL5IGQOZ2k4BWJxIkb9Wp/c= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99133+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1674811435598179.28630968793016; Fri, 27 Jan 2023 01:23:55 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id XSgNYY1788612xSLxDPWHFeM; Fri, 27 Jan 2023 01:23:55 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.98411.1674811434497907872 for ; Fri, 27 Jan 2023 01:23:54 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1421E2F; Fri, 27 Jan 2023 01:24:36 -0800 (PST) X-Received: from usa.arm.com (a077843.arm.com [10.162.43.190]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B7B0F3F64C; Fri, 27 Jan 2023 01:23:51 -0800 (PST) From: "Vivek Kumar Gautam" To: devel@edk2.groups.io Cc: ardb+tianocore@kernel.org, leif@nuviainc.com, Sami.Mujawar@arm.com, Pierre.Gondois@arm.com, Vivek.Gautam@arm.com Subject: [edk2-devel] [edk2-platforms][PATCH V2 3/5] Platform/Sgi: Add SSDT table for IO virtualization SoC expansion block Date: Fri, 27 Jan 2023 14:53:36 +0530 Message-Id: <20230127092338.72056-4-vivek.gautam@arm.com> In-Reply-To: <20230127092338.72056-1-vivek.gautam@arm.com> References: <20230127092338.72056-1-vivek.gautam@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,vivek.gautam@arm.com X-Gm-Message-State: 6Zw7pG41Da4dkcaSDEpywmojx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1674811435; bh=4sDYMPbgwWU2QrE32DyZhCvb2BKaRpOQpLapYitD5AM=; h=Cc:Date:From:Reply-To:Subject:To; b=AjZ5rgff5G5JzxjxxSAV7Q4jnGCGacXAQI3wTJBDRIj/kNiwXO/AqPtrtEDSt9RtG2t hErPtY80HUYIvtZGNxX3i4Y2wL3LK2SOIlo+pAp3zpLiXHotllMIeREuDYCysnR1xck12 LzcL+rMLOdu5hXXax+e2aC3XctVs1fWdquo= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1674811436761100005 Content-Type: text/plain; charset="utf-8" Arm reference design platforms have multiple IO virtualization blocks that allow connecting PCIe root bus or non-PCIe SoC peripherals to the system. Each of these IO virtualization blocks consists of an instance of SMMUv3, a GIC-ITS and a NCI (network chip interconnect) to support traffic flow and address mapping, as required. The SoC expansion blocks that connect to the IO virtualization block include devices such as UARTs, DMAs and few additional memory nodes. For platforms having SoC expansion block connected to the IO virtualization block add a SSDT table to describe devices included in the SoC expansion block. Preprocessor macros are also added in this change to allow scalability for platforms that implement multiple instances of these SoC expansion blocks. Signed-off-by: Vivek Gautam Reviewed-by: Pierre Gondois --- Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc | 5 + Platform/ARM/SgiPkg/Include/IoVirtSoCExp.h | 189 ++++++++++++++++= ++++ Platform/ARM/SgiPkg/AcpiTables/SsdtIoVirtSocExp.asl | 96 ++++++++++ Platform/ARM/SgiPkg/SgiPlatform.dec | 5 + 4 files changed, 295 insertions(+) diff --git a/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc b/Platform/ARM/SgiPk= g/SgiMemoryMap2.dsc.inc index 12dcd82eb132..14734fb65828 100644 --- a/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc @@ -72,3 +72,8 @@ gArmSgiTokenSpaceGuid.PcdGpioController0BaseAddress|0x0C1D0000 gArmSgiTokenSpaceGuid.PcdGpioController0Size|0x00010000 gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt|392 + + # IO virtualization block + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlk0Base|0x1080000000 + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkPeriOffset|0x10000000 + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkResourceSize|0x10000 diff --git a/Platform/ARM/SgiPkg/Include/IoVirtSoCExp.h b/Platform/ARM/SgiP= kg/Include/IoVirtSoCExp.h new file mode 100644 index 000000000000..8e73b8989b16 --- /dev/null +++ b/Platform/ARM/SgiPkg/Include/IoVirtSoCExp.h @@ -0,0 +1,189 @@ +/** @file +* +* Copyright (c) 2023, Arm Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#include "SgiPlatform.h" + +#define IO_VIRT_BLK_BASE FixedPcdGet64 (PcdIoVirtSocExpBlk0Base) +#define RESOURCE_SIZE FixedPcdGet32 (PcdIoVirtSocExpBlkResourceSiz= e) + +/** Macros to calculate base addresses of UART and DMA devices within IO + virtualization SoC expansion block address space. + + @param [in] n Index of UART or DMA device within SoC expansion b= lock. + Should be either 0 or 1. + + The base address offsets of UART and DMA devices within a SoC expansion = block + are shown below. The UARTs are at offset (2 * index + 0x1000_0000), whil= e the + DMAs are at offsets ((2 * index + 1) + 0x1000_0000). + +----------------------------------------------+ + | Port # | Peripheral | Base address offset | + |--------|---------------|---------------------| + | x4_0 | PL011_UART0 | 0x0000_0000 | + |--------|---------------|---------------------| + | x4_1 | PL011_DMA0_NS | 0x1000_0000 | + |--------|---------------|---------------------| + | x8 | PL011_UART1 | 0x2000_0000 | + |--------|---------------|---------------------| + | x16 | PL011_DMA1_NS | 0x3000_0000 | + +----------------------------------------------+ +**/ +#define UART_START(n) IO_VIRT_BLK_BASE + = \ + (2 * n * FixedPcdGet32 (PcdIoVirtSocExpBlkPeriOffset)) +#define DMA_START(n) IO_VIRT_BLK_BASE + = \ + (((2 * n) + 1) * FixedPcdGet32 (PcdIoVirtSocExpBlkPeriOffset)) + +// Interrupt numbers of PL330 DMA-0 and DMA-1 devices in the SoC expansion +// connected to the IO Virtualization block. Each DMA PL330 controller uses +// eight data channel interrupts and one instruction channel interrupt to +// notify aborts. +#define RD_IOVIRT_SOC_EXP_DMA0_INTERRUPTS_INIT = \ + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { = \ + 493, 494, 495, 496, 497, 498, 499, 500, 501 = \ + } +#define RD_IOVIRT_SOC_EXP_DMA1_INTERRUPTS_INIT = \ + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { = \ + 503, 504, 505, 506, 507, 508, 509, 510, 511 = \ + } + +#define RD_IOVIRT_SOC_EXP_DMA2_INTERRUPTS_INIT = \ + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { = \ + 973, 974, 975, 976, 977, 978, 979, 980, 981 = \ + } + +#define RD_IOVIRT_SOC_EXP_DMA3_INTERRUPTS_INIT = \ + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { = \ + 983, 984, 985, 986, 987, 988, 989, 990, 991 = \ + } + +#define RD_IOVIRT_SOC_EXP_DMA4_INTERRUPTS_INIT = \ + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { = \ + 4557, 4558, 4559, 4560, 4561, 4562, 4563, 4564, 4565 = \ + } + +#define RD_IOVIRT_SOC_EXP_DMA5_INTERRUPTS_INIT = \ + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { = \ + 4567, 4568, 4569, 4570, 4571, 4572, 4573, 4574, 4575 = \ + } + +#define RD_IOVIRT_SOC_EXP_DMA6_INTERRUPTS_INIT = \ + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { = \ + 5037, 5038, 5039, 5040, 5041, 5042, 5043, 5044, 5045 = \ + } + +#define RD_IOVIRT_SOC_EXP_DMA7_INTERRUPTS_INIT = \ + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { = \ + 5047, 5048, 5049, 5050, 5051, 5052, 5053, 5054, 5055 = \ + } + +/** Macro for PL011 UART controller node instantiation in SSDT table. + + See section 5.2.11.2 of ACPI specification v6.4 for the definition of SS= DT + table. Use of this macro is restricted to ASL file and not to TDL file. + + @param [in] ComIdx Index of Com device to be initializaed; + to be passed as 2-digit index, such as 01 to + support multichip platforms as well. + @param [in] ChipIdx Index of chip to which this DMA device belon= gs + @param [in] StartOff Starting offset of this device within IO + virtualization block memory map + @param [in] IrqNum Interrupt ID used for the device +**/ +#define RD_IOVIRT_SOC_EXP_COM_INIT(ComIdx, ChipIdx, StartOff, IrqNum) = \ + Device (COM ##ComIdx) { = \ + Name (_HID, "ARMH0011") = \ + Name (_UID, ComIdx) = \ + Name (_STA, 0xF) = \ + = \ + Method (_CRS, 0, Serialized) { = \ + Name (RBUF, ResourceTemplate () { = \ + QWordMemory ( = \ + ResourceProducer, = \ + PosDecode, = \ + MinFixed, = \ + MaxFixed, = \ + NonCacheable, = \ + ReadWrite, = \ + 0x0, = \ + 0, = \ + 1, = \ + 0x0, = \ + 2, = \ + , = \ + , = \ + MMI1, = \ + AddressRangeMemory, = \ + TypeStatic = \ + ) = \ + = \ + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { = \ + IrqNum = \ + } = \ + }) /* end Name(RBUF) */ = \ + /* Work around ASL's inability to add in a resource definition */ = \ + CreateQwordField (RBUF, MMI1._MIN, MIN1) = \ + CreateQwordField (RBUF, MMI1._MAX, MAX1) = \ + CreateQwordField (RBUF, MMI1._LEN, LEN1) = \ + Add (SGI_REMOTE_CHIP_MEM_OFFSET(ChipIdx), StartOff, MIN1) = \ + Add (MIN1, RESOURCE_SIZE - 1, MAX1) = \ + Add (RESOURCE_SIZE, 0, LEN1) = \ + = \ + Return (RBUF) = \ + } /* end Method(_CRS) */ = \ + } + +/** Macro for PL330 DMA controller node instantiation in SSDT table. + + See section 5.2.11.2 of ACPI specification v6.4 for the definition of SS= DT + table. Use of this macro is restricted to ASL file and not to TDL file. + + @param [in] DmaIdx Index of DMA device to be initializaed + @param [in] ChipIdx Index of chip to which this DMA device belon= gs + @param [in] StartOff Starting offset of this device within IO + virtualization block memory map +**/ +#define RD_IOVIRT_SOC_EXP_DMA_INIT(DmaIdx, ChipIdx, StartOff) = \ + Device (\_SB.DMA ##DmaIdx) { = \ + Name (_HID, "ARMH0330") = \ + Name (_UID, DmaIdx) = \ + Name (_CCA, 1) = \ + Name (_STA, 0xF) = \ + = \ + Method (_CRS, 0, Serialized) { = \ + Name (RBUF, ResourceTemplate () { = \ + QWordMemory ( = \ + ResourceProducer, = \ + PosDecode, = \ + MinFixed, = \ + MaxFixed, = \ + NonCacheable, = \ + ReadWrite, = \ + 0x0, = \ + 0, = \ + 1, = \ + 0x0, = \ + 2, = \ + , = \ + , = \ + MMI2, = \ + AddressRangeMemory, = \ + TypeStatic = \ + ) = \ + = \ + RD_IOVIRT_SOC_EXP_DMA ##DmaIdx## _INTERRUPTS_INIT = \ + }) /* end Name(RBUF) */ = \ + /* Work around ASL's inability to add in a resource definition */ = \ + CreateQwordField (RBUF, MMI2._MIN, MIN2) = \ + CreateQwordField (RBUF, MMI2._MAX, MAX2) = \ + CreateQwordField (RBUF, MMI2._LEN, LEN2) = \ + Add (SGI_REMOTE_CHIP_MEM_OFFSET(ChipIdx), StartOff, MIN2) = \ + Add (MIN2, RESOURCE_SIZE - 1, MAX2) = \ + Add (RESOURCE_SIZE, 0, LEN2) = \ + = \ + Return (RBUF) = \ + } /* end Method(_CRS) */ = \ + } diff --git a/Platform/ARM/SgiPkg/AcpiTables/SsdtIoVirtSocExp.asl b/Platform= /ARM/SgiPkg/AcpiTables/SsdtIoVirtSocExp.asl new file mode 100644 index 000000000000..47cd3cb017a2 --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/SsdtIoVirtSocExp.asl @@ -0,0 +1,96 @@ +/** @file + Secondary System Description Table (SSDT) for IO Virtualization SoC Expa= nsion + + The IO virtualization blocks on Arm Reference Design (RD) platforms allow + connecting PCIe root bus as well as other non-PCIe SoC peripherals. Each= of + these IO virtualization blocks consists of an instance of SMMUv3, a GIC-= ITS + and a NCI (network chip interconnect) to support traffic flow and address + mapping, as required. The PCIe root bus or the SoC peripherals connect t= o the + IO virtualization block over ports namely x4_0, x4_1, x8 and x16. + + Some of the RD platforms utilize one or more IO virtualization blocks to + connect non-PCIe devices mapped in the SoC expansion address space. One + such instance of SoC expansion block consists of a set of non-PCIe devic= es + that includes two PL011 UART controllers, two PL330 DMA controllers and + few additional memory nodes. The devices in this SoC expansion block are + placed at fixed offsets from a base address in the SoC expansion address + space and the read/write accesses to these devices are routed by the IO + virtualization block. + + The table below lists the address offset, address space size and interru= pts + used for the devices present in each instance of this SoC expansion block + that is connected to the IO Virtualization block. + +-----------------------------------------------------------------------= --------+ + | Port | Peripheral | Memory map | Size | In= terrupt | + | # | |-------------------------------------| | = ID | + | | | Start Addr Offset | End Addr Offset | | = | + +-----------------------------------------------------------------------= --------+ + | x4_0 | PL011_UART0 | 0x0000_0000 | 0x0000_FFFF | 64KB | = 492 | + |-----------------------------------------------------------------------= --------| + | x4_1 | PL011_DMA0_NS | 0x1000_0000 | 0x1000_FFFF | 64KB | 49= 3-501 | + |-----------------------------------------------------------------------= --------| + | x8 | PL011_UART1 | 0x2000_0000 | 0x2000_FFFF | 64KB | = 502 | + |-----------------------------------------------------------------------= --------| + | x16 | PL011_DMA1_NS | 0x3000_0000 | 0x3000_FFFF | 64KB | 50= 3-511 | + +-----------------------------------------------------------------------= --------+ + + This SSDT ACPI table lists the SoC expansion block devices connected via= the + IO Virtualization block on RD-N2 platform variants and mapped to SoC exp= ansion + address at an offset of 0x10_8000_0000 from each chip's base address. + + Copyright (c) 2023, Arm Limited. All rights reserved. + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Specification Reference: + - ACPI 6.4, Chapter 5, Section 5.2.11.2, Secondary System Description = Table +**/ + +#include "IoVirtSoCExp.h" +#include "SgiAcpiHeader.h" + +DefinitionBlock ("SsdtIoVirtSocExp.aml", "SSDT", 2, "ARMLTD", "ARMSGI", + EFI_ACPI_ARM_OEM_REVISION) { + Scope (_SB) + { + + // IO Virtualization SoC Expansion - PL011 UART + if (LEqual (FixedPcdGet32 (PcdIoVirtSocExpBlkUartEnable), 1)) { + RD_IOVIRT_SOC_EXP_COM_INIT(2, 0, UART_START(0), 492) + RD_IOVIRT_SOC_EXP_COM_INIT(3, 0, UART_START(1), 502) + + if (LGreater (FixedPcdGet32 (PcdChipCount), 1)) { + RD_IOVIRT_SOC_EXP_COM_INIT(4, 1, UART_START(0), 972) + RD_IOVIRT_SOC_EXP_COM_INIT(5, 1, UART_START(1), 982) + } + + if (LGreater (FixedPcdGet32 (PcdChipCount), 2)) { + RD_IOVIRT_SOC_EXP_COM_INIT(6, 2, UART_START(0), 4556) + RD_IOVIRT_SOC_EXP_COM_INIT(7, 2, UART_START(1), 4566) + } + + if (LGreater (FixedPcdGet32 (PcdChipCount), 3)) { + RD_IOVIRT_SOC_EXP_COM_INIT(8, 3, UART_START(0), 5036) + RD_IOVIRT_SOC_EXP_COM_INIT(9, 3, UART_START(1), 5046) + } + } + + // IO Virtualization SoC Expansion - PL330 DMA + RD_IOVIRT_SOC_EXP_DMA_INIT(0, 0, DMA_START(0)) + RD_IOVIRT_SOC_EXP_DMA_INIT(1, 0, DMA_START(1)) + + if (LGreater (FixedPcdGet32 (PcdChipCount), 1)) { + RD_IOVIRT_SOC_EXP_DMA_INIT(2, 1, DMA_START(0)) + RD_IOVIRT_SOC_EXP_DMA_INIT(3, 1, DMA_START(1)) + } + + if (LGreater (FixedPcdGet32 (PcdChipCount), 2)) { + RD_IOVIRT_SOC_EXP_DMA_INIT(4, 2, DMA_START(0)) + RD_IOVIRT_SOC_EXP_DMA_INIT(5, 2, DMA_START(1)) + } + + if (LGreater (FixedPcdGet32 (PcdChipCount), 3)) { + RD_IOVIRT_SOC_EXP_DMA_INIT(6, 3, DMA_START(0)) + RD_IOVIRT_SOC_EXP_DMA_INIT(7, 3, DMA_START(1)) + } + } // Scope(_SB) +} diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiP= latform.dec index e878af24d56b..407f03c1c3e8 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dec +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec @@ -98,5 +98,10 @@ # Address bus width gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip|0x0|UINT64|0x00000027 =20 + # IO virtualization block + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlk0Base|0|UINT64|0x0000002B + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkPeriOffset|0|UINT32|0x0000002C + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkResourceSize|0|UINT32|0x0000002D + [Ppis] gNtFwConfigDtInfoPpiGuid =3D { 0x6f606eb3, 0x9123, 0x4e15, { 0xa8, 0= x9b, 0x0f, 0xac, 0x66, 0xef, 0xd0, 0x17 } } --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#99133): https://edk2.groups.io/g/devel/message/99133 Mute This Topic: https://groups.io/mt/96562647/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri May 17 00:25:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+99134+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99134+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1674811438; cv=none; d=zohomail.com; s=zohoarc; b=Gcbtmr+isdy+rCKhS5V47uvK00v5NNMLqwpLfI2GACK2mwqltWBiXT87DZ00fH+Vww4DOu3vxonRIuMByZVWRczNVGo9Q2QU33mXzA63175ZMyqeGPFDNUjIdidn/5RsPeXl80JRV/swYaWcOJ+XYInsca7GYc/2qb6JzCtcOJ8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1674811438; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=OkThZhasB2NgFB3/JB3X2fwPzsDbLLEoMrNZn7DRLtw=; b=F1TOxrkSAjHvFsaHLO8CcqO7l0CdSEyHWgiUAViQcK7VIowSkWV3ytyg8XIKYsfZzoMT/619Qxj1gqoB3Mq4OcymYv+WXyb1iALXmxhfB08GcXmiYymDAtcyXXqiaaYQGOMm7j2Vvy0JkKqpiDj9pIubE/wmcuzNzrThGfEGCBo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99134+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1674811438903580.9189206630429; Fri, 27 Jan 2023 01:23:58 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id y4NQYY1788612xFspvEtPWY5; Fri, 27 Jan 2023 01:23:58 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.98412.1674811437430564321 for ; Fri, 27 Jan 2023 01:23:57 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 05B2B2B; Fri, 27 Jan 2023 01:24:39 -0800 (PST) X-Received: from usa.arm.com (a077843.arm.com [10.162.43.190]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A0D313F64C; Fri, 27 Jan 2023 01:23:54 -0800 (PST) From: "Vivek Kumar Gautam" To: devel@edk2.groups.io Cc: ardb+tianocore@kernel.org, leif@nuviainc.com, Sami.Mujawar@arm.com, Pierre.Gondois@arm.com, Vivek.Gautam@arm.com Subject: [edk2-devel] [edk2-platforms][PATCH V2 4/5] Platform/Sgi: Initialize additional UART controllers Date: Fri, 27 Jan 2023 14:53:37 +0530 Message-Id: <20230127092338.72056-5-vivek.gautam@arm.com> In-Reply-To: <20230127092338.72056-1-vivek.gautam@arm.com> References: <20230127092338.72056-1-vivek.gautam@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,vivek.gautam@arm.com X-Gm-Message-State: FXbqLGT3FbKhNhjP7mBOxwHXx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1674811438; bh=+9HlfEiPkJ0/79+DLMvbIT5xef21o3cbPLyaxg0hE+s=; h=Cc:Date:From:Reply-To:Subject:To; b=ri6njOh7ZkB29NixDeQB/IyFDLvyP+0XYVoaeivxZPMo8gCLLeeNc/w42rIPrV+5s6l wWsdjXz9jOQ3PnpmoQ5RPhe8kpJ97wclSEPgm770ZJwVtWLuOPXRmVqrBAYmmanmUbScm 2WKGu8CG2jtm0nrTQoJIZzIYFlm7RXcG0bo= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1674811440762100002 Content-Type: text/plain; charset="utf-8" From: Shriram K The IO virtualization block on reference design platforms allow connecting SoC expansion devices such as PL011 UART. On platforms that support this, initialize the UART controller connected to the IO virtualization block. Signed-off-by: Shriram K Signed-off-by: Vivek Gautam Reviewed-by: Pierre Gondois --- Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf | 10 ++- Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 7 ++- Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c | 64 ++++++++++++= +++++++- Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c | 43 ++++++++++++- Platform/ARM/SgiPkg/SgiPlatform.dec | 1 + 5 files changed, 118 insertions(+), 7 deletions(-) diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf b/Plat= form/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf index 9d89314a594e..42feadaf5f6f 100644 --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf @@ -1,5 +1,5 @@ # -# Copyright (c) 2018, ARM Limited. All rights reserved. +# Copyright (c) 2018 - 2023, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -17,6 +17,7 @@ VirtioDevices.c =20 [Packages] + ArmPlatformPkg/ArmPlatformPkg.dec EmbeddedPkg/EmbeddedPkg.dec MdePkg/MdePkg.dec OvmfPkg/OvmfPkg.dec @@ -37,10 +38,17 @@ gArmSgiTokenSpaceGuid.PcdVirtioNetSupported =20 [FixedPcd] + gArmSgiTokenSpaceGuid.PcdChipCount + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlk0Base + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkPeriOffset + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkUartEnable + gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress gArmSgiTokenSpaceGuid.PcdVirtioBlkSize gArmSgiTokenSpaceGuid.PcdVirtioNetBaseAddress gArmSgiTokenSpaceGuid.PcdVirtioNetSize =20 + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz + [Depex] TRUE diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Plat= form/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf index 1ca7679b4191..4459b20ecb06 100644 --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf @@ -1,5 +1,5 @@ # -# Copyright (c) 2018 - 2022, Arm Limited. All rights reserved. +# Copyright (c) 2018 - 2023, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -41,10 +41,13 @@ gArmPlatformTokenSpaceGuid.PcdCoreCount gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase =20 - gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip gArmSgiTokenSpaceGuid.PcdDramBlock2Base gArmSgiTokenSpaceGuid.PcdDramBlock2Size gArmSgiTokenSpaceGuid.PcdGicSize + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlk0Base + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkPeriOffset + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkUartEnable + gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip =20 gArmTokenSpaceGuid.PcdSystemMemoryBase gArmTokenSpaceGuid.PcdSystemMemorySize diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platfo= rm/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c index 2f72e7152ff3..b3a998bc1585 100644 --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2018, ARM Limited. All rights reserved. +* Copyright (c) 2018 - 2023, ARM Limited. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -9,6 +9,9 @@ #include #include #include +#include + +#include #include =20 VOID @@ -16,6 +19,64 @@ InitVirtioDevices ( VOID ); =20 +/** + Initialize UART controllers connected to IO Virtualization block. + + Use PL011UartLib Library to initialize UART controllers that are present= in + the SoC expansion block. This SoC expansion block is connected to the IO + virtualization block on Arm infrastructure reference design (RD) platfor= ms. + + @retval None +**/ +STATIC +VOID +InitIoVirtSocExpBlkUartControllers (VOID) +{ + EFI_STATUS Status; + EFI_PARITY_TYPE Parity; + EFI_STOP_BITS_TYPE StopBits; + UINT64 BaudRate; + UINT32 ReceiveFifoDepth; + UINT8 DataBits; + UINT8 UartIdx; + UINT32 ChipIdx; + UINT64 UartAddr; + + if (FixedPcdGet32 (PcdIoVirtSocExpBlkUartEnable) =3D=3D 0) + return; + + ReceiveFifoDepth =3D 0; + Parity =3D 1; + DataBits =3D 8; + StopBits =3D 1; + BaudRate =3D 115200; + + for (ChipIdx =3D 0; ChipIdx < FixedPcdGet32 (PcdChipCount); ChipIdx++) { + for (UartIdx =3D 0; UartIdx < 2; UartIdx++) { + UartAddr =3D SGI_REMOTE_CHIP_MEM_OFFSET(ChipIdx) + UART_START(UartId= x); + + Status =3D PL011UartInitializePort ( + (UINTN)UartAddr, + FixedPcdGet32 (PcdSerialDbgUartClkInHz), + &BaudRate, + &ReceiveFifoDepth, + &Parity, + &DataBits, + &StopBits + ); + + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "Failed to init PL011_UART%u on IO Virt Block port, status: %r\n= ", + UartIdx, + Status + )); + } + } + } +} + EFI_STATUS EFIAPI ArmSgiPkgEntryPoint ( @@ -32,6 +93,7 @@ ArmSgiPkgEntryPoint ( } =20 InitVirtioDevices (); + InitIoVirtSocExpBlkUartControllers (); =20 return Status; } diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Pla= tform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c index 8139b75d8ee4..08aa9bf64940 100644 --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2018-2020, ARM Limited. All rights reserved. +* Copyright (c) 2018 - 2023, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -13,11 +13,23 @@ #include #include =20 +#include #include =20 // Total number of descriptors, including the final "end-of-table" descrip= tor. -#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS \ - (14 + (FixedPcdGet32 (PcdChipCount) * 2)) +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS = \ + ((14 + (FixedPcdGet32 (PcdChipCount) * 2)) + = \ + (FixedPcdGet32 (PcdIoVirtSocExpBlkUartEnable) * = \ + FixedPcdGet32 (PcdChipCount) * 2)) + +// Memory Map descriptor for IO Virtualization SoC Expansion Block UART +#define IO_VIRT_SOC_EXP_BLK_UART_MMAP(UartIdx, ChipIdx) = \ + VirtualMemoryTable[++Index].PhysicalBase =3D = \ + SGI_REMOTE_CHIP_MEM_OFFSET(ChipIdx) + UART_START(UartIdx); = \ + VirtualMemoryTable[Index].VirtualBase =3D = \ + SGI_REMOTE_CHIP_MEM_OFFSET(ChipIdx) + UART_START(UartIdx); = \ + VirtualMemoryTable[Index].Length =3D SIZE_64KB; = \ + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUTE= _DEVICE; =20 /** Returns the Virtual Memory Map of the platform. @@ -171,6 +183,31 @@ ArmPlatformGetVirtualMemoryMap ( VirtualMemoryTable[Index].Length =3D SIZE_64KB; VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUT= E_DEVICE; =20 +#if (FixedPcdGet32 (PcdIoVirtSocExpBlkUartEnable) =3D=3D 1) + // Chip-0 IO Virtualization SoC Expansion Block - UART0 + IO_VIRT_SOC_EXP_BLK_UART_MMAP(0, 0) + // Chip-0 IO Virtualization SoC Expansion Block - UART0 + IO_VIRT_SOC_EXP_BLK_UART_MMAP(1, 0) +#if (FixedPcdGet32 (PcdChipCount) > 1) + // Chip-1 IO Virtualization SoC Expansion Block - UART0 + IO_VIRT_SOC_EXP_BLK_UART_MMAP(0, 1) + // Chip-1 IO Virtualization SoC Expansion Block - UART1 + IO_VIRT_SOC_EXP_BLK_UART_MMAP(1, 1) +#if (FixedPcdGet32 (PcdChipCount) > 2) + // Chip-2 IO Virtualization SoC Expansion Block - UART0 + IO_VIRT_SOC_EXP_BLK_UART_MMAP(0, 2) + // Chip-2 IO Virtualization SoC Expansion Block - UART1 + IO_VIRT_SOC_EXP_BLK_UART_MMAP(1, 2) +#if (FixedPcdGet32 (PcdChipCount) > 3) + // Chip-3 IO Virtualization SoC Expansion Block - UART0 + IO_VIRT_SOC_EXP_BLK_UART_MMAP(0, 3) + // Chip-3 IO Virtualization SoC Expansion Block - UART1 + IO_VIRT_SOC_EXP_BLK_UART_MMAP(1, 3) +#endif +#endif +#endif +#endif + // DDR - (2GB - 16MB) VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdSystemMemoryB= ase); VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdSystemMemoryB= ase); diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiP= latform.dec index 407f03c1c3e8..43d350ec48bb 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dec +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec @@ -102,6 +102,7 @@ gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlk0Base|0|UINT64|0x0000002B gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkPeriOffset|0|UINT32|0x0000002C gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkResourceSize|0|UINT32|0x0000002D + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkUartEnable|0|UINT32|0x0000002E =20 [Ppis] gNtFwConfigDtInfoPpiGuid =3D { 0x6f606eb3, 0x9123, 0x4e15, { 0xa8, 0= x9b, 0x0f, 0xac, 0x66, 0xef, 0xd0, 0x17 } } --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#99134): https://edk2.groups.io/g/devel/message/99134 Mute This Topic: https://groups.io/mt/96562648/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri May 17 00:25:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+99135+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99135+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1674811441; cv=none; d=zohomail.com; s=zohoarc; b=emwJEci/P++31uF/FreZnXv9YsvZoPq/N34zftarb0bXqAjKpctS9ywVk3/JEe5DlB6je1Z3c7zFDlmR/hrJGFV4iiSPnNvU0/chBsC0u/gT3gwpafDqfUsuR4K3K/lTM5x/Ior9l7vsPYzgBmypBBYnr2nQ0FV7x8sxL3QB8AI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1674811441; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=+NGt09I+8O8jkP1SamVMgaY/bFNyr30AasUG9E0DFJY=; b=Tcr+X9dZMZ7p9EHJDINY12yJXyOpJ6Akde1UX2Jd+ov649k/emsn8FTlpN8TkBGDqZNXTqww+kh+p2gbCmjwC9LEJi5wew8uU9KDgRBu4sX5DVUSQpsi/rkr62YQT+VjMRftIL/L26ADX7YlHsIHC/E1bBSF2VipgDrSBv22lVg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99135+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1674811441600652.313867865208; Fri, 27 Jan 2023 01:24:01 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id opnnYY1788612xsP7CsZkzzA; Fri, 27 Jan 2023 01:24:01 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.98515.1674811440390614617 for ; Fri, 27 Jan 2023 01:24:00 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D7F0B2B; Fri, 27 Jan 2023 01:24:41 -0800 (PST) X-Received: from usa.arm.com (a077843.arm.com [10.162.43.190]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B293F3F64C; Fri, 27 Jan 2023 01:23:57 -0800 (PST) From: "Vivek Kumar Gautam" To: devel@edk2.groups.io Cc: ardb+tianocore@kernel.org, leif@nuviainc.com, Sami.Mujawar@arm.com, Pierre.Gondois@arm.com, Vivek.Gautam@arm.com Subject: [edk2-devel] [edk2-platforms][PATCH V2 5/5] Platform/Sgi: Enable SoC expansion block for RD-N2 variants Date: Fri, 27 Jan 2023 14:53:38 +0530 Message-Id: <20230127092338.72056-6-vivek.gautam@arm.com> In-Reply-To: <20230127092338.72056-1-vivek.gautam@arm.com> References: <20230127092338.72056-1-vivek.gautam@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,vivek.gautam@arm.com X-Gm-Message-State: TKuinAYaMNK7Cl9c9RAgRc1Mx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1674811441; bh=w/aAqnMBEeWAkybyAMMM3/sFecUi4NkGIH4SvmRpWF4=; h=Cc:Date:From:Reply-To:Subject:To; b=edU7Wl6pQJw8WmBLK1Xzfr44mAX1ALvGtZlKyGKFYxTgsmMJgF/9m24m/6BEnoHSVIJ HjrTo5rNl6JhGYgQx1ZD+kjUcZxDuIy2od0KUJTBTvrmP++k5y6sv0Dr6HuouTq42Pfbo ymWa2Z84YDin4uEHxOxzGB0sywjeXbqq4PA= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1674811442754100006 Content-Type: text/plain; charset="utf-8" For all the RD-N2 platform variants, include the SSDT ACPI table that describes the devices present in SoC expansion block that is connected to the IO virtualization block. Signed-off-by: Vivek Gautam Reviewed-by: Pierre Gondois --- Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf | 7 +++++++ Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf | 7 +++++++ Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf | 5 +++++ 3 files changed, 19 insertions(+) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf b/Platform/A= RM/SgiPkg/AcpiTables/RdN2AcpiTables.inf index 833f87c3e4be..a2de6f754b34 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf @@ -26,6 +26,7 @@ Spcr.aslc Ssdt.asl SsdtEvents.asl + SsdtIoVirtSocExp.asl SsdtRos.asl SsdtRosVirtioP9.asl =20 @@ -55,11 +56,17 @@ gArmTokenSpaceGuid.PcdPciBusMin gArmTokenSpaceGuid.PcdPciBusMax =20 + gArmSgiTokenSpaceGuid.PcdChipCount gArmSgiTokenSpaceGuid.PcdGpioController0BaseAddress gArmSgiTokenSpaceGuid.PcdGpioController0Size gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlk0Base + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkPeriOffset + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkResourceSize + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkUartEnable + gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip gArmSgiTokenSpaceGuid.PcdOscLpiEnable gArmSgiTokenSpaceGuid.PcdOscCppcEnable gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf b/Platfo= rm/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf index e3e4e55bc410..f72cb612161b 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf @@ -26,6 +26,7 @@ Spcr.aslc Ssdt.asl SsdtEvents.asl + SsdtIoVirtSocExp.asl SsdtRos.asl SsdtRosVirtioP9.asl =20 @@ -55,11 +56,17 @@ gArmTokenSpaceGuid.PcdPciBusMin gArmTokenSpaceGuid.PcdPciBusMax =20 + gArmSgiTokenSpaceGuid.PcdChipCount gArmSgiTokenSpaceGuid.PcdGpioController0BaseAddress gArmSgiTokenSpaceGuid.PcdGpioController0Size gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlk0Base + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkPeriOffset + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkResourceSize + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkUartEnable + gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip gArmSgiTokenSpaceGuid.PcdOscLpiEnable gArmSgiTokenSpaceGuid.PcdOscCppcEnable gArmSgiTokenSpaceGuid.PcdSmmuBase diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf b/Platfo= rm/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf index 6ce78582da35..db1fd283c5a4 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf @@ -23,6 +23,7 @@ RdN2Cfg2/Pptt.aslc RdN2Cfg2/Srat.aslc Spcr.aslc + SsdtIoVirtSocExp.asl SsdtRos.asl SsdtRosVirtioP9.asl =20 @@ -57,6 +58,10 @@ gArmSgiTokenSpaceGuid.PcdDramBlock2Size gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlk0Base + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkPeriOffset + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkResourceSize + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkUartEnable gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip gArmSgiTokenSpaceGuid.PcdOscLpiEnable gArmSgiTokenSpaceGuid.PcdOscCppcEnable --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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