Fix a wrong conjugation of "disabled".

Fixes: 7c83232161f609bb ("riscv: add support for misaligned trap handling in S-mode")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/riscv/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index b49016bb5077b860..84b8200f7a625b07 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -706,7 +706,7 @@ config RISCV_MISALIGNED
 	default y
 	help
 	  Say Y here if you want the kernel to embed support for misaligned
-	  load/store for both kernel and userspace. When disable, misaligned
+	  load/store for both kernel and userspace. When disabled, misaligned
 	  accesses will generate SIGBUS in userspace and panic in kernel.
 
 config RISCV_EFFICIENT_UNALIGNED_ACCESS
-- 
2.34.1

Geert Uytterhoeven wrote:
> Fix a wrong conjugation of "disabled".
>
> Fixes: 7c83232161f609bb ("riscv: add support for misaligned trap handling in S-mode")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>

> ---
>  arch/riscv/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index b49016bb5077b860..84b8200f7a625b07 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -706,7 +706,7 @@ config RISCV_MISALIGNED
>  	default y
>  	help
>  	  Say Y here if you want the kernel to embed support for misaligned
> -	  load/store for both kernel and userspace. When disable, misaligned
> +	  load/store for both kernel and userspace. When disabled, misaligned
>  	  accesses will generate SIGBUS in userspace and panic in kernel.
>
>  config RISCV_EFFICIENT_UNALIGNED_ACCESS
> --
> 2.34.1
>
>
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