.../display/rockchip/rockchip-lvds.txt | 92 ---------- .../display/rockchip/rockchip-lvds.yaml | 157 ++++++++++++++++++ 2 files changed, 157 insertions(+), 92 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.yaml
Convert rockchip-lvds.txt to YAML.
Changed:
Add power-domains property.
Requirements between PX30 and RK3288
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
Changed V2:
Fix title
---
.../display/rockchip/rockchip-lvds.txt | 92 ----------
.../display/rockchip/rockchip-lvds.yaml | 157 ++++++++++++++++++
2 files changed, 157 insertions(+), 92 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt
create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.yaml
diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt
deleted file mode 100644
index aaf8c44cf..000000000
--- a/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt
+++ /dev/null
@@ -1,92 +0,0 @@
-Rockchip RK3288 LVDS interface
-================================
-
-Required properties:
-- compatible: matching the soc type, one of
- - "rockchip,rk3288-lvds";
- - "rockchip,px30-lvds";
-
-- reg: physical base address of the controller and length
- of memory mapped region.
-- clocks: must include clock specifiers corresponding to entries in the
- clock-names property.
-- clock-names: must contain "pclk_lvds"
-
-- avdd1v0-supply: regulator phandle for 1.0V analog power
-- avdd1v8-supply: regulator phandle for 1.8V analog power
-- avdd3v3-supply: regulator phandle for 3.3V analog power
-
-- rockchip,grf: phandle to the general register files syscon
-- rockchip,output: "rgb", "lvds" or "duallvds", This describes the output interface
-
-- phys: LVDS/DSI DPHY (px30 only)
-- phy-names: name of the PHY, must be "dphy" (px30 only)
-
-Optional properties:
-- pinctrl-names: must contain a "lcdc" entry.
-- pinctrl-0: pin control group to be used for this controller.
-
-Required nodes:
-
-The lvds has two video ports as described by
- Documentation/devicetree/bindings/media/video-interfaces.txt
-Their connections are modeled using the OF graph bindings specified in
- Documentation/devicetree/bindings/graph.txt.
-
-- video port 0 for the VOP input, the remote endpoint maybe vopb or vopl
-- video port 1 for either a panel or subsequent encoder
-
-Example:
-
-lvds_panel: lvds-panel {
- compatible = "auo,b101ean01";
- enable-gpios = <&gpio7 21 GPIO_ACTIVE_HIGH>;
- data-mapping = "jeida-24";
-
- ports {
- panel_in_lvds: endpoint {
- remote-endpoint = <&lvds_out_panel>;
- };
- };
-};
-
-For Rockchip RK3288:
-
- lvds: lvds@ff96c000 {
- compatible = "rockchip,rk3288-lvds";
- rockchip,grf = <&grf>;
- reg = <0xff96c000 0x4000>;
- clocks = <&cru PCLK_LVDS_PHY>;
- clock-names = "pclk_lvds";
- pinctrl-names = "lcdc";
- pinctrl-0 = <&lcdc_ctl>;
- avdd1v0-supply = <&vdd10_lcd>;
- avdd1v8-supply = <&vcc18_lcd>;
- avdd3v3-supply = <&vcca_33>;
- rockchip,output = "rgb";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- lvds_in: port@0 {
- reg = <0>;
-
- lvds_in_vopb: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&vopb_out_lvds>;
- };
- lvds_in_vopl: endpoint@1 {
- reg = <1>;
- remote-endpoint = <&vopl_out_lvds>;
- };
- };
-
- lvds_out: port@1 {
- reg = <1>;
-
- lvds_out_panel: endpoint {
- remote-endpoint = <&panel_in_lvds>;
- };
- };
- };
- };
diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.yaml
new file mode 100644
index 000000000..f05901633
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.yaml
@@ -0,0 +1,157 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/rockchip/rockchip-lvds.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip low-voltage differential signal (LVDS) transmitter
+
+maintainers:
+ - Sandy Huang <hjc@rock-chips.com>
+ - Heiko Stuebner <heiko@sntech.de>
+
+properties:
+ compatible:
+ enum:
+ - rockchip,px30-lvds
+ - rockchip,rk3288-lvds
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ const: pclk_lvds
+
+ avdd1v0-supply:
+ description: Regulator phandle for 1.0V analog power.
+
+ avdd1v8-supply:
+ description: Regulator phandle for 1.8V analog power.
+
+ avdd3v3-supply:
+ description: Regulator phandle for 3.3V analog power.
+
+ rockchip,grf:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: Phandle to the general register files syscon.
+
+ rockchip,output:
+ $ref: /schemas/types.yaml#/definitions/string
+ enum: [rgb, lvds, duallvds]
+ description: This describes the output interface.
+
+ phys:
+ maxItems: 1
+
+ phy-names:
+ const: dphy
+
+ pinctrl-names:
+ const: lcdc
+
+ pinctrl-0: true
+
+ power-domains:
+ maxItems: 1
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description:
+ Video port 0 for the VOP input, the remote endpoint maybe vopb or vopl.
+
+ port@1:
+ $ref: /schemas/graph.yaml#/properties/port
+ description:
+ Video port 1 for either a panel or subsequent encoder.
+
+ required:
+ - port@0
+ - port@1
+
+additionalProperties: false
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: rockchip,px30-lvds
+
+ then:
+ required:
+ - phys
+ - phy-names
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: rockchip,rk3288-lvds
+
+ then:
+ required:
+ - reg
+ - clocks
+ - clock-names
+ - avdd1v0-supply
+ - avdd1v8-supply
+ - avdd3v3-supply
+
+required:
+ - compatible
+ - rockchip,grf
+ - rockchip,output
+ - ports
+
+examples:
+ - |
+ #include <dt-bindings/clock/rk3288-cru.h>
+
+ lvds: lvds@ff96c000 {
+ compatible = "rockchip,rk3288-lvds";
+ reg = <0xff96c000 0x4000>;
+ clocks = <&cru PCLK_LVDS_PHY>;
+ clock-names = "pclk_lvds";
+ avdd1v0-supply = <&vdd10_lcd>;
+ avdd1v8-supply = <&vcc18_lcd>;
+ avdd3v3-supply = <&vcca_33>;
+ pinctrl-names = "lcdc";
+ pinctrl-0 = <&lcdc_ctl>;
+ rockchip,grf = <&grf>;
+ rockchip,output = "rgb";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ lvds_in: port@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ lvds_in_vopb: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_lvds>;
+ };
+ lvds_in_vopl: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_lvds>;
+ };
+ };
+
+ lvds_out: port@1 {
+ reg = <1>;
+
+ lvds_out_panel: endpoint {
+ remote-endpoint = <&panel_in_lvds>;
+ };
+ };
+ };
+ };
--
2.20.1
On Sat, 17 Dec 2022 16:23:53 +0100, Johan Jonker wrote: > Convert rockchip-lvds.txt to YAML. > > Changed: > Add power-domains property. > Requirements between PX30 and RK3288 > > Signed-off-by: Johan Jonker <jbx6244@gmail.com> > --- > > Changed V2: > Fix title > --- > .../display/rockchip/rockchip-lvds.txt | 92 ---------- > .../display/rockchip/rockchip-lvds.yaml | 157 ++++++++++++++++++ > 2 files changed, 157 insertions(+), 92 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt > create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: doc reference errors (make refcheckdocs): Documentation/devicetree/bindings/soc/rockchip/grf.yaml: Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/dea33013-ae1b-a8b2-5287-68a52f5ce028@gmail.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On 17/12/2022 16:23, Johan Jonker wrote: > Convert rockchip-lvds.txt to YAML. > > Changed: > Add power-domains property. > Requirements between PX30 and RK3288 > > Signed-off-by: Johan Jonker <jbx6244@gmail.com> > --- > > Changed V2: > Fix title > --- > .../display/rockchip/rockchip-lvds.txt | 92 ---------- > .../display/rockchip/rockchip-lvds.yaml | 157 ++++++++++++++++++ > 2 files changed, 157 insertions(+), 92 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt > create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.yaml > > diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt > deleted file mode 100644 > index aaf8c44cf..000000000 > --- a/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt > +++ /dev/null > @@ -1,92 +0,0 @@ > -Rockchip RK3288 LVDS interface > -================================ > - > -Required properties: > -- compatible: matching the soc type, one of > - - "rockchip,rk3288-lvds"; > - - "rockchip,px30-lvds"; > - > -- reg: physical base address of the controller and length > - of memory mapped region. > -- clocks: must include clock specifiers corresponding to entries in the > - clock-names property. > -- clock-names: must contain "pclk_lvds" > - > -- avdd1v0-supply: regulator phandle for 1.0V analog power > -- avdd1v8-supply: regulator phandle for 1.8V analog power > -- avdd3v3-supply: regulator phandle for 3.3V analog power > - > -- rockchip,grf: phandle to the general register files syscon > -- rockchip,output: "rgb", "lvds" or "duallvds", This describes the output interface > - > -- phys: LVDS/DSI DPHY (px30 only) > -- phy-names: name of the PHY, must be "dphy" (px30 only) > - > -Optional properties: > -- pinctrl-names: must contain a "lcdc" entry. > -- pinctrl-0: pin control group to be used for this controller. > - > -Required nodes: > - > -The lvds has two video ports as described by > - Documentation/devicetree/bindings/media/video-interfaces.txt > -Their connections are modeled using the OF graph bindings specified in > - Documentation/devicetree/bindings/graph.txt. > - > -- video port 0 for the VOP input, the remote endpoint maybe vopb or vopl > -- video port 1 for either a panel or subsequent encoder > - > -Example: > - > -lvds_panel: lvds-panel { > - compatible = "auo,b101ean01"; > - enable-gpios = <&gpio7 21 GPIO_ACTIVE_HIGH>; > - data-mapping = "jeida-24"; > - > - ports { > - panel_in_lvds: endpoint { > - remote-endpoint = <&lvds_out_panel>; > - }; > - }; > -}; > - > -For Rockchip RK3288: > - > - lvds: lvds@ff96c000 { > - compatible = "rockchip,rk3288-lvds"; > - rockchip,grf = <&grf>; > - reg = <0xff96c000 0x4000>; > - clocks = <&cru PCLK_LVDS_PHY>; > - clock-names = "pclk_lvds"; > - pinctrl-names = "lcdc"; > - pinctrl-0 = <&lcdc_ctl>; > - avdd1v0-supply = <&vdd10_lcd>; > - avdd1v8-supply = <&vcc18_lcd>; > - avdd3v3-supply = <&vcca_33>; > - rockchip,output = "rgb"; > - ports { > - #address-cells = <1>; > - #size-cells = <0>; > - > - lvds_in: port@0 { > - reg = <0>; > - > - lvds_in_vopb: endpoint@0 { > - reg = <0>; > - remote-endpoint = <&vopb_out_lvds>; > - }; > - lvds_in_vopl: endpoint@1 { > - reg = <1>; > - remote-endpoint = <&vopl_out_lvds>; > - }; > - }; > - > - lvds_out: port@1 { > - reg = <1>; > - > - lvds_out_panel: endpoint { > - remote-endpoint = <&panel_in_lvds>; > - }; > - }; > - }; > - }; > diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.yaml > new file mode 100644 > index 000000000..f05901633 > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.yaml Filename matching compatible style, so: "rockchip,lvds.yaml" > @@ -0,0 +1,157 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/rockchip/rockchip-lvds.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Rockchip low-voltage differential signal (LVDS) transmitter > + > +maintainers: > + - Sandy Huang <hjc@rock-chips.com> > + - Heiko Stuebner <heiko@sntech.de> > + > +properties: > + compatible: > + enum: > + - rockchip,px30-lvds > + - rockchip,rk3288-lvds > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + clock-names: > + const: pclk_lvds > + > + avdd1v0-supply: > + description: Regulator phandle for 1.0V analog power. Drop "Regulator phandle for ". Same in other regulators. > + > + avdd1v8-supply: > + description: Regulator phandle for 1.8V analog power. > + > + avdd3v3-supply: > + description: Regulator phandle for 3.3V analog power. > + > + rockchip,grf: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: Phandle to the general register files syscon. > + > + rockchip,output: > + $ref: /schemas/types.yaml#/definitions/string > + enum: [rgb, lvds, duallvds] > + description: This describes the output interface. > + > + phys: > + maxItems: 1 > + > + phy-names: > + const: dphy > + > + pinctrl-names: > + const: lcdc > + > + pinctrl-0: true > + > + power-domains: > + maxItems: 1 > + > + ports: > + $ref: /schemas/graph.yaml#/properties/ports > + > + properties: > + port@0: > + $ref: /schemas/graph.yaml#/properties/port > + description: > + Video port 0 for the VOP input, the remote endpoint maybe vopb or vopl. > + > + port@1: > + $ref: /schemas/graph.yaml#/properties/port > + description: > + Video port 1 for either a panel or subsequent encoder. > + > + required: > + - port@0 > + - port@1 > + > +additionalProperties: false > + > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: rockchip,px30-lvds > + > + then: > + required: > + - phys > + - phy-names else: properties: phys: false phy-names: false (assuming it is correct) > + > + - if: > + properties: > + compatible: > + contains: > + const: rockchip,rk3288-lvds > + > + then: > + required: > + - reg > + - clocks > + - clock-names > + - avdd1v0-supply > + - avdd1v8-supply > + - avdd3v3-supply > + > +required: > + - compatible > + - rockchip,grf > + - rockchip,output > + - ports Please keep order like in example-schema.yaml: properties: required: allOf: additionalProperties: examples: > + > +examples: > + - | Best regards, Krzysztof
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