drivers/pinctrl/pinctrl-amd.c | 27 +++++++++++++++++++++------ drivers/pinctrl/pinctrl-amd.h | 7 +++---- 2 files changed, 24 insertions(+), 10 deletions(-)
Some laptops have pins which are a wake source for S0i3/S3 but which
aren't a wake source for S4/S5 and which cause issues when left unmasked
during hibernation (S4).
For example HP EliteBook 855 G7 has pin #24 that causes instant wakeup
(hibernation failure) if left unmasked (it is a wake source only for
S0i3/S3).
GPIO pin #24 on this platform is likely dedicated to WWAN XMM7360
modem since this pin triggers wake notify to WWAN modem's parent PCIe
port.
Fix this by considering a pin a wake source only if it is marked as one
for the current suspend type (S0i3/S3 vs S4/S5).
Since Z-wake pins only make sense at runtime these were excluded from
both of suspend categories, so pins with only the Z-wake flag set are
effectively treated as non-wake pins.
Fixes: 2fff0b5e1a6b ("pinctrl: amd: Mask non-wake source pins with interrupt enabled at suspend")
Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
---
Changes from v1:
* Clarify that Z pins only make sense at runtime in the commit message.
* Clarify what GPIO pin #24 is likely for on the test platform in the
commit message.
* Rename S03 and S4 to, respetively, suspend and hibernate.
drivers/pinctrl/pinctrl-amd.c | 27 +++++++++++++++++++++------
drivers/pinctrl/pinctrl-amd.h | 7 +++----
2 files changed, 24 insertions(+), 10 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
index fff6d4209ad5..a03feb5a60dd 100644
--- a/drivers/pinctrl/pinctrl-amd.c
+++ b/drivers/pinctrl/pinctrl-amd.c
@@ -908,12 +908,13 @@ static bool amd_gpio_should_save(struct amd_gpio *gpio_dev, unsigned int pin)
return false;
}
-static int amd_gpio_suspend(struct device *dev)
+static int amd_gpio_suspend_hibernate_common(struct device *dev, bool is_suspend)
{
struct amd_gpio *gpio_dev = dev_get_drvdata(dev);
struct pinctrl_desc *desc = gpio_dev->pctrl->desc;
unsigned long flags;
int i;
+ u32 wake_mask = is_suspend ? WAKE_SOURCE_SUSPEND : WAKE_SOURCE_HIBERNATE;
for (i = 0; i < desc->npins; i++) {
int pin = desc->pins[i].number;
@@ -925,11 +926,11 @@ static int amd_gpio_suspend(struct device *dev)
gpio_dev->saved_regs[i] = readl(gpio_dev->base + pin * 4) & ~PIN_IRQ_PENDING;
/* mask any interrupts not intended to be a wake source */
- if (!(gpio_dev->saved_regs[i] & WAKE_SOURCE)) {
+ if (!(gpio_dev->saved_regs[i] & wake_mask)) {
writel(gpio_dev->saved_regs[i] & ~BIT(INTERRUPT_MASK_OFF),
gpio_dev->base + pin * 4);
- pm_pr_dbg("Disabling GPIO #%d interrupt for suspend.\n",
- pin);
+ pm_pr_dbg("Disabling GPIO #%d interrupt for %s.\n",
+ pin, is_suspend ? "suspend" : "hibernate");
}
raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
@@ -938,6 +939,16 @@ static int amd_gpio_suspend(struct device *dev)
return 0;
}
+static int amd_gpio_suspend(struct device *dev)
+{
+ return amd_gpio_suspend_hibernate_common(dev, true);
+}
+
+static int amd_gpio_hibernate(struct device *dev)
+{
+ return amd_gpio_suspend_hibernate_common(dev, false);
+}
+
static int amd_gpio_resume(struct device *dev)
{
struct amd_gpio *gpio_dev = dev_get_drvdata(dev);
@@ -961,8 +972,12 @@ static int amd_gpio_resume(struct device *dev)
}
static const struct dev_pm_ops amd_gpio_pm_ops = {
- SET_LATE_SYSTEM_SLEEP_PM_OPS(amd_gpio_suspend,
- amd_gpio_resume)
+ .suspend_late = amd_gpio_suspend,
+ .resume_early = amd_gpio_resume,
+ .freeze_late = amd_gpio_hibernate,
+ .thaw_early = amd_gpio_resume,
+ .poweroff_late = amd_gpio_hibernate,
+ .restore_early = amd_gpio_resume,
};
#endif
diff --git a/drivers/pinctrl/pinctrl-amd.h b/drivers/pinctrl/pinctrl-amd.h
index 667be49c3f48..3a1e5bffaf6e 100644
--- a/drivers/pinctrl/pinctrl-amd.h
+++ b/drivers/pinctrl/pinctrl-amd.h
@@ -80,10 +80,9 @@
#define FUNCTION_MASK GENMASK(1, 0)
#define FUNCTION_INVALID GENMASK(7, 0)
-#define WAKE_SOURCE (BIT(WAKE_CNTRL_OFF_S0I3) | \
- BIT(WAKE_CNTRL_OFF_S3) | \
- BIT(WAKE_CNTRL_OFF_S4) | \
- BIT(WAKECNTRL_Z_OFF))
+#define WAKE_SOURCE_SUSPEND (BIT(WAKE_CNTRL_OFF_S0I3) | \
+ BIT(WAKE_CNTRL_OFF_S3))
+#define WAKE_SOURCE_HIBERNATE BIT(WAKE_CNTRL_OFF_S4)
struct amd_function {
const char *name;
On Mon, Jan 6, 2025 at 6:41 PM Maciej S. Szmigiero
<mail@maciej.szmigiero.name> wrote:
> Some laptops have pins which are a wake source for S0i3/S3 but which
> aren't a wake source for S4/S5 and which cause issues when left unmasked
> during hibernation (S4).
>
> For example HP EliteBook 855 G7 has pin #24 that causes instant wakeup
> (hibernation failure) if left unmasked (it is a wake source only for
> S0i3/S3).
> GPIO pin #24 on this platform is likely dedicated to WWAN XMM7360
> modem since this pin triggers wake notify to WWAN modem's parent PCIe
> port.
>
> Fix this by considering a pin a wake source only if it is marked as one
> for the current suspend type (S0i3/S3 vs S4/S5).
>
> Since Z-wake pins only make sense at runtime these were excluded from
> both of suspend categories, so pins with only the Z-wake flag set are
> effectively treated as non-wake pins.
>
> Fixes: 2fff0b5e1a6b ("pinctrl: amd: Mask non-wake source pins with interrupt enabled at suspend")
> Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
Patch applied!
Right now it will be for the merge window (v6.14-rc1) but you can
ask the stable maintainers to backport it, sometimes they pick
patches with a Fixes: tag on their own.
Yours,
Linus Walleij
On 1/6/2025 11:41, Maciej S. Szmigiero wrote:
> Some laptops have pins which are a wake source for S0i3/S3 but which
> aren't a wake source for S4/S5 and which cause issues when left unmasked
> during hibernation (S4).
>
> For example HP EliteBook 855 G7 has pin #24 that causes instant wakeup
> (hibernation failure) if left unmasked (it is a wake source only for
> S0i3/S3).
> GPIO pin #24 on this platform is likely dedicated to WWAN XMM7360
> modem since this pin triggers wake notify to WWAN modem's parent PCIe
> port.
>
> Fix this by considering a pin a wake source only if it is marked as one
> for the current suspend type (S0i3/S3 vs S4/S5).
>
> Since Z-wake pins only make sense at runtime these were excluded from
> both of suspend categories, so pins with only the Z-wake flag set are
> effectively treated as non-wake pins.
>
> Fixes: 2fff0b5e1a6b ("pinctrl: amd: Mask non-wake source pins with interrupt enabled at suspend")
> Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
Thanks!
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
>
> Changes from v1:
> * Clarify that Z pins only make sense at runtime in the commit message.
>
> * Clarify what GPIO pin #24 is likely for on the test platform in the
> commit message.
>
> * Rename S03 and S4 to, respetively, suspend and hibernate.
>
> drivers/pinctrl/pinctrl-amd.c | 27 +++++++++++++++++++++------
> drivers/pinctrl/pinctrl-amd.h | 7 +++----
> 2 files changed, 24 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
> index fff6d4209ad5..a03feb5a60dd 100644
> --- a/drivers/pinctrl/pinctrl-amd.c
> +++ b/drivers/pinctrl/pinctrl-amd.c
> @@ -908,12 +908,13 @@ static bool amd_gpio_should_save(struct amd_gpio *gpio_dev, unsigned int pin)
> return false;
> }
>
> -static int amd_gpio_suspend(struct device *dev)
> +static int amd_gpio_suspend_hibernate_common(struct device *dev, bool is_suspend)
> {
> struct amd_gpio *gpio_dev = dev_get_drvdata(dev);
> struct pinctrl_desc *desc = gpio_dev->pctrl->desc;
> unsigned long flags;
> int i;
> + u32 wake_mask = is_suspend ? WAKE_SOURCE_SUSPEND : WAKE_SOURCE_HIBERNATE;
>
> for (i = 0; i < desc->npins; i++) {
> int pin = desc->pins[i].number;
> @@ -925,11 +926,11 @@ static int amd_gpio_suspend(struct device *dev)
> gpio_dev->saved_regs[i] = readl(gpio_dev->base + pin * 4) & ~PIN_IRQ_PENDING;
>
> /* mask any interrupts not intended to be a wake source */
> - if (!(gpio_dev->saved_regs[i] & WAKE_SOURCE)) {
> + if (!(gpio_dev->saved_regs[i] & wake_mask)) {
> writel(gpio_dev->saved_regs[i] & ~BIT(INTERRUPT_MASK_OFF),
> gpio_dev->base + pin * 4);
> - pm_pr_dbg("Disabling GPIO #%d interrupt for suspend.\n",
> - pin);
> + pm_pr_dbg("Disabling GPIO #%d interrupt for %s.\n",
> + pin, is_suspend ? "suspend" : "hibernate");
> }
>
> raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
> @@ -938,6 +939,16 @@ static int amd_gpio_suspend(struct device *dev)
> return 0;
> }
>
> +static int amd_gpio_suspend(struct device *dev)
> +{
> + return amd_gpio_suspend_hibernate_common(dev, true);
> +}
> +
> +static int amd_gpio_hibernate(struct device *dev)
> +{
> + return amd_gpio_suspend_hibernate_common(dev, false);
> +}
> +
> static int amd_gpio_resume(struct device *dev)
> {
> struct amd_gpio *gpio_dev = dev_get_drvdata(dev);
> @@ -961,8 +972,12 @@ static int amd_gpio_resume(struct device *dev)
> }
>
> static const struct dev_pm_ops amd_gpio_pm_ops = {
> - SET_LATE_SYSTEM_SLEEP_PM_OPS(amd_gpio_suspend,
> - amd_gpio_resume)
> + .suspend_late = amd_gpio_suspend,
> + .resume_early = amd_gpio_resume,
> + .freeze_late = amd_gpio_hibernate,
> + .thaw_early = amd_gpio_resume,
> + .poweroff_late = amd_gpio_hibernate,
> + .restore_early = amd_gpio_resume,
> };
> #endif
>
> diff --git a/drivers/pinctrl/pinctrl-amd.h b/drivers/pinctrl/pinctrl-amd.h
> index 667be49c3f48..3a1e5bffaf6e 100644
> --- a/drivers/pinctrl/pinctrl-amd.h
> +++ b/drivers/pinctrl/pinctrl-amd.h
> @@ -80,10 +80,9 @@
> #define FUNCTION_MASK GENMASK(1, 0)
> #define FUNCTION_INVALID GENMASK(7, 0)
>
> -#define WAKE_SOURCE (BIT(WAKE_CNTRL_OFF_S0I3) | \
> - BIT(WAKE_CNTRL_OFF_S3) | \
> - BIT(WAKE_CNTRL_OFF_S4) | \
> - BIT(WAKECNTRL_Z_OFF))
> +#define WAKE_SOURCE_SUSPEND (BIT(WAKE_CNTRL_OFF_S0I3) | \
> + BIT(WAKE_CNTRL_OFF_S3))
> +#define WAKE_SOURCE_HIBERNATE BIT(WAKE_CNTRL_OFF_S4)
>
> struct amd_function {
> const char *name;
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