[PATCH v2 0/2] arm64: dts: rockchip: Add ArmSoM CM5 and CM5-IO

Jiaxing Hu posted 2 patches 1 week, 2 days ago
Only 0 patches received!
There is a newer version of this series
.../devicetree/bindings/arm/rockchip.yaml     |   7 +
arch/arm64/boot/dts/rockchip/Makefile         |   1 +
.../dts/rockchip/rk3576-armsom-cm5-io.dts     | 401 +++++++++++++
.../boot/dts/rockchip/rk3576-armsom-cm5.dtsi  | 564 ++++++++++++++++++
4 files changed, 973 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-armsom-cm5-io.dts
create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-armsom-cm5.dtsi
[PATCH v2 0/2] arm64: dts: rockchip: Add ArmSoM CM5 and CM5-IO
Posted by Jiaxing Hu 1 week, 2 days ago
Add mainline support for the ArmSoM CM5, an RK3576 compute module, and
its CM5-IO carrier board.

Patch 1 adds the binding, patch 2 the module dtsi and the carrier dts.

The on-module YT8531 PHY has no crystal and needs the SoC 25 MHz
reference clock (clk_mac_refout). Ungating it for RGMII needs a small
dwmac-rk change sent separately to netdev [1]; the clock is optional so
this DTS applies without it.

Tested on a CM5-IO: the YT8531 is probed by the motorcomm driver and the
link comes up at 1000 Mbit/s; RK806, HYM8563, eMMC, microSD, the USB3
hub and the PCIe root complex all probe. dtbs_check is clean.

I have moved to gahing@gahingwoo.com; v1 was sent from
huhuvmb88@gmail.com. Same person.

Changes in v2 (reported by sashiko-bot on v1, thanks, plus what
dtbs_check found while fixing them):
- Type-C DP alt-mode: name the altmodes child "displayport" and make
  svid a /bits/ 16 value; drop the undocumented svid from &usbdp_phy and
  add the missing mode-switch.
- Move the FUSB302 role-switch endpoint into the connector's ports; the
  fusb302 binding does not allow a port on the device node. Rename the
  node to usb-typec@22.
- Drop the ES8388 node. It was disabled and its compatible was wrong
  (the binding wants everest,es8328). The audio claim is gone from the
  commit message too.
- Drop the unreferenced gmac0_rst, bt_reg_on and wifi_host_wake_irq
  pinctrls, and the WiFi/BT claim that went with them.
- Rename the wifi-poweren-gpio pinctrl node, it collided with
  gpio-consumer.yaml.
- Describe the PHY reset at the MDIO bus level rather than with
  snps,reset-gpios. The snps properties are deprecated, and a per-PHY
  reset-gpios is applied only after the ID scan, which is too late for a
  PHY that boots held in reset. Confirmed on hardware: per-PHY reset
  leaves the PHY dark, the bus level reset brings it up.
- I did not add vmmc-supply/vqmmc-supply to the eMMC as suggested: every
  rk3576 board upstream uses full-pwr-cycle-in-suspend without them, and
  dtbs_check does not ask for them.

[1] net: stmmac: dwmac-rk: enable the reference clock for output mode

Jiaxing Hu (2):
  dt-bindings: arm: rockchip: Add ArmSoM CM5 and CM5-IO
  arm64: dts: rockchip: Add ArmSoM CM5 and CM5-IO

 .../devicetree/bindings/arm/rockchip.yaml     |   7 +
 arch/arm64/boot/dts/rockchip/Makefile         |   1 +
 .../dts/rockchip/rk3576-armsom-cm5-io.dts     | 401 +++++++++++++
 .../boot/dts/rockchip/rk3576-armsom-cm5.dtsi  | 564 ++++++++++++++++++
 4 files changed, 973 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-armsom-cm5-io.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-armsom-cm5.dtsi

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2.43.0