From: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>

Agilex5 integrates a Synopsys DesignWare USB3 controller that is probed
through dwc3-generic-plat. This series adds:

1. dt-bindings for compatible "altr,agilex5-dwc3"
2. matching entry in dwc3-generic-plat

arm64 DTS enablement is posted separately.

---
changelog:
v6->v7:
* Drop arm64 DTS patches from this series (DTS must not be mixed into a
  USB-targeted series). DTS is reposted separately.

v6 patch link:
https://lore.kernel.org/all/cover.1788886615.git.adrian.ho.yin.ng@altera.com/

v5->v6:
* Make snps,dis_u2_susphy_quirk and snps,dis_u3_susphy_quirk required.

v5 patch link:
https://lore.kernel.org/all/cover.1788757821.git.adrian.ho.yin.ng@altera.com/

v4->v5:
* Binding: replace unevaluatedProperties: false with additionalProperties:
  false, and allow only the extra DWC3 properties used on this SoC via
  "foo: true".

v4 patch link:
https://lore.kernel.org/all/cover.1788503540.git.adrian.ho.yin.ng@altera.com/

v3->v4:
* Drop clk binding/driver patches; reuse AGILEX5_USB31_SUSPEND_CLK for
  both "ref" and "suspend".
* Update altr,agilex5-dwc3.yaml per review.
* Limit the series to USB binding, DTS, and dwc3-generic-plat.

v3 patch link:
https://lore.kernel.org/all/cover.1786518803.git.adrian.ho.yin.ng@altera.com/

v2->v3:
* Drop dma_addressable_bits; describe 40-bit DMA limit with dma-ranges.
* Keep Agilex5 support in dwc3-generic-plat as a compatible match only.

v2 patch link:
https://lore.kernel.org/all/cover.1765249127.git.adrianhoyin.ng@altera.com/

v1->v2:
* Flattened model + dwc3-generic-plat instead of dwc3-of-simple.
* Split USB3 add vs USB0 disable in DTS (still wrongly kept in USB
  series until v7).

v1 patch link:
https://lore.kernel.org/all/cover.1762839776.git.adrianhoyin.ng@altera.com/
---

Adrian Ng Ho Yin (2):
  dt-bindings: usb: add Altera Agilex5 DWC3 controller
  usb: dwc3: add Altera Agilex5 support to generic platform driver

 .../bindings/usb/altr,agilex5-dwc3.yaml       | 112 ++++++++++++++++++
 drivers/usb/dwc3/dwc3-generic-plat.c          |   1 +
 2 files changed, 113 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/altr,agilex5-dwc3.yaml


base-commit: bc35965f6940a9bf834d54187b6088b8eb09206d
-- 
2.49.GIT

On 9/11/2026 5:04 PM, adrian.ho.yin.ng@altera.com wrote:
> From: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>
> 
> Agilex5 integrates a Synopsys DesignWare USB3 controller that is probed
> through dwc3-generic-plat. This series adds:
> 
> 1. dt-bindings for compatible "altr,agilex5-dwc3"
> 2. matching entry in dwc3-generic-plat
> 
> arm64 DTS enablement is posted separately.
> 
Hi All,

Gentle reminder for this patchset.
The device tree patch has been applied by the DT maintainer.
https://lore.kernel.org/all/02d94760-6e5e-40cf-9354-63b9bca5d682@kernel.org/

Thanks
Adrian
> ---
> changelog:
> v6->v7:
> * Drop arm64 DTS patches from this series (DTS must not be mixed into a
>    USB-targeted series). DTS is reposted separately.
> 
> v6 patch link:
> https://lore.kernel.org/all/cover.1788886615.git.adrian.ho.yin.ng@altera.com/
> 
> v5->v6:
> * Make snps,dis_u2_susphy_quirk and snps,dis_u3_susphy_quirk required.
> 
> v5 patch link:
> https://lore.kernel.org/all/cover.1788757821.git.adrian.ho.yin.ng@altera.com/
> 
> v4->v5:
> * Binding: replace unevaluatedProperties: false with additionalProperties:
>    false, and allow only the extra DWC3 properties used on this SoC via
>    "foo: true".
> 
> v4 patch link:
> https://lore.kernel.org/all/cover.1788503540.git.adrian.ho.yin.ng@altera.com/
> 
> v3->v4:
> * Drop clk binding/driver patches; reuse AGILEX5_USB31_SUSPEND_CLK for
>    both "ref" and "suspend".
> * Update altr,agilex5-dwc3.yaml per review.
> * Limit the series to USB binding, DTS, and dwc3-generic-plat.
> 
> v3 patch link:
> https://lore.kernel.org/all/cover.1786518803.git.adrian.ho.yin.ng@altera.com/
> 
> v2->v3:
> * Drop dma_addressable_bits; describe 40-bit DMA limit with dma-ranges.
> * Keep Agilex5 support in dwc3-generic-plat as a compatible match only.
> 
> v2 patch link:
> https://lore.kernel.org/all/cover.1765249127.git.adrianhoyin.ng@altera.com/
> 
> v1->v2:
> * Flattened model + dwc3-generic-plat instead of dwc3-of-simple.
> * Split USB3 add vs USB0 disable in DTS (still wrongly kept in USB
>    series until v7).
> 
> v1 patch link:
> https://lore.kernel.org/all/cover.1762839776.git.adrianhoyin.ng@altera.com/
> ---
> 
> Adrian Ng Ho Yin (2):
>    dt-bindings: usb: add Altera Agilex5 DWC3 controller
>    usb: dwc3: add Altera Agilex5 support to generic platform driver
> 
>   .../bindings/usb/altr,agilex5-dwc3.yaml       | 112 ++++++++++++++++++
>   drivers/usb/dwc3/dwc3-generic-plat.c          |   1 +
>   2 files changed, 113 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/usb/altr,agilex5-dwc3.yaml
> 
> 
> base-commit: bc35965f6940a9bf834d54187b6088b8eb09206d

On Sat, Sep 19, 2026, Ng, Adrian Ho Yin wrote:
> On 9/11/2026 5:04 PM, adrian.ho.yin.ng@altera.com wrote:
> > From: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>
> > 
> > Agilex5 integrates a Synopsys DesignWare USB3 controller that is probed
> > through dwc3-generic-plat. This series adds:
> > 
> > 1. dt-bindings for compatible "altr,agilex5-dwc3"
> > 2. matching entry in dwc3-generic-plat
> > 
> > arm64 DTS enablement is posted separately.
> > 
> Hi All,
> 
> Gentle reminder for this patchset.
> The device tree patch has been applied by the DT maintainer.
> https://urldefense.com/v3/__https://lore.kernel.org/all/02d94760-6e5e-40cf-9354-63b9bca5d682@kernel.org/__;!!A4F2R9G_pg!fOoRba7F0n_QcIeLW1hJWdqm-cZ-1LeU5F9IMVQONnR-eK5J5_SUcboibLdpMDbyKiobonza5DWeJd63mx8kk5_kzayZsEM$
> 

This series has already been reviewed and approved, and the
corresponding Acked-by and Reviewed-by tags are included.

It's just waiting for Greg to pick it up.

BR,
Thinh