The SMMUv3 driver doesn't handle events on the PRI queue or respond to IOPF
faults. This series adds the missing pieces, using the IOPF infrastructure,
to convert PRI page requests into iopf_faults and issue CMDQ_OP_PRI_RESP.
The iopf_queue_flush_dev() contract requires the driver to first drain the
hardware PRI queue and synchronize using a threaded IRQ handler before the
IOPF software flush. This drove the additional commits compared to v1:
- arm_smmu_drain_queue() drains the hardware queue by counting the
entries that the threaded IRQ handler consumes
- arm_smmu_attach_release() moves the teardown outside the global lock
- synchronize_irq() closes the gap before the final flush
Note that, although this series is only about PRIQ and EVTQ, the Q_POS and
arm_smmu_drain_queue() helpers will be shared with Pranj's RPM series, per
discussion below for CMDQ to use as well:
https://lore.kernel.org/all/ao3ljjiXhnSJte5A@google.com/
Also, two patches in this series have some conflict with the kdump series:
https://lore.kernel.org/all/cover.1788130528.git.nicolinc@nvidia.com/
As the kdump one is still under review, I leave those as-is, since Sashiko
review relies on a clean rebase on linux-next to scan the series. Once the
kdump series gets merged, I will rebase those kdump related stuff. For now,
I think the series is good to collect review comments.
This is on Github:
https://github.com/nicolinc/iommufd/commits/smmuv3_pri-v3
FWIW, engineers on the NVIDIA side have managed to verify the PRI feature.
Changelog
v3:
* Rebase on v7.3-rc1
* Drop FEAT_SVA gate on IOPF queue allocation
* Discard partial PRI faults on PRIQ overflow
* Refuse PRI on a PCIe master with stall_enabled
* Merge and ratelimit the unexpected PRI request prints
* Disable EVTQ/PRIQ/combined IRQs before iopf_queue_free()
* Reclaim a leaked IOPF enrollment in arm_smmu_release_device()
* Leak master_domain on a drain timeout instead of risking a UAF
* Fix the IOMMU_PAGE_RESP code mapping in arm_smmu_page_response()
* Rework arm_smmu_drain_queue() into a counting-based sleeping poll
* Split the fault event drain and the fault work flush into two patches
* Drop IOMMU_FAULT_PAGE_REQUEST_STALLS_TRANS; dispatch on per-master state
v2:
https://lore.kernel.org/all/cover.1779944354.git.nicolinc@nvidia.com/
* Allocate evtq.iopf for ARM_SMMU_FEAT_PRI
* Pick up Jean's PRI stubs and PRI export patches
* Enable PRI for PCI devices in arm_smmu_probe_device()
* Add arm_smmu_drain_queue_for_iopf() for EVTQ and PRIQ
* Add arm_smmu_attach_release() to rework the IOPF drain
* Add IOMMU_FAULT_PAGE_REQUEST_STALLS_TRANS for STALL mode
* Gate pci_enable_pri() on FEAT_PRI plus a non-NULL evtq.iopf
* Deny unrecognised-StreamID PRG_LAST in arm_smmu_handle_ppr()
* Disable PRI when no IRQ handler is registered (unique or combined IRQ)
v1:
https://lore.kernel.org/all/cover.1772568590.git.nicolinc@nvidia.com/
Jean-Philippe Brucker (2):
PCI/ATS: Add PRI stubs
PCI/ATS: Export pci_enable_pri() and pci_reset_pri()
Malak Marrid (1):
iommu/arm-smmu-v3: Submit CMDQ_OP_PRI_RESP for IOPF event
Nicolin Chen (10):
iommu/arm-smmu-v3: Add arm_smmu_attach_release()
iommu/arm-smmu-v3: Add Q_POS() macro
iommu/arm-smmu-v3: Drain in-flight fault events on domain detach
iommu/arm-smmu-v3: Flush in-flight fault work on domain detach
iommu/arm-smmu-v3: Allocate IOPF queue without FEAT_SVA
iommu/arm-smmu-v3: Disable the queue IRQs before disabling the SMMU
iommu/arm-smmu-v3: Disable PRI when no IRQ handler is registered
iommu/arm-smmu-v3: Support PRI Page Request in arm_smmu_handle_ppr()
iommu/arm-smmu-v3: Allocate IOPF queue for ARM_SMMU_FEAT_PRI
iommu/arm-smmu-v3: Enable PRI for PCI device in
arm_smmu_probe_device()
drivers/iommu/arm/Kconfig | 2 +
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 5 +
include/linux/pci-ats.h | 5 +
.../arm/arm-smmu-v3/arm-smmu-v3-iommufd.c | 1 +
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 417 +++++++++++++++---
drivers/pci/ats.c | 2 +
6 files changed, 382 insertions(+), 50 deletions(-)
base-commit: cee9395acd8043be0644b25c34bfa86623f2b935
--
2.43.0