Dear All,

This patch series adds support for the DSI IP found on the Renesas RZ/G3E SoC.
This apply on top of [1] + [2].

[1] https://lore.kernel.org/all/20260429170012.366537-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
[2] https://lore.kernel.org/all/cover.1778141145.git.tommaso.merciai.xr@bp.renesas.com/

Thanks & Regards,
Tommaso

v6->v7:
 - Rebased on top of next-20260605
 - Split the original series into smaller chunks for easy review and easy
   merging. The original series is available here:
   http://lore.kernel.org/all/cover.1775636898.git.tommaso.merciai.xr@bp.renesas.com/
 - PATCH 2/4: Collected Laurent Pinchart tag
 - PATCH 3/4: Reworked commit without static clock selection based on DT,
   instead clock selection can be done at runtime based on the CRTC output
   routing, this reflects better the HW behavior and allows more flexible
   configurations.
 - PATCH 4/4: Added missing const to rzg3e_mipi_dsi_info struct

Tommaso Merciai (4):
  dt-bindings: display: bridge: renesas,dsi: Add support for RZ/G3E SoC
  drm: renesas: rz-du: mipi_dsi: Add out_port to OF data
  drm: renesas: rz-du: mipi_dsi: Add RZ_MIPI_DSI_FEATURE_GPO0R feature
  drm: renesas: rz-du: mipi_dsi: Add support for RZ/G3E

 .../bindings/display/bridge/renesas,dsi.yaml  | 144 +++++++++++++-----
 .../gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c    |  78 ++++++++--
 .../drm/renesas/rz-du/rzg2l_mipi_dsi_regs.h   |   3 +
 3 files changed, 181 insertions(+), 44 deletions(-)

-- 
2.54.0