Privilege Level Zero Association (PLZA) is configured with a Per Logical
Processor MSR: MSR_IA32_PQR_PLZA_ASSOC (0xc00003fc).
Add the necessary data structures and definitions to support PLZA
configuration.
Signed-off-by: Babu Moger <babu.moger@amd.com>
---
v2: No changes. Just rebasing on top of the latest tip branch.
---
arch/x86/include/asm/msr-index.h | 7 +++++++
arch/x86/kernel/cpu/resctrl/internal.h | 26 ++++++++++++++++++++++++++
2 files changed, 33 insertions(+)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index be3e3cc963b2..c96fb7db3ca9 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -1282,10 +1282,17 @@
/* - AMD: */
#define MSR_IA32_MBA_BW_BASE 0xc0000200
#define MSR_IA32_SMBA_BW_BASE 0xc0000280
+#define MSR_IA32_PQR_PLZA_ASSOC 0xc00003fc
#define MSR_IA32_L3_QOS_ABMC_CFG 0xc00003fd
#define MSR_IA32_L3_QOS_EXT_CFG 0xc00003ff
#define MSR_IA32_EVT_CFG_BASE 0xc0000400
+/* Lower 32 bits of MSR_IA32_PQR_PLZA_ASSOC */
+#define RMID_EN BIT(31)
+/* Upper 32 bits of MSR_IA32_PQR_PLZA_ASSOC */
+#define CLOSID_EN BIT(15)
+#define PLZA_EN BIT(31)
+
/* AMD-V MSRs */
#define MSR_VM_CR 0xc0010114
#define MSR_VM_IGNNE 0xc0010115
diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h
index e3cfa0c10e92..403849a22e91 100644
--- a/arch/x86/kernel/cpu/resctrl/internal.h
+++ b/arch/x86/kernel/cpu/resctrl/internal.h
@@ -222,6 +222,32 @@ union l3_qos_abmc_cfg {
unsigned long full;
};
+/*
+ * PLZA can be configured on a CPU by writing to MSR_IA32_PQR_PLZA_ASSOC.
+ *
+ * @rmid : The RMID to be configured for PLZA.
+ * @reserved1 : Reserved.
+ * @rmid_en : Associate RMID or not.
+ * @closid : The CLOSID to be configured for PLZA.
+ * @reserved2 : Reserved.
+ * @closid_en : Associate CLOSID or not.
+ * @reserved3 : Reserved.
+ * @plza_en : Configure PLZA or not.
+ */
+union qos_pqr_plza_assoc {
+ struct {
+ unsigned long rmid :12,
+ reserved1 :19,
+ rmid_en : 1,
+ closid : 4,
+ reserved2 :11,
+ closid_en : 1,
+ reserved3 :15,
+ plza_en : 1;
+ } split;
+ unsigned long full;
+};
+
void rdt_ctrl_update(void *arg);
int rdt_get_l3_mon_config(struct rdt_resource *r);
--
2.43.0