Due to a prior lack of real-world hardware support, the SMMUv3 driver does
not handles events on the PRI queue nor respond to IOPF faults.

NVIDIA has introduced a new SoC that supports PRI, and other vendors might
likely have hardware requiring this feature as well. It's time to fill the
missing pieces in the driver by leveraging the IOPF infrastructure:
 - Convert PRI events from the PRI queue into iopf_faults
 - Respond to iopf_faults by issuing CMDQ_OP_PRI_RESP

These patches were initially written on an older kernel and lightly tested
on NVIDIA SoC. I have rebased/reworked them on top of v7.0-rc2, so further
testing is required.

This is on Github:
https://github.com/nicolinc/iommufd/commits/smmuv3_pri-v1

Malak Marrid (3):
  iommu/arm-smmu-v3: Drain in-flight fault handlers
  iommu/arm-smmu-v3: Submit CMDQ_OP_PRI_RESP for IOPF event
  iommu/arm-smmu-v3: Support PRI Page Request

 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 135 +++++++++++++-------
 1 file changed, 86 insertions(+), 49 deletions(-)

-- 
2.43.0