Add support for AD4085 16-bit SAR ADC. The AD4085 has the same
resolution as AD4084 (16-bit) but differs in LVDS CNV clock count
maximum (8 vs 2).
Changes:
- Add AD4085_CHIP_ID definition (0x0055)
- Create ad4085_channel with 16-bit resolution and 16-bit storage
- Add ad4085_chip_info with lvds_cnv_clk_cnt_max = 8
- Register AD4085 in device ID and OF match tables
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
drivers/iio/adc/ad4080.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
index 7cbbe284dea7..728df626f09e 100644
--- a/drivers/iio/adc/ad4080.c
+++ b/drivers/iio/adc/ad4080.c
@@ -130,6 +130,7 @@
#define AD4082_CHIP_ID 0x0052
#define AD4083_CHIP_ID 0x0053
#define AD4084_CHIP_ID 0x0054
+#define AD4085_CHIP_ID 0x0055
#define AD4086_CHIP_ID 0x0056
#define AD4087_CHIP_ID 0x0057
@@ -449,6 +450,8 @@ static const struct iio_chan_spec ad4083_channel = AD4080_CHANNEL_DEFINE(16, 16)
static const struct iio_chan_spec ad4084_channel = AD4080_CHANNEL_DEFINE(16, 16);
+static const struct iio_chan_spec ad4085_channel = AD4080_CHANNEL_DEFINE(16, 16);
+
static const struct iio_chan_spec ad4086_channel = AD4080_CHANNEL_DEFINE(14, 16);
static const struct iio_chan_spec ad4087_channel = AD4080_CHANNEL_DEFINE(14, 16);
@@ -503,6 +506,16 @@ static const struct ad4080_chip_info ad4084_chip_info = {
.lvds_cnv_clk_cnt_max = 2,
};
+static const struct ad4080_chip_info ad4085_chip_info = {
+ .name = "ad4085",
+ .product_id = AD4085_CHIP_ID,
+ .scale_table = ad4080_scale_table,
+ .num_scales = ARRAY_SIZE(ad4080_scale_table),
+ .num_channels = 1,
+ .channels = &ad4085_channel,
+ .lvds_cnv_clk_cnt_max = 8,
+};
+
static const struct ad4080_chip_info ad4086_chip_info = {
.name = "ad4086",
.product_id = AD4086_CHIP_ID,
@@ -682,6 +695,7 @@ static const struct spi_device_id ad4080_id[] = {
{ "ad4082", (kernel_ulong_t)&ad4082_chip_info },
{ "ad4083", (kernel_ulong_t)&ad4083_chip_info },
{ "ad4084", (kernel_ulong_t)&ad4084_chip_info },
+ { "ad4085", (kernel_ulong_t)&ad4085_chip_info },
{ "ad4086", (kernel_ulong_t)&ad4086_chip_info },
{ "ad4087", (kernel_ulong_t)&ad4087_chip_info },
{ }
@@ -694,6 +708,7 @@ static const struct of_device_id ad4080_of_match[] = {
{ .compatible = "adi,ad4082", &ad4082_chip_info },
{ .compatible = "adi,ad4083", &ad4083_chip_info },
{ .compatible = "adi,ad4084", &ad4084_chip_info },
+ { .compatible = "adi,ad4085", &ad4085_chip_info },
{ .compatible = "adi,ad4086", &ad4086_chip_info },
{ .compatible = "adi,ad4087", &ad4087_chip_info },
{ }
--
2.43.0
On Fri, 2026-02-06 at 15:08 +0200, Antoniu Miclaus wrote:
> Add support for AD4085 16-bit SAR ADC. The AD4085 has the same
> resolution as AD4084 (16-bit) but differs in LVDS CNV clock count
> maximum (8 vs 2).
>
> Changes:
> - Add AD4085_CHIP_ID definition (0x0055)
> - Create ad4085_channel with 16-bit resolution and 16-bit storage
> - Add ad4085_chip_info with lvds_cnv_clk_cnt_max = 8
> - Register AD4085 in device ID and OF match tables
>
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> ---
I do agree with Andy that the commit is too verbose. With that handled:
Reviewed-by: Nuno Sá <nuno.sa@analog.com>
> drivers/iio/adc/ad4080.c | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
> index 7cbbe284dea7..728df626f09e 100644
> --- a/drivers/iio/adc/ad4080.c
> +++ b/drivers/iio/adc/ad4080.c
> @@ -130,6 +130,7 @@
> #define AD4082_CHIP_ID 0x0052
> #define AD4083_CHIP_ID 0x0053
> #define AD4084_CHIP_ID 0x0054
> +#define AD4085_CHIP_ID 0x0055
> #define AD4086_CHIP_ID 0x0056
> #define AD4087_CHIP_ID 0x0057
>
> @@ -449,6 +450,8 @@ static const struct iio_chan_spec ad4083_channel =
> AD4080_CHANNEL_DEFINE(16, 16)
>
> static const struct iio_chan_spec ad4084_channel = AD4080_CHANNEL_DEFINE(16, 16);
>
> +static const struct iio_chan_spec ad4085_channel = AD4080_CHANNEL_DEFINE(16, 16);
> +
> static const struct iio_chan_spec ad4086_channel = AD4080_CHANNEL_DEFINE(14, 16);
>
> static const struct iio_chan_spec ad4087_channel = AD4080_CHANNEL_DEFINE(14, 16);
> @@ -503,6 +506,16 @@ static const struct ad4080_chip_info ad4084_chip_info = {
> .lvds_cnv_clk_cnt_max = 2,
> };
>
> +static const struct ad4080_chip_info ad4085_chip_info = {
> + .name = "ad4085",
> + .product_id = AD4085_CHIP_ID,
> + .scale_table = ad4080_scale_table,
> + .num_scales = ARRAY_SIZE(ad4080_scale_table),
> + .num_channels = 1,
> + .channels = &ad4085_channel,
> + .lvds_cnv_clk_cnt_max = 8,
> +};
> +
> static const struct ad4080_chip_info ad4086_chip_info = {
> .name = "ad4086",
> .product_id = AD4086_CHIP_ID,
> @@ -682,6 +695,7 @@ static const struct spi_device_id ad4080_id[] = {
> { "ad4082", (kernel_ulong_t)&ad4082_chip_info },
> { "ad4083", (kernel_ulong_t)&ad4083_chip_info },
> { "ad4084", (kernel_ulong_t)&ad4084_chip_info },
> + { "ad4085", (kernel_ulong_t)&ad4085_chip_info },
> { "ad4086", (kernel_ulong_t)&ad4086_chip_info },
> { "ad4087", (kernel_ulong_t)&ad4087_chip_info },
> { }
> @@ -694,6 +708,7 @@ static const struct of_device_id ad4080_of_match[] = {
> { .compatible = "adi,ad4082", &ad4082_chip_info },
> { .compatible = "adi,ad4083", &ad4083_chip_info },
> { .compatible = "adi,ad4084", &ad4084_chip_info },
> + { .compatible = "adi,ad4085", &ad4085_chip_info },
> { .compatible = "adi,ad4086", &ad4086_chip_info },
> { .compatible = "adi,ad4087", &ad4087_chip_info },
> { }
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