iio: adc: ad4080: add support for AD4082, AD4085 and AD4088

[PATCH 2/6] iio: adc: ad4080: add support for AD4082

Posted by Antoniu Miclaus 2 days, 21 hours ago

Add support for AD4082 20-bit SAR ADC. The AD4082 has the same
resolution as AD4080 (20-bit) but differs in LVDS CNV clock count
maximum (8 vs 7).

Changes:
- Add AD4082_CHIP_ID definition (0x0052)
- Create ad4082_channel with 20-bit resolution and 32-bit storage
- Add ad4082_chip_info with lvds_cnv_clk_cnt_max = 8
- Register AD4082 in device ID and OF match tables

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
 drivers/iio/adc/ad4080.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
index 7cf3b6ed7940..7cbbe284dea7 100644
--- a/drivers/iio/adc/ad4080.c
+++ b/drivers/iio/adc/ad4080.c
@@ -127,6 +127,7 @@
 #define AD4080_SPI_READ						BIT(7)
 #define AD4080_CHIP_ID						0x0050
 #define AD4081_CHIP_ID						0x0051
+#define AD4082_CHIP_ID						0x0052
 #define AD4083_CHIP_ID						0x0053
 #define AD4084_CHIP_ID						0x0054
 #define AD4086_CHIP_ID						0x0056
@@ -442,6 +443,8 @@ static const struct iio_chan_spec ad4080_channel = AD4080_CHANNEL_DEFINE(20, 32)
 
 static const struct iio_chan_spec ad4081_channel = AD4080_CHANNEL_DEFINE(20, 32);
 
+static const struct iio_chan_spec ad4082_channel = AD4080_CHANNEL_DEFINE(20, 32);
+
 static const struct iio_chan_spec ad4083_channel = AD4080_CHANNEL_DEFINE(16, 16);
 
 static const struct iio_chan_spec ad4084_channel = AD4080_CHANNEL_DEFINE(16, 16);
@@ -470,6 +473,16 @@ static const struct ad4080_chip_info ad4081_chip_info = {
 	.lvds_cnv_clk_cnt_max = 2,
 };
 
+static const struct ad4080_chip_info ad4082_chip_info = {
+	.name = "ad4082",
+	.product_id = AD4082_CHIP_ID,
+	.scale_table = ad4080_scale_table,
+	.num_scales = ARRAY_SIZE(ad4080_scale_table),
+	.num_channels = 1,
+	.channels = &ad4082_channel,
+	.lvds_cnv_clk_cnt_max = 8,
+};
+
 static const struct ad4080_chip_info ad4083_chip_info = {
 	.name = "ad4083",
 	.product_id = AD4083_CHIP_ID,
@@ -666,6 +679,7 @@ static int ad4080_probe(struct spi_device *spi)
 static const struct spi_device_id ad4080_id[] = {
 	{ "ad4080", (kernel_ulong_t)&ad4080_chip_info },
 	{ "ad4081", (kernel_ulong_t)&ad4081_chip_info },
+	{ "ad4082", (kernel_ulong_t)&ad4082_chip_info },
 	{ "ad4083", (kernel_ulong_t)&ad4083_chip_info },
 	{ "ad4084", (kernel_ulong_t)&ad4084_chip_info },
 	{ "ad4086", (kernel_ulong_t)&ad4086_chip_info },
@@ -677,6 +691,7 @@ MODULE_DEVICE_TABLE(spi, ad4080_id);
 static const struct of_device_id ad4080_of_match[] = {
 	{ .compatible = "adi,ad4080", &ad4080_chip_info },
 	{ .compatible = "adi,ad4081", &ad4081_chip_info },
+	{ .compatible = "adi,ad4082", &ad4082_chip_info },
 	{ .compatible = "adi,ad4083", &ad4083_chip_info },
 	{ .compatible = "adi,ad4084", &ad4084_chip_info },
 	{ .compatible = "adi,ad4086", &ad4086_chip_info },
-- 
2.43.0

Re: [PATCH 2/6] iio: adc: ad4080: add support for AD4082

Posted by Nuno Sá 1 day, 1 hour ago

On Fri, 2026-02-06 at 15:08 +0200, Antoniu Miclaus wrote:
> Add support for AD4082 20-bit SAR ADC. The AD4082 has the same
> resolution as AD4080 (20-bit) but differs in LVDS CNV clock count
> maximum (8 vs 7).
> 
> Changes:
> - Add AD4082_CHIP_ID definition (0x0052)
> - Create ad4082_channel with 20-bit resolution and 32-bit storage
> - Add ad4082_chip_info with lvds_cnv_clk_cnt_max = 8
> - Register AD4082 in device ID and OF match tables
> 
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> ---

And same,

Reviewed-by: Nuno Sá <nuno.sa@analog.com>

>  drivers/iio/adc/ad4080.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
> index 7cf3b6ed7940..7cbbe284dea7 100644
> --- a/drivers/iio/adc/ad4080.c
> +++ b/drivers/iio/adc/ad4080.c
> @@ -127,6 +127,7 @@
>  #define AD4080_SPI_READ						BIT(7)
>  #define AD4080_CHIP_ID						0x0050
>  #define AD4081_CHIP_ID						0x0051
> +#define AD4082_CHIP_ID						0x0052
>  #define AD4083_CHIP_ID						0x0053
>  #define AD4084_CHIP_ID						0x0054
>  #define AD4086_CHIP_ID						0x0056
> @@ -442,6 +443,8 @@ static const struct iio_chan_spec ad4080_channel =
> AD4080_CHANNEL_DEFINE(20, 32)
>  
>  static const struct iio_chan_spec ad4081_channel = AD4080_CHANNEL_DEFINE(20, 32);
>  
> +static const struct iio_chan_spec ad4082_channel = AD4080_CHANNEL_DEFINE(20, 32);
> +
>  static const struct iio_chan_spec ad4083_channel = AD4080_CHANNEL_DEFINE(16, 16);
>  
>  static const struct iio_chan_spec ad4084_channel = AD4080_CHANNEL_DEFINE(16, 16);
> @@ -470,6 +473,16 @@ static const struct ad4080_chip_info ad4081_chip_info = {
>  	.lvds_cnv_clk_cnt_max = 2,
>  };
>  
> +static const struct ad4080_chip_info ad4082_chip_info = {
> +	.name = "ad4082",
> +	.product_id = AD4082_CHIP_ID,
> +	.scale_table = ad4080_scale_table,
> +	.num_scales = ARRAY_SIZE(ad4080_scale_table),
> +	.num_channels = 1,
> +	.channels = &ad4082_channel,
> +	.lvds_cnv_clk_cnt_max = 8,
> +};
> +
>  static const struct ad4080_chip_info ad4083_chip_info = {
>  	.name = "ad4083",
>  	.product_id = AD4083_CHIP_ID,
> @@ -666,6 +679,7 @@ static int ad4080_probe(struct spi_device *spi)
>  static const struct spi_device_id ad4080_id[] = {
>  	{ "ad4080", (kernel_ulong_t)&ad4080_chip_info },
>  	{ "ad4081", (kernel_ulong_t)&ad4081_chip_info },
> +	{ "ad4082", (kernel_ulong_t)&ad4082_chip_info },
>  	{ "ad4083", (kernel_ulong_t)&ad4083_chip_info },
>  	{ "ad4084", (kernel_ulong_t)&ad4084_chip_info },
>  	{ "ad4086", (kernel_ulong_t)&ad4086_chip_info },
> @@ -677,6 +691,7 @@ MODULE_DEVICE_TABLE(spi, ad4080_id);
>  static const struct of_device_id ad4080_of_match[] = {
>  	{ .compatible = "adi,ad4080", &ad4080_chip_info },
>  	{ .compatible = "adi,ad4081", &ad4081_chip_info },
> +	{ .compatible = "adi,ad4082", &ad4082_chip_info },
>  	{ .compatible = "adi,ad4083", &ad4083_chip_info },
>  	{ .compatible = "adi,ad4084", &ad4084_chip_info },
>  	{ .compatible = "adi,ad4086", &ad4086_chip_info },

Re: [PATCH 2/6] iio: adc: ad4080: add support for AD4082

Posted by Andy Shevchenko 2 days, 21 hours ago

On Fri, Feb 06, 2026 at 03:08:21PM +0200, Antoniu Miclaus wrote:
> Add support for AD4082 20-bit SAR ADC. The AD4082 has the same
> resolution as AD4080 (20-bit) but differs in LVDS CNV clock count
> maximum (8 vs 7).

> Changes:
> - Add AD4082_CHIP_ID definition (0x0052)
> - Create ad4082_channel with 20-bit resolution and 32-bit storage
> - Add ad4082_chip_info with lvds_cnv_clk_cnt_max = 8
> - Register AD4082 in device ID and OF match tables

TBH, I think this section is too much for the commit message...

> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> ---

...and just as good to be placed here.

Otherwise, LGTM,
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH 2/6] iio: adc: ad4080: add support for AD4082

Posted by Andy Shevchenko 2 days, 21 hours ago

On Fri, Feb 06, 2026 at 03:56:13PM +0200, Andy Shevchenko wrote:
> On Fri, Feb 06, 2026 at 03:08:21PM +0200, Antoniu Miclaus wrote:
> > Add support for AD4082 20-bit SAR ADC. The AD4082 has the same
> > resolution as AD4080 (20-bit) but differs in LVDS CNV clock count
> > maximum (8 vs 7).
> 
> > Changes:
> > - Add AD4082_CHIP_ID definition (0x0052)
> > - Create ad4082_channel with 20-bit resolution and 32-bit storage
> > - Add ad4082_chip_info with lvds_cnv_clk_cnt_max = 8
> > - Register AD4082 in device ID and OF match tables
> 
> TBH, I think this section is too much for the commit message...
> 
> > Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> > ---
> 
> ...and just as good to be placed here.
> 
> Otherwise, LGTM,
> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>

Same comments for the patches 4 & 6. With that being addressed,
feel free to add my Rb there as well.

-- 
With Best Regards,
Andy Shevchenko