The Lantiq GSWIP and MaxLinear GSW1xx drivers are currently relying on a
hard-coded mapping of MII ports to their respective MII_CFG and MII_PCDU
registers and only allow applying an offset to the port index.
While this is sufficient for the currently supported hardware, the very
similar Intel GSW150 (aka. Lantiq PEB7084) cannot be described using
this arrangement.
Introduce two arrays to specify the MII_CFG and MII_PCDU registers for
each port, replacing the current bitmap used to safeguard MII ports as
well as the port index offset.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
v4: spell out mii_cfg and mii_pcdu values in struct gswip_hw_info instead
of using default initializer which requires diag exception
v3: enclose the gswip_hw_info initializers in compiler diag exception
to prevent triggering -Woverride-init
v2: introduce GSWIP_MAX_PORTS macro
drivers/net/dsa/lantiq/lantiq_gswip.c | 35 ++++++++++++++----
drivers/net/dsa/lantiq/lantiq_gswip.h | 6 ++--
drivers/net/dsa/lantiq/lantiq_gswip_common.c | 27 +++-----------
drivers/net/dsa/lantiq/mxl-gsw1xx.c | 37 ++++++++++++++++----
4 files changed, 68 insertions(+), 37 deletions(-)
diff --git a/drivers/net/dsa/lantiq/lantiq_gswip.c b/drivers/net/dsa/lantiq/lantiq_gswip.c
index b094001a7c805..0377fc0079b54 100644
--- a/drivers/net/dsa/lantiq/lantiq_gswip.c
+++ b/drivers/net/dsa/lantiq/lantiq_gswip.c
@@ -463,10 +463,22 @@ static void gswip_shutdown(struct platform_device *pdev)
}
static const struct gswip_hw_info gswip_xrx200 = {
- .max_ports = 7,
+ .max_ports = GSWIP_MAX_PORTS,
.allowed_cpu_ports = BIT(6),
- .mii_ports = BIT(0) | BIT(1) | BIT(5),
- .mii_port_reg_offset = 0,
+ .mii_cfg = {
+ [0] = GSWIP_MII_CFGp(0),
+ [1] = GSWIP_MII_CFGp(1),
+ [2 ... 4] = -1,
+ [5] = GSWIP_MII_CFGp(5),
+ [6] = -1,
+ },
+ .mii_pcdu = {
+ [0] = GSWIP_MII_PCDU0,
+ [1] = GSWIP_MII_PCDU1,
+ [2 ... 4] = -1,
+ [5] = GSWIP_MII_PCDU5,
+ [6] = -1,
+ },
.phylink_get_caps = gswip_xrx200_phylink_get_caps,
.pce_microcode = &gswip_pce_microcode,
.pce_microcode_size = ARRAY_SIZE(gswip_pce_microcode),
@@ -474,10 +486,20 @@ static const struct gswip_hw_info gswip_xrx200 = {
};
static const struct gswip_hw_info gswip_xrx300 = {
- .max_ports = 7,
+ .max_ports = GSWIP_MAX_PORTS,
.allowed_cpu_ports = BIT(6),
- .mii_ports = BIT(0) | BIT(5),
- .mii_port_reg_offset = 0,
+ .mii_cfg = {
+ [0] = GSWIP_MII_CFGp(0),
+ [1 ... 4] = -1,
+ [5] = GSWIP_MII_CFGp(5),
+ [6] = -1,
+ },
+ .mii_pcdu = {
+ [0] = GSWIP_MII_PCDU0,
+ [1 ... 4] = -1,
+ [5] = GSWIP_MII_PCDU5,
+ [6] = -1,
+ },
.phylink_get_caps = gswip_xrx300_phylink_get_caps,
.pce_microcode = &gswip_pce_microcode,
.pce_microcode_size = ARRAY_SIZE(gswip_pce_microcode),
diff --git a/drivers/net/dsa/lantiq/lantiq_gswip.h b/drivers/net/dsa/lantiq/lantiq_gswip.h
index 2e0f2afbadbbc..524289db7c213 100644
--- a/drivers/net/dsa/lantiq/lantiq_gswip.h
+++ b/drivers/net/dsa/lantiq/lantiq_gswip.h
@@ -243,6 +243,8 @@
#define GSWIP_VLAN_UNAWARE_PVID 0
+#define GSWIP_MAX_PORTS 7
+
struct gswip_pce_microcode {
u16 val_3;
u16 val_2;
@@ -253,8 +255,8 @@ struct gswip_pce_microcode {
struct gswip_hw_info {
int max_ports;
unsigned int allowed_cpu_ports;
- unsigned int mii_ports;
- int mii_port_reg_offset;
+ s16 mii_cfg[GSWIP_MAX_PORTS];
+ s16 mii_pcdu[GSWIP_MAX_PORTS];
bool supports_2500m;
const struct gswip_pce_microcode (*pce_microcode)[];
size_t pce_microcode_size;
diff --git a/drivers/net/dsa/lantiq/lantiq_gswip_common.c b/drivers/net/dsa/lantiq/lantiq_gswip_common.c
index e790f2ef75884..05b28b540661a 100644
--- a/drivers/net/dsa/lantiq/lantiq_gswip_common.c
+++ b/drivers/net/dsa/lantiq/lantiq_gswip_common.c
@@ -118,15 +118,11 @@ static u32 gswip_switch_r_timeout(struct gswip_priv *priv, u32 offset,
static void gswip_mii_mask_cfg(struct gswip_priv *priv, u32 mask, u32 set,
int port)
{
- int reg_port;
-
/* MII_CFG register only exists for MII ports */
- if (!(priv->hw_info->mii_ports & BIT(port)))
+ if (priv->hw_info->mii_cfg[port] == -1)
return;
- reg_port = port + priv->hw_info->mii_port_reg_offset;
-
- regmap_write_bits(priv->mii, GSWIP_MII_CFGp(reg_port), mask,
+ regmap_write_bits(priv->mii, priv->hw_info->mii_cfg[port], mask,
set);
}
@@ -604,28 +600,13 @@ static void gswip_mii_delay_setup(struct gswip_priv *priv, struct dsa_port *dp,
u32 tx_delay = GSWIP_MII_PCDU_TXDLY_DEFAULT;
u32 rx_delay = GSWIP_MII_PCDU_RXDLY_DEFAULT;
struct device_node *port_dn = dp->dn;
- u16 mii_pcdu_reg;
/* As MII_PCDU registers only exist for MII ports, silently return
* unless the port is an MII port
*/
- if (!(priv->hw_info->mii_ports & BIT(dp->index)))
+ if (priv->hw_info->mii_pcdu[dp->index] == -1)
return;
- switch (dp->index + priv->hw_info->mii_port_reg_offset) {
- case 0:
- mii_pcdu_reg = GSWIP_MII_PCDU0;
- break;
- case 1:
- mii_pcdu_reg = GSWIP_MII_PCDU1;
- break;
- case 5:
- mii_pcdu_reg = GSWIP_MII_PCDU5;
- break;
- default:
- return;
- }
-
/* legacy code to set default delays according to the interface mode */
switch (interface) {
case PHY_INTERFACE_MODE_RGMII_ID:
@@ -646,7 +627,7 @@ static void gswip_mii_delay_setup(struct gswip_priv *priv, struct dsa_port *dp,
of_property_read_u32(port_dn, "rx-internal-delay-ps", &rx_delay);
of_property_read_u32(port_dn, "tx-internal-delay-ps", &tx_delay);
- regmap_write_bits(priv->mii, mii_pcdu_reg,
+ regmap_write_bits(priv->mii, priv->hw_info->mii_pcdu[dp->index],
GSWIP_MII_PCDU_TXDLY_MASK |
GSWIP_MII_PCDU_RXDLY_MASK,
GSWIP_MII_PCDU_TXDLY(tx_delay) |
diff --git a/drivers/net/dsa/lantiq/mxl-gsw1xx.c b/drivers/net/dsa/lantiq/mxl-gsw1xx.c
index f8ff8a604bf53..aad1d9b80834f 100644
--- a/drivers/net/dsa/lantiq/mxl-gsw1xx.c
+++ b/drivers/net/dsa/lantiq/mxl-gsw1xx.c
@@ -702,8 +702,16 @@ static void gsw1xx_shutdown(struct mdio_device *mdiodev)
static const struct gswip_hw_info gsw12x_data = {
.max_ports = GSW1XX_PORTS,
.allowed_cpu_ports = BIT(GSW1XX_MII_PORT) | BIT(GSW1XX_SGMII_PORT),
- .mii_ports = BIT(GSW1XX_MII_PORT),
- .mii_port_reg_offset = -GSW1XX_MII_PORT,
+ .mii_cfg = {
+ [0 ... GSW1XX_MII_PORT - 1] = -1,
+ [GSW1XX_MII_PORT] = GSWIP_MII_CFGp(0),
+ [GSW1XX_MII_PORT + 1 ... GSWIP_MAX_PORTS] = -1,
+ },
+ .mii_pcdu = {
+ [0 ... GSW1XX_MII_PORT - 1] = -1,
+ [GSW1XX_MII_PORT] = GSWIP_MII_PCDU0,
+ [GSW1XX_MII_PORT + 1 ... GSWIP_MAX_PORTS] = -1,
+ },
.mac_select_pcs = gsw1xx_phylink_mac_select_pcs,
.phylink_get_caps = &gsw1xx_phylink_get_caps,
.supports_2500m = true,
@@ -715,8 +723,16 @@ static const struct gswip_hw_info gsw12x_data = {
static const struct gswip_hw_info gsw140_data = {
.max_ports = GSW1XX_PORTS,
.allowed_cpu_ports = BIT(GSW1XX_MII_PORT) | BIT(GSW1XX_SGMII_PORT),
- .mii_ports = BIT(GSW1XX_MII_PORT),
- .mii_port_reg_offset = -GSW1XX_MII_PORT,
+ .mii_cfg = {
+ [0 ... GSW1XX_MII_PORT - 1] = -1,
+ [GSW1XX_MII_PORT] = GSWIP_MII_CFGp(0),
+ [GSW1XX_MII_PORT + 1 ... GSWIP_MAX_PORTS - 1] = -1,
+ },
+ .mii_pcdu = {
+ [0 ... GSW1XX_MII_PORT - 1] = -1,
+ [GSW1XX_MII_PORT] = GSWIP_MII_PCDU0,
+ [GSW1XX_MII_PORT + 1 ... GSWIP_MAX_PORTS - 1] = -1,
+ },
.mac_select_pcs = gsw1xx_phylink_mac_select_pcs,
.phylink_get_caps = &gsw1xx_phylink_get_caps,
.supports_2500m = true,
@@ -728,8 +744,16 @@ static const struct gswip_hw_info gsw140_data = {
static const struct gswip_hw_info gsw141_data = {
.max_ports = GSW1XX_PORTS,
.allowed_cpu_ports = BIT(GSW1XX_MII_PORT) | BIT(GSW1XX_SGMII_PORT),
- .mii_ports = BIT(GSW1XX_MII_PORT),
- .mii_port_reg_offset = -GSW1XX_MII_PORT,
+ .mii_cfg = {
+ [0 ... GSWIP_MAX_PORTS - 1] = -1,
+ [GSW1XX_MII_PORT] = GSWIP_MII_CFGp(0),
+ [GSW1XX_MII_PORT + 1 ... GSWIP_MAX_PORTS - 1] = -1,
+ },
+ .mii_pcdu = {
+ [0 ... GSWIP_MAX_PORTS - 1] = -1,
+ [GSW1XX_MII_PORT] = GSWIP_MII_PCDU0,
+ [GSW1XX_MII_PORT + 1 ... GSWIP_MAX_PORTS - 1] = -1,
+ },
.mac_select_pcs = gsw1xx_phylink_mac_select_pcs,
.phylink_get_caps = gsw1xx_phylink_get_caps,
.pce_microcode = &gsw1xx_pce_microcode,
--
2.52.0Hi Daniel,
kernel test robot noticed the following build errors:
[auto build test ERROR on net-next/main]
url: https://github.com/intel-lab-lkp/linux/commits/Daniel-Golle/dt-bindings-net-dsa-lantiq-gswip-use-correct-node-name/20260117-092406
base: net-next/main
patch link: https://lore.kernel.org/r/d5cbb8c5917197d44b62d39c9799212d1b3fe390.1768612113.git.daniel%40makrotopia.org
patch subject: [PATCH net-next v4 3/6] net: dsa: lantiq: allow arbitrary MII registers
config: sh-allmodconfig (https://download.01.org/0day-ci/archive/20260118/202601180336.eVmDVfHL-lkp@intel.com/config)
compiler: sh4-linux-gcc (GCC) 15.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260118/202601180336.eVmDVfHL-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202601180336.eVmDVfHL-lkp@intel.com/
All errors (new ones prefixed by >>):
In file included from drivers/net/dsa/lantiq/mxl-gsw1xx.c:23:
>> drivers/net/dsa/lantiq/mxl-gsw1xx.h:14:49: error: array index range in initializer exceeds array bounds
14 | #define GSW1XX_MII_PORT 5
| ^
drivers/net/dsa/lantiq/mxl-gsw1xx.c:708:18: note: in expansion of macro 'GSW1XX_MII_PORT'
708 | [GSW1XX_MII_PORT + 1 ... GSWIP_MAX_PORTS] = -1,
| ^~~~~~~~~~~~~~~
drivers/net/dsa/lantiq/mxl-gsw1xx.h:14:49: note: (near initialization for 'gsw12x_data.mii_cfg')
14 | #define GSW1XX_MII_PORT 5
| ^
drivers/net/dsa/lantiq/mxl-gsw1xx.c:708:18: note: in expansion of macro 'GSW1XX_MII_PORT'
708 | [GSW1XX_MII_PORT + 1 ... GSWIP_MAX_PORTS] = -1,
| ^~~~~~~~~~~~~~~
>> drivers/net/dsa/lantiq/mxl-gsw1xx.h:14:49: error: array index range in initializer exceeds array bounds
14 | #define GSW1XX_MII_PORT 5
| ^
drivers/net/dsa/lantiq/mxl-gsw1xx.c:713:18: note: in expansion of macro 'GSW1XX_MII_PORT'
713 | [GSW1XX_MII_PORT + 1 ... GSWIP_MAX_PORTS] = -1,
| ^~~~~~~~~~~~~~~
drivers/net/dsa/lantiq/mxl-gsw1xx.h:14:49: note: (near initialization for 'gsw12x_data.mii_pcdu')
14 | #define GSW1XX_MII_PORT 5
| ^
drivers/net/dsa/lantiq/mxl-gsw1xx.c:713:18: note: in expansion of macro 'GSW1XX_MII_PORT'
713 | [GSW1XX_MII_PORT + 1 ... GSWIP_MAX_PORTS] = -1,
| ^~~~~~~~~~~~~~~
In file included from drivers/net/dsa/lantiq/mxl-gsw1xx.c:22:
drivers/net/dsa/lantiq/lantiq_gswip.h:60:41: warning: initialized field overwritten [-Woverride-init]
60 | #define GSWIP_MII_CFGp(p) (0x2 * (p))
| ^
drivers/net/dsa/lantiq/mxl-gsw1xx.c:749:37: note: in expansion of macro 'GSWIP_MII_CFGp'
749 | [GSW1XX_MII_PORT] = GSWIP_MII_CFGp(0),
| ^~~~~~~~~~~~~~
drivers/net/dsa/lantiq/lantiq_gswip.h:60:41: note: (near initialization for 'gsw141_data.mii_cfg[5]')
60 | #define GSWIP_MII_CFGp(p) (0x2 * (p))
| ^
drivers/net/dsa/lantiq/mxl-gsw1xx.c:749:37: note: in expansion of macro 'GSWIP_MII_CFGp'
749 | [GSW1XX_MII_PORT] = GSWIP_MII_CFGp(0),
| ^~~~~~~~~~~~~~
drivers/net/dsa/lantiq/mxl-gsw1xx.c:750:65: warning: initialized field overwritten [-Woverride-init]
750 | [GSW1XX_MII_PORT + 1 ... GSWIP_MAX_PORTS - 1] = -1,
| ^
drivers/net/dsa/lantiq/mxl-gsw1xx.c:750:65: note: (near initialization for 'gsw141_data.mii_cfg[6]')
drivers/net/dsa/lantiq/lantiq_gswip.h:80:41: warning: initialized field overwritten [-Woverride-init]
80 | #define GSWIP_MII_PCDU0 0x01
| ^~~~
drivers/net/dsa/lantiq/mxl-gsw1xx.c:754:37: note: in expansion of macro 'GSWIP_MII_PCDU0'
754 | [GSW1XX_MII_PORT] = GSWIP_MII_PCDU0,
| ^~~~~~~~~~~~~~~
drivers/net/dsa/lantiq/lantiq_gswip.h:80:41: note: (near initialization for 'gsw141_data.mii_pcdu[5]')
80 | #define GSWIP_MII_PCDU0 0x01
| ^~~~
drivers/net/dsa/lantiq/mxl-gsw1xx.c:754:37: note: in expansion of macro 'GSWIP_MII_PCDU0'
754 | [GSW1XX_MII_PORT] = GSWIP_MII_PCDU0,
| ^~~~~~~~~~~~~~~
drivers/net/dsa/lantiq/mxl-gsw1xx.c:755:65: warning: initialized field overwritten [-Woverride-init]
755 | [GSW1XX_MII_PORT + 1 ... GSWIP_MAX_PORTS - 1] = -1,
| ^
drivers/net/dsa/lantiq/mxl-gsw1xx.c:755:65: note: (near initialization for 'gsw141_data.mii_pcdu[6]')
vim +14 drivers/net/dsa/lantiq/mxl-gsw1xx.h
22335939ec907c Daniel Golle 2025-11-03 11
22335939ec907c Daniel Golle 2025-11-03 12 #define GSW1XX_PORTS 6
22335939ec907c Daniel Golle 2025-11-03 13 /* Port used for RGMII or optional RMII */
22335939ec907c Daniel Golle 2025-11-03 @14 #define GSW1XX_MII_PORT 5
22335939ec907c Daniel Golle 2025-11-03 15 /* Port used for SGMII */
22335939ec907c Daniel Golle 2025-11-03 16 #define GSW1XX_SGMII_PORT 4
22335939ec907c Daniel Golle 2025-11-03 17
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
Hi Daniel,
kernel test robot noticed the following build errors:
[auto build test ERROR on net-next/main]
url: https://github.com/intel-lab-lkp/linux/commits/Daniel-Golle/dt-bindings-net-dsa-lantiq-gswip-use-correct-node-name/20260117-092406
base: net-next/main
patch link: https://lore.kernel.org/r/d5cbb8c5917197d44b62d39c9799212d1b3fe390.1768612113.git.daniel%40makrotopia.org
patch subject: [PATCH net-next v4 3/6] net: dsa: lantiq: allow arbitrary MII registers
config: hexagon-allmodconfig (https://download.01.org/0day-ci/archive/20260117/202601171803.vxrrhXdF-lkp@intel.com/config)
compiler: clang version 17.0.6 (https://github.com/llvm/llvm-project 6009708b4367171ccdbf4b5905cb6a803753fe18)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260117/202601171803.vxrrhXdF-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202601171803.vxrrhXdF-lkp@intel.com/
All errors (new ones prefixed by >>):
>> drivers/net/dsa/lantiq/mxl-gsw1xx.c:708:28: error: array designator index (7) exceeds array bounds (7)
708 | [GSW1XX_MII_PORT + 1 ... GSWIP_MAX_PORTS] = -1,
| ^~~~~~~~~~~~~~~
drivers/net/dsa/lantiq/lantiq_gswip.h:246:26: note: expanded from macro 'GSWIP_MAX_PORTS'
246 | #define GSWIP_MAX_PORTS 7
| ^
drivers/net/dsa/lantiq/mxl-gsw1xx.c:713:28: error: array designator index (7) exceeds array bounds (7)
713 | [GSW1XX_MII_PORT + 1 ... GSWIP_MAX_PORTS] = -1,
| ^~~~~~~~~~~~~~~
drivers/net/dsa/lantiq/lantiq_gswip.h:246:26: note: expanded from macro 'GSWIP_MAX_PORTS'
246 | #define GSWIP_MAX_PORTS 7
| ^
drivers/net/dsa/lantiq/mxl-gsw1xx.c:749:23: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
749 | [GSW1XX_MII_PORT] = GSWIP_MII_CFGp(0),
| ^~~~~~~~~~~~~~~~~
drivers/net/dsa/lantiq/lantiq_gswip.h:60:28: note: expanded from macro 'GSWIP_MII_CFGp'
60 | #define GSWIP_MII_CFGp(p) (0x2 * (p))
| ^~~~~~~~~~~
drivers/net/dsa/lantiq/mxl-gsw1xx.c:748:33: note: previous initialization is here
748 | [0 ... GSWIP_MAX_PORTS - 1] = -1,
| ^~
drivers/net/dsa/lantiq/mxl-gsw1xx.c:750:51: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
750 | [GSW1XX_MII_PORT + 1 ... GSWIP_MAX_PORTS - 1] = -1,
| ^~
drivers/net/dsa/lantiq/mxl-gsw1xx.c:748:33: note: previous initialization is here
748 | [0 ... GSWIP_MAX_PORTS - 1] = -1,
| ^~
drivers/net/dsa/lantiq/mxl-gsw1xx.c:754:23: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
754 | [GSW1XX_MII_PORT] = GSWIP_MII_PCDU0,
| ^~~~~~~~~~~~~~~
drivers/net/dsa/lantiq/lantiq_gswip.h:80:27: note: expanded from macro 'GSWIP_MII_PCDU0'
80 | #define GSWIP_MII_PCDU0 0x01
| ^~~~
drivers/net/dsa/lantiq/mxl-gsw1xx.c:753:33: note: previous initialization is here
753 | [0 ... GSWIP_MAX_PORTS - 1] = -1,
| ^~
drivers/net/dsa/lantiq/mxl-gsw1xx.c:755:51: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
755 | [GSW1XX_MII_PORT + 1 ... GSWIP_MAX_PORTS - 1] = -1,
| ^~
drivers/net/dsa/lantiq/mxl-gsw1xx.c:753:33: note: previous initialization is here
753 | [0 ... GSWIP_MAX_PORTS - 1] = -1,
| ^~
4 warnings and 2 errors generated.
vim +708 drivers/net/dsa/lantiq/mxl-gsw1xx.c
701
702 static const struct gswip_hw_info gsw12x_data = {
703 .max_ports = GSW1XX_PORTS,
704 .allowed_cpu_ports = BIT(GSW1XX_MII_PORT) | BIT(GSW1XX_SGMII_PORT),
705 .mii_cfg = {
706 [0 ... GSW1XX_MII_PORT - 1] = -1,
707 [GSW1XX_MII_PORT] = GSWIP_MII_CFGp(0),
> 708 [GSW1XX_MII_PORT + 1 ... GSWIP_MAX_PORTS] = -1,
709 },
710 .mii_pcdu = {
711 [0 ... GSW1XX_MII_PORT - 1] = -1,
712 [GSW1XX_MII_PORT] = GSWIP_MII_PCDU0,
713 [GSW1XX_MII_PORT + 1 ... GSWIP_MAX_PORTS] = -1,
714 },
715 .mac_select_pcs = gsw1xx_phylink_mac_select_pcs,
716 .phylink_get_caps = &gsw1xx_phylink_get_caps,
717 .supports_2500m = true,
718 .pce_microcode = &gsw1xx_pce_microcode,
719 .pce_microcode_size = ARRAY_SIZE(gsw1xx_pce_microcode),
720 .tag_protocol = DSA_TAG_PROTO_MXL_GSW1XX,
721 };
722
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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