Documentation/arch/arm64/kasan-offsets.sh | 8 ++- Documentation/arch/x86/x86_64/mm.rst | 6 ++- MAINTAINERS | 2 +- arch/arm64/Kconfig | 10 ++-- arch/arm64/include/asm/kasan-tags.h | 14 +++++ arch/arm64/include/asm/kasan.h | 2 - arch/arm64/include/asm/memory.h | 14 ++++- arch/arm64/include/asm/uaccess.h | 1 + arch/arm64/kernel/traps.c | 17 +------ arch/arm64/mm/kasan_init.c | 7 ++- arch/x86/Kconfig | 4 ++ arch/x86/boot/compressed/misc.h | 1 + arch/x86/include/asm/cache.h | 4 ++ arch/x86/include/asm/kasan-tags.h | 9 ++++ arch/x86/include/asm/kasan.h | 62 ++++++++++++++++++++++- arch/x86/include/asm/page.h | 23 ++++++++- arch/x86/include/asm/page_64.h | 1 + arch/x86/kernel/head_64.S | 3 ++ arch/x86/mm/init.c | 3 ++ arch/x86/mm/init_64.c | 11 ++-- arch/x86/mm/kasan_init_64.c | 25 +++++++-- arch/x86/mm/physaddr.c | 2 + include/linux/kasan-tags.h | 21 ++++++-- include/linux/kasan.h | 13 +++-- include/linux/mm.h | 6 +-- include/linux/mmzone.h | 2 +- include/linux/page-flags-layout.h | 9 +--- lib/Kconfig.kasan | 3 +- mm/execmem.c | 9 +++- mm/kasan/report.c | 37 ++++++++++++-- mm/vmalloc.c | 7 ++- scripts/Makefile.kasan | 3 ++ scripts/gdb/linux/kasan.py | 5 +- scripts/gdb/linux/mm.py | 5 +- 34 files changed, 277 insertions(+), 72 deletions(-) create mode 100644 arch/arm64/include/asm/kasan-tags.h create mode 100644 arch/x86/include/asm/kasan-tags.h
======= Introduction The patchset aims to add a KASAN tag-based mode for the x86 architecture with the help of the new CPU feature called Linear Address Masking (LAM). Main improvement introduced by the series is 2x lower memory usage compared to KASAN's generic mode, the only currently available mode on x86. The tag based mode may also find errors that the generic mode couldn't because of differences in how these modes operate. ======= How does KASAN' tag-based mode work? When enabled, memory accesses and allocations are augmented by the compiler during kernel compilation. Instrumentation functions are added to each memory allocation and each pointer dereference. The allocation related functions generate a random tag and save it in two places: in shadow memory that maps to the allocated memory, and in the top bits of the pointer that points to the allocated memory. Storing the tag in the top of the pointer is possible because of Top-Byte Ignore (TBI) on arm64 architecture and LAM on x86. The access related functions are performing a comparison between the tag stored in the pointer and the one stored in shadow memory. If the tags don't match an out of bounds error must have occurred and so an error report is generated. The general idea for the tag-based mode is very well explained in the series with the original implementation [1]. [1] https://lore.kernel.org/all/cover.1544099024.git.andreyknvl@google.com/ ======= Differences summary compared to the arm64 tag-based mode - Tag width: - Tag width influences the chance of a tag mismatch due to two tags from different allocations having the same value. The bigger the possible range of tag values the lower the chance of that happening. - Shortening the tag width from 8 bits to 4, while it can help with memory usage, it also increases the chance of not reporting an error. 4 bit tags have a ~7% chance of a tag mismatch. - Address masking mechanism - TBI in arm64 allows for storing metadata in the top 8 bits of the virtual address. - LAM in x86 allows storing tags in bits [62:57] of the pointer. To maximize memory savings the tag width is reduced to bits [60:57]. - Inline mode mismatch reporting - Arm64 inserts a BRK instruction to pass metadata about a tag mismatch to the KASAN report. - Right now on x86 the INT3 instruction is used for the same purpose. The attempt to move it over to use UD1 is already implemented and tested but relies on another series that needs merging first. Therefore this patch will be posted separately once the dependency is satisfied by being merged upstream. ======= Testing Checked all the kunits for both software tags and generic KASAN after making changes. In generic mode (both with these patches and without) the results were: kasan: pass:61 fail:1 skip:14 total:76 Totals: pass:61 fail:1 skip:14 total:76 not ok 1 kasan and for software tags: kasan: pass:65 fail:1 skip:10 total:76 Totals: pass:65 fail:1 skip:10 total:76 not ok 1 kasan At the time of testing the one failing case is also present on generic mode without this patchset applied. This seems to point to something else being at fault for the one case not passing. The test case in question concerns strscpy() out of bounds error not getting caught. ======= Benchmarks [1] All tests were ran on a Sierra Forest server platform. The only differences between the tests were kernel options: - CONFIG_KASAN - CONFIG_KASAN_GENERIC - CONFIG_KASAN_SW_TAGS - CONFIG_KASAN_INLINE [1] - CONFIG_KASAN_OUTLINE Boot time (until login prompt): * 02:55 for clean kernel * 05:42 / 06:32 for generic KASAN (inline/outline) * 05:58 for tag-based KASAN (outline) [2] Total memory usage (512GB present on the system - MemAvailable just after boot): * 12.56 GB for clean kernel * 81.74 GB for generic KASAN * 44.39 GB for tag-based KASAN Kernel size: * 14 MB for clean kernel * 24.7 MB / 19.5 MB for generic KASAN (inline/outline) * 27.1 MB / 18.1 MB for tag-based KASAN (inline/outline) Work under load time comparison (compiling the mainline kernel) (200 cores): * 62s for clean kernel * 171s / 125s for generic KASAN (outline/inline) * 145s for tag-based KASAN (outline) [2] [1] Currently inline mode doesn't work on x86 due to things missing in the compiler. I have written a patch for clang that seems to fix the inline mode and I was able to boot and check that all patches regarding the inline mode work as expected. My hope is to post the patch to LLVM once this series is completed, and then make inline mode available in the kernel config. [2] While I was able to boot the inline tag-based kernel with my compiler changes in a simulated environment, due to toolchain difficulties I couldn't get it to boot on the machine I had access to. Also boot time results from the simulation seem too good to be true, and they're much too worse for the generic case to be believable. Therefore I'm posting only results from the physical server platform. ======= Compilation Clang was used to compile the series (make LLVM=1) since gcc doesn't seem to have support for KASAN tag-based compiler instrumentation on x86. ======= Dependencies The series is based on 6.19-rc5. ======= Previous versions v7: https://lore.kernel.org/all/cover.1765386422.git.m.wieczorretman@pm.me/ v6: https://lore.kernel.org/all/cover.1761763681.git.m.wieczorretman@pm.me/ v5: https://lore.kernel.org/all/cover.1756151769.git.maciej.wieczor-retman@intel.com/ v4: https://lore.kernel.org/all/cover.1755004923.git.maciej.wieczor-retman@intel.com/ v3: https://lore.kernel.org/all/cover.1743772053.git.maciej.wieczor-retman@intel.com/ v2: https://lore.kernel.org/all/cover.1739866028.git.maciej.wieczor-retman@intel.com/ v1: https://lore.kernel.org/all/cover.1738686764.git.maciej.wieczor-retman@intel.com/ === (two fixes patches were split off after v6) (merged into mm-unstable) v1: https://lore.kernel.org/all/cover.1762267022.git.m.wieczorretman@pm.me/ v2: https://lore.kernel.org/all/cover.1764685296.git.m.wieczorretman@pm.me/ v3: https://lore.kernel.org/all/cover.1764874575.git.m.wieczorretman@pm.me/ v4: https://lore.kernel.org/all/cover.1764945396.git.m.wieczorretman@pm.me/ Changes v8: - Detached the UD1/INT3 inline patch from the series so the whole patchset can be merged without waiting on other dependency series. For now with lack of compiler support for the inline mode that patch didn't work anyway so this delay is not an issue. - Rebased patches onto 6.19-rc5. - Added acked-by tag to "kasan: arm64: x86: Make special tags arch specific". Changes v7: - Rebased the series onto Peter Zijlstra's "WARN() hackery" v2 patchset. - Fix flipped memset arguments in "x86/kasan: KASAN raw shadow memory PTE init". - Reorder tag width defines on arm64 to avoid redefinition warnings. - Split off the pcpu unpoison patches into a separate fix oriented series. - Redid the canonicality checks so it works for KVM too (didn't change the __canonical_address() function previously). - A lot of fixes pointed out by Alexander in his great review: - Fixed "x86/mm: Physical address comparisons in fill_p*d/pte" - Merged "Support tag widths less than 8 bits" and "Make special tags arch specific". - Added comments and extended patch messages for patches "x86/kasan: Make software tag-based kasan available" and "mm/execmem: Untag addresses in EXECMEM_ROX related pointer arithmetic", - Fixed KASAN_TAG_MASK definition order so all patches compile individually. - Renamed kasan_inline.c to kasan_sw_tags.c. Changes v6: - Initialize sw-tags only when LAM is available. - Move inline mode to use UD1 instead of INT3 - Remove inline multishot patch. - Fix the canonical check to work for user addresses too. - Revise patch names and messages to align to tip tree rules. - Fix vdso compilation issue. Changes v5: - Fix a bunch of arm64 compilation errors I didn't catch earlier. Thank You Ada for testing the series! - Simplify the usage of the tag handling x86 functions (virt_to_page, phys_addr etc.). - Remove within() and within_range() from the EXECMEM_ROX patch. Changes v4: - Revert x86 kasan_mem_to_shadow() scheme to the same on used in generic KASAN. Keep the arithmetic shift idea for the KASAN in general since it makes more sense for arm64 and in risc-v. - Fix inline mode but leave it unavailable until a complementary compiler patch can be merged. - Apply Dave Hansen's comments on series formatting, patch style and code simplifications. Changes v3: - Remove the runtime_const patch and setup a unified offset for both 5 and 4 paging levels. - Add a fix for inline mode on x86 tag-based KASAN. Add a handler for int3 that is generated on inline tag mismatches. - Fix scripts/gdb/linux/kasan.py so the new signed mem_to_shadow() is reflected there. - Fix Documentation/arch/arm64/kasan-offsets.sh to take new offsets into account. - Made changes to the kasan_non_canonical_hook() according to upstream discussion. - Remove patches 2 and 3 since they related to risc-v and this series adds only x86 related things. - Reorder __tag_*() functions so they're before arch_kasan_*(). Remove CONFIG_KASAN condition from __tag_set(). Changes v2: - Split the series into one adding KASAN tag-based mode (this one) and another one that adds the dense mode to KASAN (will post later). - Removed exporting kasan_poison() and used a wrapper instead in kasan_init_64.c - Prepended series with 4 patches from the risc-v series and applied review comments to the first patch as the rest already are reviewed. Maciej Wieczor-Retman (12): kasan: Fix inline mode for x86 tag-based mode x86/kasan: Add arch specific kasan functions x86/mm: Reset tag for virtual to physical address conversions mm/execmem: Untag addresses in EXECMEM_ROX related pointer arithmetic x86/mm: Physical address comparisons in fill_p*d/pte x86/kasan: KASAN raw shadow memory PTE init x86/mm: LAM compatible non-canonical definition x86/mm: LAM initialization x86: Minimal SLAB alignment arm64: Unify software tag-based KASAN inline recovery path x86/kasan: Logical bit shift for kasan_mem_to_shadow x86/kasan: Make software tag-based kasan available Samuel Holland (2): kasan: sw_tags: Use arithmetic shift for shadow computation kasan: arm64: x86: Make special tags arch specific Documentation/arch/arm64/kasan-offsets.sh | 8 ++- Documentation/arch/x86/x86_64/mm.rst | 6 ++- MAINTAINERS | 2 +- arch/arm64/Kconfig | 10 ++-- arch/arm64/include/asm/kasan-tags.h | 14 +++++ arch/arm64/include/asm/kasan.h | 2 - arch/arm64/include/asm/memory.h | 14 ++++- arch/arm64/include/asm/uaccess.h | 1 + arch/arm64/kernel/traps.c | 17 +------ arch/arm64/mm/kasan_init.c | 7 ++- arch/x86/Kconfig | 4 ++ arch/x86/boot/compressed/misc.h | 1 + arch/x86/include/asm/cache.h | 4 ++ arch/x86/include/asm/kasan-tags.h | 9 ++++ arch/x86/include/asm/kasan.h | 62 ++++++++++++++++++++++- arch/x86/include/asm/page.h | 23 ++++++++- arch/x86/include/asm/page_64.h | 1 + arch/x86/kernel/head_64.S | 3 ++ arch/x86/mm/init.c | 3 ++ arch/x86/mm/init_64.c | 11 ++-- arch/x86/mm/kasan_init_64.c | 25 +++++++-- arch/x86/mm/physaddr.c | 2 + include/linux/kasan-tags.h | 21 ++++++-- include/linux/kasan.h | 13 +++-- include/linux/mm.h | 6 +-- include/linux/mmzone.h | 2 +- include/linux/page-flags-layout.h | 9 +--- lib/Kconfig.kasan | 3 +- mm/execmem.c | 9 +++- mm/kasan/report.c | 37 ++++++++++++-- mm/vmalloc.c | 7 ++- scripts/Makefile.kasan | 3 ++ scripts/gdb/linux/kasan.py | 5 +- scripts/gdb/linux/mm.py | 5 +- 34 files changed, 277 insertions(+), 72 deletions(-) create mode 100644 arch/arm64/include/asm/kasan-tags.h create mode 100644 arch/x86/include/asm/kasan-tags.h -- 2.52.0
On Mon, Jan 12, 2026 at 6:26 PM Maciej Wieczor-Retman <m.wieczorretman@pm.me> wrote: > > ======= Introduction > The patchset aims to add a KASAN tag-based mode for the x86 architecture > with the help of the new CPU feature called Linear Address Masking > (LAM). Main improvement introduced by the series is 2x lower memory > usage compared to KASAN's generic mode, the only currently available > mode on x86. The tag based mode may also find errors that the generic > mode couldn't because of differences in how these modes operate. > > ======= How does KASAN' tag-based mode work? > When enabled, memory accesses and allocations are augmented by the > compiler during kernel compilation. Instrumentation functions are added > to each memory allocation and each pointer dereference. > > The allocation related functions generate a random tag and save it in > two places: in shadow memory that maps to the allocated memory, and in > the top bits of the pointer that points to the allocated memory. Storing > the tag in the top of the pointer is possible because of Top-Byte Ignore > (TBI) on arm64 architecture and LAM on x86. > > The access related functions are performing a comparison between the tag > stored in the pointer and the one stored in shadow memory. If the tags > don't match an out of bounds error must have occurred and so an error > report is generated. > > The general idea for the tag-based mode is very well explained in the > series with the original implementation [1]. > > [1] https://lore.kernel.org/all/cover.1544099024.git.andreyknvl@google.com/ > > ======= Differences summary compared to the arm64 tag-based mode > - Tag width: > - Tag width influences the chance of a tag mismatch due to two > tags from different allocations having the same value. The > bigger the possible range of tag values the lower the chance > of that happening. > - Shortening the tag width from 8 bits to 4, while it can help > with memory usage, it also increases the chance of not > reporting an error. 4 bit tags have a ~7% chance of a tag > mismatch. > > - Address masking mechanism > - TBI in arm64 allows for storing metadata in the top 8 bits of > the virtual address. > - LAM in x86 allows storing tags in bits [62:57] of the pointer. > To maximize memory savings the tag width is reduced to bits > [60:57]. > > - Inline mode mismatch reporting > - Arm64 inserts a BRK instruction to pass metadata about a tag > mismatch to the KASAN report. > - Right now on x86 the INT3 instruction is used for the same > purpose. The attempt to move it over to use UD1 is already > implemented and tested but relies on another series that needs > merging first. Therefore this patch will be posted separately > once the dependency is satisfied by being merged upstream. > Please also update the Software Tag-Based KASAN section in Documentation/dev-tools/kasan.rst accordingly.
On 1/12/26 6:26 PM, Maciej Wieczor-Retman wrote: > ======= Compilation > Clang was used to compile the series (make LLVM=1) since gcc doesn't > seem to have support for KASAN tag-based compiler instrumentation on > x86. > It appears that GCC nominally supports this, but in practice it does not work. Here is a minimal reproducer: https://godbolt.org/z/s85e11T5r As far as I understand, calling a function through a tagged pointer is not supported by the hardware, so GCC attempts to clear the tag before the call. This behavior seems to be inherited from the userspace implementation of HWASan (-fsanitize=hwaddress). I have filed a GCC bug report: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123696 For the kernel, we probably do not want this masking at all, as effectively 99.9–100% of function pointer calls are expected to be untagged anyway. Clang does not appear to do this, not even for userspace.
On 2026-01-19 at 17:33:35 +0100, Andrey Ryabinin wrote: >On 1/12/26 6:26 PM, Maciej Wieczor-Retman wrote: > >> ======= Compilation >> Clang was used to compile the series (make LLVM=1) since gcc doesn't >> seem to have support for KASAN tag-based compiler instrumentation on >> x86. >> > >It appears that GCC nominally supports this, but in practice it does not work. >Here is a minimal reproducer: https://godbolt.org/z/s85e11T5r > >As far as I understand, calling a function through a tagged pointer is not >supported by the hardware, so GCC attempts to clear the tag before the call. >This behavior seems to be inherited from the userspace implementation of HWASan (-fsanitize=hwaddress). > >I have filed a GCC bug report: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123696 > >For the kernel, we probably do not want this masking at all, as effectively 99.9–100% >of function pointer calls are expected to be untagged anyway. > >Clang does not appear to do this, not even for userspace. Cool, thanks, nice to know why the kernel didn't start with gcc. I'm going to check in on the bug report every now and then and once it gets resolved I'll test if everything works as expected on both compilers. -- Kind regards Maciej Wieczór-Retman
On Mon, 12 Jan 2026 17:26:29 +0000 Maciej Wieczor-Retman <m.wieczorretman@pm.me> wrote: > The patchset aims to add a KASAN tag-based mode for the x86 architecture > with the help of the new CPU feature called Linear Address Masking > (LAM). Main improvement introduced by the series is 2x lower memory > usage compared to KASAN's generic mode, the only currently available > mode on x86. The tag based mode may also find errors that the generic > mode couldn't because of differences in how these modes operate. Well this is a hearty mixture of arm, x86 and MM. I guess that means mm.git. The review process seems to be proceeding OK so I'll add this to mm.git's mm-new branch, which is not included in linux-next. I'll aim to hold it there for a week while people check the patches over and send out their acks (please). Then I hope I can move it into mm.git's mm-unstable branch where it will receive linux-next exposure. > [1] Currently inline mode doesn't work on x86 due to things missing in > the compiler. I have written a patch for clang that seems to fix the > inline mode and I was able to boot and check that all patches regarding > the inline mode work as expected. My hope is to post the patch to LLVM > once this series is completed, and then make inline mode available in > the kernel config. > > [2] While I was able to boot the inline tag-based kernel with my > compiler changes in a simulated environment, due to toolchain > difficulties I couldn't get it to boot on the machine I had access to. > Also boot time results from the simulation seem too good to be true, and > they're much too worse for the generic case to be believable. Therefore > I'm posting only results from the physical server platform. > > ======= Compilation > Clang was used to compile the series (make LLVM=1) since gcc doesn't > seem to have support for KASAN tag-based compiler instrumentation on > x86. OK, known issues and they are understandable. With this patchset is there any way in which our testers can encounter these things? If so can we make changes to protect them from hitting known issues?
On Mon, Jan 12, 2026 at 10:29:57AM -0800, Andrew Morton wrote:
> The review process seems to be proceeding OK so I'll add this to
> mm.git's mm-new branch, which is not included in linux-next. I'll aim
> to hold it there for a week while people check the patches over and
> send out their acks (please). Then I hope I can move it into mm.git's
> mm-unstable branch where it will receive linux-next exposure.
Yah, you can drop this one and take the next revision after all comments have
been addressed.
Thx.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
On Tue, 13 Jan 2026 12:47:05 +0100 Borislav Petkov <bp@alien8.de> wrote: > On Mon, Jan 12, 2026 at 10:29:57AM -0800, Andrew Morton wrote: > > The review process seems to be proceeding OK so I'll add this to > > mm.git's mm-new branch, which is not included in linux-next. I'll aim > > to hold it there for a week while people check the patches over and > > send out their acks (please). Then I hope I can move it into mm.git's > > mm-unstable branch where it will receive linux-next exposure. > > Yah, you can drop this one and take the next revision after all comments have > been addressed. Cool, I removed the series.
On 2026-01-13 at 09:34:00 -0800, Andrew Morton wrote: >On Tue, 13 Jan 2026 12:47:05 +0100 Borislav Petkov <bp@alien8.de> wrote: > >> On Mon, Jan 12, 2026 at 10:29:57AM -0800, Andrew Morton wrote: >> > The review process seems to be proceeding OK so I'll add this to >> > mm.git's mm-new branch, which is not included in linux-next. I'll aim >> > to hold it there for a week while people check the patches over and >> > send out their acks (please). Then I hope I can move it into mm.git's >> > mm-unstable branch where it will receive linux-next exposure. >> >> Yah, you can drop this one and take the next revision after all comments have >> been addressed. > >Cool, I removed the series. I sent v9 with (I hope) all comments addressed: https://lore.kernel.org/all/cover.1768845098.git.m.wieczorretman@pm.me/ -- Kind regards Maciej Wieczór-Retman
On 1/12/26 10:29, Andrew Morton wrote: > On Mon, 12 Jan 2026 17:26:29 +0000 Maciej Wieczor-Retman <m.wieczorretman@pm.me> wrote: >> The patchset aims to add a KASAN tag-based mode for the x86 architecture >> with the help of the new CPU feature called Linear Address Masking >> (LAM). Main improvement introduced by the series is 2x lower memory >> usage compared to KASAN's generic mode, the only currently available >> mode on x86. The tag based mode may also find errors that the generic >> mode couldn't because of differences in how these modes operate. > Well this is a hearty mixture of arm, x86 and MM. I guess that means > mm.git. > > The review process seems to be proceeding OK so I'll add this to > mm.git's mm-new branch, which is not included in linux-next. I'll aim > to hold it there for a week while people check the patches over and > send out their acks (please). Then I hope I can move it into mm.git's > mm-unstable branch where it will receive linux-next exposure. Yeah, it'll be good to get it some more testing exposure. But, we definitely don't want it going upstream until it's more thoroughly reviewed than it stands. Maciej, this would be a good time to make sure you have a good idea who needs to review this and go rattle some cages.
On 2026-01-12 at 10:29:57 -0800, Andrew Morton wrote: >On Mon, 12 Jan 2026 17:26:29 +0000 Maciej Wieczor-Retman <m.wieczorretman@pm.me> wrote: > >> The patchset aims to add a KASAN tag-based mode for the x86 architecture >> with the help of the new CPU feature called Linear Address Masking >> (LAM). Main improvement introduced by the series is 2x lower memory >> usage compared to KASAN's generic mode, the only currently available >> mode on x86. The tag based mode may also find errors that the generic >> mode couldn't because of differences in how these modes operate. > >Well this is a hearty mixture of arm, x86 and MM. I guess that means >mm.git. > >The review process seems to be proceeding OK so I'll add this to >mm.git's mm-new branch, which is not included in linux-next. I'll aim >to hold it there for a week while people check the patches over and >send out their acks (please). Then I hope I can move it into mm.git's >mm-unstable branch where it will receive linux-next exposure. Thank you :) > >> [1] Currently inline mode doesn't work on x86 due to things missing in >> the compiler. I have written a patch for clang that seems to fix the >> inline mode and I was able to boot and check that all patches regarding >> the inline mode work as expected. My hope is to post the patch to LLVM >> once this series is completed, and then make inline mode available in >> the kernel config. >> >> [2] While I was able to boot the inline tag-based kernel with my >> compiler changes in a simulated environment, due to toolchain >> difficulties I couldn't get it to boot on the machine I had access to. >> Also boot time results from the simulation seem too good to be true, and >> they're much too worse for the generic case to be believable. Therefore >> I'm posting only results from the physical server platform. >> >> ======= Compilation >> Clang was used to compile the series (make LLVM=1) since gcc doesn't >> seem to have support for KASAN tag-based compiler instrumentation on >> x86. > >OK, known issues and they are understandable. With this patchset is >there any way in which our testers can encounter these things? If so >can we make changes to protect them from hitting known issues? The gcc documentation states that the -fsanitize=kernel-hwaddress is similar to -fsanitize=hwaddress, which only works on AArch64. So that hints that it shouldn't work. But while with KASAN sw_tags enabled the kernel compiles fine with gcc, at least in my patched qemu it doesn't run. I remember Ada Couprie Diaz mention that passing -march=arrowlake might help since the tag support seems to be based on arch. I'll check if there's a non-hacky way to have gcc work too, but perhaps to minimize hitting known issue, for now HAVE_ARCH_KASAN_SW_TAGS should be locked behind both ADDRESS_MASKING and CC_IS_CLANG in the Kconfig? -- Kind regards Maciej Wieczór-Retman
On Mon, 12 Jan 2026 20:08:23 +0000 Maciej Wieczór-Retman <m.wieczorretman@pm.me> wrote: > >OK, known issues and they are understandable. With this patchset is > >there any way in which our testers can encounter these things? If so > >can we make changes to protect them from hitting known issues? > > The gcc documentation states that the -fsanitize=kernel-hwaddress is > similar to -fsanitize=hwaddress, which only works on AArch64. So that > hints that it shouldn't work. > > But while with KASAN sw_tags enabled the kernel compiles fine with gcc, > at least in my patched qemu it doesn't run. I remember Ada Couprie Diaz > mention that passing -march=arrowlake might help since the tag support > seems to be based on arch. > > I'll check if there's a non-hacky way to have gcc work too, but perhaps > to minimize hitting known issue, for now HAVE_ARCH_KASAN_SW_TAGS should > be locked behind both ADDRESS_MASKING and CC_IS_CLANG in the Kconfig? Yes please - my main concern is that we avoid causing any disruption to testers/buildbots/fuzzers/etc.
On Mon, Jan 12, 2026 at 9:53 PM Andrew Morton <akpm@linux-foundation.org> wrote: > > On Mon, 12 Jan 2026 20:08:23 +0000 Maciej Wieczór-Retman <m.wieczorretman@pm.me> wrote: > > > >OK, known issues and they are understandable. With this patchset is > > >there any way in which our testers can encounter these things? If so > > >can we make changes to protect them from hitting known issues? > > > > The gcc documentation states that the -fsanitize=kernel-hwaddress is > > similar to -fsanitize=hwaddress, which only works on AArch64. So that > > hints that it shouldn't work. > > > > But while with KASAN sw_tags enabled the kernel compiles fine with gcc, > > at least in my patched qemu it doesn't run. I remember Ada Couprie Diaz > > mention that passing -march=arrowlake might help since the tag support > > seems to be based on arch. FYI, there are some known GCC issues with arm64 SW_TAGS mode as well: https://bugzilla.kernel.org/show_bug.cgi?id=218043#c3. > > > > I'll check if there's a non-hacky way to have gcc work too, but perhaps > > to minimize hitting known issue, for now HAVE_ARCH_KASAN_SW_TAGS should > > be locked behind both ADDRESS_MASKING and CC_IS_CLANG in the Kconfig? > > Yes please - my main concern is that we avoid causing any disruption to > testers/buildbots/fuzzers/etc. I left some comments, but from my/KASAN point of view, the series is ready for linux-next (but this could wait for a week and maybe the next version of the series). I wouldn't think there would be disruption issues: one would need to deliberately enable the SW_TAGS mode for x86 (as GENERIC is the default mode when just enabling KASAN). But I don't mind locking down x86 SW_TAGS to be Clang-only for now if GCC is known not to work at all.
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