From: "Wang, Hang Suan" <hang.suan.wang@altera.com>

This patch series introduces necessary Device Tree (DT) support for the
Soc/Hardware FPGA Crypto Service (fcs) functionality across the Altera
Agilex SoC families. This feature allows the kernel to identify, interact
and communicate with the high-speed FPGA hardware without interruption or
software overhead.

The series structured as follows:
Patch 1: Introduces the core YAML schema binding for a generic agilex5,
soc-fcs-config miscellaneous device.
Patch 2: Add fcs property to the existing stratix10-svc firmware binding.
Patch 3&4: Add the fcs nodes to the respective Agilex5 and Agilex DT files.

---
Notes:
This patch series is applied on socfpga maintainer's tree
https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git/log/?h=socfpga_dts_for_v6.19

---
Wang, Hang Suan (4):
  dt-bindings: misc: agilex5-soc-fcs-config: Add binding
  dt-bindings: firmware: stratix10-svc: add fcs-config property
  arm64: dts: socfpga: agilex5: add fcs node
  arm64: dts: socfpga: agilex: add fcs node

 .../firmware/intel,stratix10-svc.yaml         |  4 +++
 .../misc/intel,agilex5-soc-fcs-config.yaml    | 32 +++++++++++++++++++
 MAINTAINERS                                   |  5 +++
 arch/arm64/boot/dts/intel/socfpga_agilex.dtsi |  4 +++
 .../arm64/boot/dts/intel/socfpga_agilex5.dtsi |  5 +++
 5 files changed, 50 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/misc/intel,agilex5-soc-fcs-config.yaml

-- 
2.43.7

On Fri, 12 Dec 2025, hangsuan.wang@altera.com wrote:

> From: "Wang, Hang Suan" <hang.suan.wang@altera.com>
> 
> This patch series introduces necessary Device Tree (DT) support for the
> Soc/Hardware FPGA Crypto Service (fcs) functionality across the Altera
> Agilex SoC families. This feature allows the kernel to identify, interact
> and communicate with the high-speed FPGA hardware without interruption or
> software overhead.
> 
> The series structured as follows:
> Patch 1: Introduces the core YAML schema binding for a generic agilex5,
> soc-fcs-config miscellaneous device.
> Patch 2: Add fcs property to the existing stratix10-svc firmware binding.
> Patch 3&4: Add the fcs nodes to the respective Agilex5 and Agilex DT files.
> 
> ---
> Notes:
> This patch series is applied on socfpga maintainer's tree
> https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git/log/?h=socfpga_dts_for_v6.19
> 
> ---
> Wang, Hang Suan (4):
>   dt-bindings: misc: agilex5-soc-fcs-config: Add binding
>   dt-bindings: firmware: stratix10-svc: add fcs-config property
>   arm64: dts: socfpga: agilex5: add fcs node
>   arm64: dts: socfpga: agilex: add fcs node
> 
>  .../firmware/intel,stratix10-svc.yaml         |  4 +++
>  .../misc/intel,agilex5-soc-fcs-config.yaml    | 32 +++++++++++++++++++
>  MAINTAINERS                                   |  5 +++
>  arch/arm64/boot/dts/intel/socfpga_agilex.dtsi |  4 +++
>  .../arm64/boot/dts/intel/socfpga_agilex5.dtsi |  5 +++

Why am I receiving this?

-- 
Lee Jones [李琼斯]

On 12/12/2025 12:35, hangsuan.wang@altera.com wrote:
> From: "Wang, Hang Suan" <hang.suan.wang@altera.com>
> 
> This patch series introduces necessary Device Tree (DT) support for the
> Soc/Hardware FPGA Crypto Service (fcs) functionality across the Altera
> Agilex SoC families. This feature allows the kernel to identify, interact
> and communicate with the high-speed FPGA hardware without interruption or
> software overhead.
> 
> The series structured as follows:
> Patch 1: Introduces the core YAML schema binding for a generic agilex5,
> soc-fcs-config miscellaneous device.
> Patch 2: Add fcs property to the existing stratix10-svc firmware binding.
> Patch 3&4: Add the fcs nodes to the respective Agilex5 and Agilex DT files.


You cc-ed fake addresses:

Your message to linux-drivers-review@altera.com couldn't be delivered.

Don't do this. Your internal stuff should never be mixed with upstream,
because I do not see reason why we should keep filtering bounces from
your internal email boces.

Best regards,
Krzysztof

Please disregard this submission.
Apologizes for inconvenience caused.

---
On 12/12/2025 7:35 pm, hangsuan.wang@altera.com wrote:
> From: "Wang, Hang Suan" <hang.suan.wang@altera.com>
> 
> This patch series introduces necessary Device Tree (DT) support for the
> Soc/Hardware FPGA Crypto Service (fcs) functionality across the Altera
> Agilex SoC families. This feature allows the kernel to identify, interact
> and communicate with the high-speed FPGA hardware without interruption or
> software overhead.
> 
> The series structured as follows:
> Patch 1: Introduces the core YAML schema binding for a generic agilex5,
> soc-fcs-config miscellaneous device.
> Patch 2: Add fcs property to the existing stratix10-svc firmware binding.
> Patch 3&4: Add the fcs nodes to the respective Agilex5 and Agilex DT files.
> 
> ---
> Notes:
> This patch series is applied on socfpga maintainer's tree
> https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git/log/?h=socfpga_dts_for_v6.19
> 
> ---
> Wang, Hang Suan (4):
>    dt-bindings: misc: agilex5-soc-fcs-config: Add binding
>    dt-bindings: firmware: stratix10-svc: add fcs-config property
>    arm64: dts: socfpga: agilex5: add fcs node
>    arm64: dts: socfpga: agilex: add fcs node
> 
>   .../firmware/intel,stratix10-svc.yaml         |  4 +++
>   .../misc/intel,agilex5-soc-fcs-config.yaml    | 32 +++++++++++++++++++
>   MAINTAINERS                                   |  5 +++
>   arch/arm64/boot/dts/intel/socfpga_agilex.dtsi |  4 +++
>   .../arm64/boot/dts/intel/socfpga_agilex5.dtsi |  5 +++
>   5 files changed, 50 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/misc/intel,agilex5-soc-fcs-config.yaml
>

On 12/12/2025 17:45, Wang, Hang Suan wrote:
> Please disregard this submission.
> Apologizes for inconvenience caused.
> 


I already wasted time on this and then found you don't want to post
it... Recently Altera started sending poor quality patches, so can you
get some internal trainings so you (as a company) follow correct process
and know how to do upstream?

Best regards,
Krzysztof