This patch series adds device tree bindings, driver and DTS updates to
enable FPGA Manager functionality for Intel Agilex5 SoC.
These changes are intended to enable FPGA programming and FPGA management
capabilities on Agilex5-based platforms.
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Notes:
Patch #2 depends on "arm64: dts: intel: Add Agilex5 SVC node with memory
region" from
https://lore.kernel.org/all/3381ef56c1ff34a0b54cf76010889b5523ead825.1762387665.git.khairul.anuar.romli@altera.com/
This patch series is applied on socfpga maintainer's tree
https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git/log/?h=socfpga_dts_for_v6.19
Changes in v6:
- use items - const for Agilex5 to support fallback
- Validate bindings through DTBS_CHECK=y by itself and agaist
non-fallback (stratix10, agilex) and fallback (agilex5).
Changes in v5:
- Revert back to oneOf and use enum without items.
Changes in v4:
- Simplify the compatible property to use enum without items.
- Use contains instead of oneOf due to the use of enum without items.
Changes in v3:
- Add fallback in altera's soc fpga manager compatible properties.
- Validate with make CHECK_DBTS=y on:
- intel/socfpga_agilex5_socdk.dtb (fallback)
- intel/socfpga_agilex_socdk.dtb (non-fallback)
- altera/socfpga_stratix10_socdk.dtb (non-fallback)
Changes in v2:
- Drop "fpga: stratix10-soc: Add support for Agilex5"
- Add fallback compatible in DT
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Khairul Anuar Romli (2):
dt-bindings: fpga: stratix10: add support for Agilex5
arm64: dts: agilex5: add fpga-region and fpga-mgr nodes
.../bindings/fpga/intel,stratix10-soc-fpga-mgr.yaml | 10 +++++++---
arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 12 ++++++++++++
2 files changed, 19 insertions(+), 3 deletions(-)
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2.43.7