[PATCH v2 1/2] dt-bindings: intel: Add Agilex3 SoCFPGA board

niravkumarlaxmidas.rabara@altera.com posted 2 patches 2 months, 4 weeks ago
There is a newer version of this series
[PATCH v2 1/2] dt-bindings: intel: Add Agilex3 SoCFPGA board
Posted by niravkumarlaxmidas.rabara@altera.com 2 months, 4 weeks ago
From: Niravkumar L Rabara <niravkumarlaxmidas.rabara@altera.com>

Add compatible string for Agilex3 SoCFPGA board, which shares the same
architecture as Agilex5 but with two fewer CPU cores.

Signed-off-by: Niravkumar L Rabara <niravkumarlaxmidas.rabara@altera.com>
---

v2 changes:
 - Add separate agilex3 compatible instead of using agilex5 context.

v1 link:
https://lore.kernel.org/all/51ecc7f4eb7e419c00ee51fc26156e25686dfece.1762756191.git.niravkumarlaxmidas.rabara@altera.com/

 Documentation/devicetree/bindings/arm/intel,socfpga.yaml | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
index cf7a91dfec8a..e5a8141dc6cb 100644
--- a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
+++ b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
@@ -21,6 +21,11 @@ properties:
               - intel,socfpga-agilex-n6000
               - intel,socfpga-agilex-socdk
           - const: intel,socfpga-agilex
+      - description: Agilex3 boards
+        items:
+          - enum:
+              - intel,socfpga-agilex3-socdk
+          - const: intel,socfpga-agilex3
       - description: Agilex5 boards
         items:
           - enum:
-- 
2.25.1
Re: [PATCH v2 1/2] dt-bindings: intel: Add Agilex3 SoCFPGA board
Posted by Krzysztof Kozlowski 2 months, 4 weeks ago
On Tue, Nov 11, 2025 at 02:17:38PM +0800, niravkumarlaxmidas.rabara@altera.com wrote:
> From: Niravkumar L Rabara <niravkumarlaxmidas.rabara@altera.com>
> 
> Add compatible string for Agilex3 SoCFPGA board, which shares the same
> architecture as Agilex5 but with two fewer CPU cores.
> 
> Signed-off-by: Niravkumar L Rabara <niravkumarlaxmidas.rabara@altera.com>
> ---
> 
> v2 changes:
>  - Add separate agilex3 compatible instead of using agilex5 context.
> 
> v1 link:
> https://lore.kernel.org/all/51ecc7f4eb7e419c00ee51fc26156e25686dfece.1762756191.git.niravkumarlaxmidas.rabara@altera.com/
> 
>  Documentation/devicetree/bindings/arm/intel,socfpga.yaml | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
> index cf7a91dfec8a..e5a8141dc6cb 100644
> --- a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
> +++ b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
> @@ -21,6 +21,11 @@ properties:
>                - intel,socfpga-agilex-n6000
>                - intel,socfpga-agilex-socdk
>            - const: intel,socfpga-agilex
> +      - description: Agilex3 boards
> +        items:
> +          - enum:
> +              - intel,socfpga-agilex3-socdk
> +          - const: intel,socfpga-agilex3

This is confusing, where is the fallback? You said this is fully
compatible with Agilex5, no?

Best regards,
Krzysztof
Re: [PATCH v2 1/2] dt-bindings: intel: Add Agilex3 SoCFPGA board
Posted by Niravkumar L Rabara 2 months, 4 weeks ago

On 11/11/2025 3:51 pm, Krzysztof Kozlowski wrote:
> On Tue, Nov 11, 2025 at 02:17:38PM +0800, niravkumarlaxmidas.rabara@altera.com wrote:
>> From: Niravkumar L Rabara <niravkumarlaxmidas.rabara@altera.com>
>>
>> Add compatible string for Agilex3 SoCFPGA board, which shares the same
>> architecture as Agilex5 but with two fewer CPU cores.
>>
>> Signed-off-by: Niravkumar L Rabara <niravkumarlaxmidas.rabara@altera.com>
>> ---
>>
>> v2 changes:
>>   - Add separate agilex3 compatible instead of using agilex5 context.
>>
>> v1 link:
>> https://lore.kernel.org/all/51ecc7f4eb7e419c00ee51fc26156e25686dfece.1762756191.git.niravkumarlaxmidas.rabara@altera.com/
>>
>>   Documentation/devicetree/bindings/arm/intel,socfpga.yaml | 5 +++++
>>   1 file changed, 5 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
>> index cf7a91dfec8a..e5a8141dc6cb 100644
>> --- a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
>> +++ b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
>> @@ -21,6 +21,11 @@ properties:
>>                 - intel,socfpga-agilex-n6000
>>                 - intel,socfpga-agilex-socdk
>>             - const: intel,socfpga-agilex
>> +      - description: Agilex3 boards
>> +        items:
>> +          - enum:
>> +              - intel,socfpga-agilex3-socdk
>> +          - const: intel,socfpga-agilex3
> 
> This is confusing, where is the fallback? You said this is fully
> compatible with Agilex5, no?
> 
> Best regards,
> Krzysztof
> 

Yes, I should have "const: intel,socfpga-agilex5" as well for the fallback.

+      - description: Agilex3 boards
+        items:
+          - enum:
+              - intel,socfpga-agilex3-socdk
+          - const: intel,socfpga-agilex3
+          - const: intel,socfpga-agilex5

I will add this in v3.

Thanks,
Nirav