Extend the Lantiq GSWIP device tree binding to also cover MaxLinear
GSW1xx switches which are based on the same hardware IP but connected
via MDIO instead of being memory-mapped.
Add compatible strings for MaxLinear GSW120, GSW125, GSW140, GSW141,
and GSW145 switches and adjust the schema to handle the different
connection methods with conditional properties.
Add MaxLinear GSW125 example showing MDIO-connected configuration.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
v5:
* drop maxlinear,rx-inverted from example
v4:
* drop maxlinear,rx-inverted and maxlinear,tx-inverted properties for
now in favor of upcoming generic properties
v3:
* add maxlinear,rx-inverted and maxlinear,tx-inverted properties
v2:
* remove git conflict left-overs which somehow creeped in
* indent example with 4 spaces instead of tabs
.../bindings/net/dsa/lantiq,gswip.yaml | 266 +++++++++++++-----
1 file changed, 193 insertions(+), 73 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml b/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
index ab3ee4ecd938..ee42c2e099e2 100644
--- a/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
+++ b/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
@@ -4,7 +4,12 @@
$id: http://devicetree.org/schemas/net/dsa/lantiq,gswip.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Lantiq GSWIP Ethernet switches
+title: Lantiq GSWIP and MaxLinear GSW1xx Ethernet switches
+
+description:
+ Lantiq GSWIP and MaxLinear GSW1xx switches share the same hardware IP.
+ Lantiq switches are embedded in SoCs and accessed via memory-mapped I/O,
+ while MaxLinear switches are standalone ICs connected via MDIO.
$ref: dsa.yaml#
@@ -37,6 +42,100 @@ patternProperties:
Configure the RMII reference clock to be a clock output
rather than an input. Only applicable for RMII mode.
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - lantiq,xrx200-gswip
+ - lantiq,xrx300-gswip
+ - lantiq,xrx330-gswip
+ then:
+ properties:
+ reg:
+ minItems: 3
+ maxItems: 3
+ description: Memory-mapped register regions (switch, mdio, mii)
+ reg-names:
+ items:
+ - const: switch
+ - const: mdio
+ - const: mii
+ mdio:
+ $ref: /schemas/net/mdio.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ compatible:
+ const: lantiq,xrx200-mdio
+
+ required:
+ - compatible
+ gphy-fw:
+ type: object
+ properties:
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+ compatible:
+ items:
+ - enum:
+ - lantiq,xrx200-gphy-fw
+ - lantiq,xrx300-gphy-fw
+ - lantiq,xrx330-gphy-fw
+ - const: lantiq,gphy-fw
+
+ lantiq,rcu:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: phandle to the RCU syscon
+
+ patternProperties:
+ "^gphy@[0-9a-f]{1,2}$":
+ type: object
+
+ additionalProperties: false
+
+ properties:
+ reg:
+ minimum: 0
+ maximum: 255
+ description:
+ Offset of the GPHY firmware register in the RCU register
+ range
+
+ resets:
+ items:
+ - description: GPHY reset line
+
+ reset-names:
+ items:
+ - const: gphy
+
+ required:
+ - reg
+
+ required:
+ - compatible
+ - lantiq,rcu
+
+ additionalProperties: false
+ required:
+ - reg-names
+ else:
+ properties:
+ reg:
+ maxItems: 1
+ description: MDIO bus address
+ reg-names: false
+ gphy-fw: false
+ mdio:
+ $ref: /schemas/net/mdio.yaml#
+ unevaluatedProperties: false
+
maintainers:
- Hauke Mehrtens <hauke@hauke-m.de>
@@ -46,78 +145,11 @@ properties:
- lantiq,xrx200-gswip
- lantiq,xrx300-gswip
- lantiq,xrx330-gswip
-
- reg:
- minItems: 3
- maxItems: 3
-
- reg-names:
- items:
- - const: switch
- - const: mdio
- - const: mii
-
- mdio:
- $ref: /schemas/net/mdio.yaml#
- unevaluatedProperties: false
-
- properties:
- compatible:
- const: lantiq,xrx200-mdio
-
- required:
- - compatible
-
- gphy-fw:
- type: object
- properties:
- '#address-cells':
- const: 1
-
- '#size-cells':
- const: 0
-
- compatible:
- items:
- - enum:
- - lantiq,xrx200-gphy-fw
- - lantiq,xrx300-gphy-fw
- - lantiq,xrx330-gphy-fw
- - const: lantiq,gphy-fw
-
- lantiq,rcu:
- $ref: /schemas/types.yaml#/definitions/phandle
- description: phandle to the RCU syscon
-
- patternProperties:
- "^gphy@[0-9a-f]{1,2}$":
- type: object
-
- additionalProperties: false
-
- properties:
- reg:
- minimum: 0
- maximum: 255
- description:
- Offset of the GPHY firmware register in the RCU register range
-
- resets:
- items:
- - description: GPHY reset line
-
- reset-names:
- items:
- - const: gphy
-
- required:
- - reg
-
- required:
- - compatible
- - lantiq,rcu
-
- additionalProperties: false
+ - maxlinear,gsw120
+ - maxlinear,gsw125
+ - maxlinear,gsw140
+ - maxlinear,gsw141
+ - maxlinear,gsw145
required:
- compatible
@@ -132,6 +164,7 @@ examples:
reg = <0xe108000 0x3100>, /* switch */
<0xe10b100 0xd8>, /* mdio */
<0xe10b1d8 0x130>; /* mii */
+ reg-names = "switch", "mdio", "mii";
dsa,member = <0 0>;
ports {
@@ -230,3 +263,90 @@ examples:
};
};
};
+
+ - |
+ #include <dt-bindings/leds/common.h>
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ switch@1f {
+ compatible = "maxlinear,gsw125";
+ reg = <0x1f>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "lan0";
+ phy-handle = <&switchphy0>;
+ phy-mode = "internal";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ phy-handle = <&switchphy1>;
+ phy-mode = "internal";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ phy-mode = "1000base-x";
+ managed = "in-band-status";
+ };
+
+ port@5 {
+ reg = <5>;
+ phy-mode = "rgmii-id";
+ tx-internal-delay-ps = <2000>;
+ rx-internal-delay-ps = <2000>;
+ ethernet = <ð0>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ switchphy0: switchphy@0 {
+ reg = <0>;
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ };
+ };
+ };
+
+ switchphy1: switchphy@1 {
+ reg = <1>;
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ };
+ };
+ };
+ };
+ };
+ };
--
2.51.2On Thu, Oct 30, 2025 at 11:29:50AM +0000, Daniel Golle wrote:
> Extend the Lantiq GSWIP device tree binding to also cover MaxLinear
> GSW1xx switches which are based on the same hardware IP but connected
> via MDIO instead of being memory-mapped.
>
> Add compatible strings for MaxLinear GSW120, GSW125, GSW140, GSW141,
> and GSW145 switches and adjust the schema to handle the different
> connection methods with conditional properties.
>
> Add MaxLinear GSW125 example showing MDIO-connected configuration.
>
> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> ---
> v5:
> * drop maxlinear,rx-inverted from example
>
> v4:
> * drop maxlinear,rx-inverted and maxlinear,tx-inverted properties for
> now in favor of upcoming generic properties
>
> v3:
> * add maxlinear,rx-inverted and maxlinear,tx-inverted properties
>
> v2:
> * remove git conflict left-overs which somehow creeped in
> * indent example with 4 spaces instead of tabs
>
> .../bindings/net/dsa/lantiq,gswip.yaml | 266 +++++++++++++-----
> 1 file changed, 193 insertions(+), 73 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml b/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
> index ab3ee4ecd938..ee42c2e099e2 100644
> --- a/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
> +++ b/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
> @@ -4,7 +4,12 @@
> $id: http://devicetree.org/schemas/net/dsa/lantiq,gswip.yaml#
> $schema: http://devicetree.org/meta-schemas/core.yaml#
>
> -title: Lantiq GSWIP Ethernet switches
> +title: Lantiq GSWIP and MaxLinear GSW1xx Ethernet switches
> +
> +description:
> + Lantiq GSWIP and MaxLinear GSW1xx switches share the same hardware IP.
> + Lantiq switches are embedded in SoCs and accessed via memory-mapped I/O,
> + while MaxLinear switches are standalone ICs connected via MDIO.
>
> $ref: dsa.yaml#
>
> @@ -37,6 +42,100 @@ patternProperties:
> Configure the RMII reference clock to be a clock output
> rather than an input. Only applicable for RMII mode.
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - lantiq,xrx200-gswip
> + - lantiq,xrx300-gswip
> + - lantiq,xrx330-gswip
> + then:
> + properties:
> + reg:
> + minItems: 3
> + maxItems: 3
> + description: Memory-mapped register regions (switch, mdio, mii)
> + reg-names:
> + items:
> + - const: switch
> + - const: mdio
> + - const: mii
> + mdio:
> + $ref: /schemas/net/mdio.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + compatible:
> + const: lantiq,xrx200-mdio
> +
> + required:
> + - compatible
> + gphy-fw:
> + type: object
> + properties:
> + '#address-cells':
> + const: 1
> +
> + '#size-cells':
> + const: 0
> +
> + compatible:
> + items:
> + - enum:
> + - lantiq,xrx200-gphy-fw
> + - lantiq,xrx300-gphy-fw
> + - lantiq,xrx330-gphy-fw
> + - const: lantiq,gphy-fw
> +
> + lantiq,rcu:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: phandle to the RCU syscon
> +
> + patternProperties:
> + "^gphy@[0-9a-f]{1,2}$":
> + type: object
> +
> + additionalProperties: false
> +
> + properties:
> + reg:
> + minimum: 0
> + maximum: 255
> + description:
> + Offset of the GPHY firmware register in the RCU register
> + range
> +
> + resets:
> + items:
> + - description: GPHY reset line
> +
> + reset-names:
> + items:
> + - const: gphy
> +
> + required:
> + - reg
> +
> + required:
> + - compatible
> + - lantiq,rcu
> +
> + additionalProperties: false
> + required:
> + - reg-names
> + else:
> + properties:
> + reg:
> + maxItems: 1
> + description: MDIO bus address
> + reg-names: false
> + gphy-fw: false
> + mdio:
> + $ref: /schemas/net/mdio.yaml#
> + unevaluatedProperties: false
> +
> maintainers:
> - Hauke Mehrtens <hauke@hauke-m.de>
>
> @@ -46,78 +145,11 @@ properties:
> - lantiq,xrx200-gswip
> - lantiq,xrx300-gswip
> - lantiq,xrx330-gswip
> -
> - reg:
> - minItems: 3
> - maxItems: 3
> -
> - reg-names:
> - items:
> - - const: switch
> - - const: mdio
> - - const: mii
> -
> - mdio:
> - $ref: /schemas/net/mdio.yaml#
> - unevaluatedProperties: false
> -
> - properties:
> - compatible:
> - const: lantiq,xrx200-mdio
> -
> - required:
> - - compatible
> -
> - gphy-fw:
> - type: object
> - properties:
> - '#address-cells':
> - const: 1
> -
> - '#size-cells':
> - const: 0
> -
> - compatible:
> - items:
> - - enum:
> - - lantiq,xrx200-gphy-fw
> - - lantiq,xrx300-gphy-fw
> - - lantiq,xrx330-gphy-fw
> - - const: lantiq,gphy-fw
> -
> - lantiq,rcu:
> - $ref: /schemas/types.yaml#/definitions/phandle
> - description: phandle to the RCU syscon
> -
> - patternProperties:
> - "^gphy@[0-9a-f]{1,2}$":
> - type: object
> -
> - additionalProperties: false
> -
> - properties:
> - reg:
> - minimum: 0
> - maximum: 255
> - description:
> - Offset of the GPHY firmware register in the RCU register range
> -
> - resets:
> - items:
> - - description: GPHY reset line
> -
> - reset-names:
> - items:
> - - const: gphy
> -
> - required:
> - - reg
> -
> - required:
> - - compatible
> - - lantiq,rcu
All this should remain rather than being under an if/then schema. If you
need something so different, then it should probably be a separate
schema file. If there's some common parts, then a common schema shared
between 2 or more specific bindings.
Rob
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