Add the command line options to enable or disable the new resctrl feature
L3 Smart Data Cache Injection Allocation Enforcement (SDCIAE).
Signed-off-by: Babu Moger <babu.moger@amd.com>
---
v8: Updated Documentation/filesystems/resctrl.rst.
v7: No changes.
v6: No changes.
v5: No changes.
v4: No changes.
v3: No changes.
v2: No changes.
---
.../admin-guide/kernel-parameters.txt | 2 +-
Documentation/filesystems/resctrl.rst | 21 ++++++++++---------
arch/x86/kernel/cpu/resctrl/core.c | 2 ++
3 files changed, 14 insertions(+), 11 deletions(-)
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 0d2ea9a60145..0170c0af03cc 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -6089,7 +6089,7 @@
rdt= [HW,X86,RDT]
Turn on/off individual RDT features. List is:
cmt, mbmtotal, mbmlocal, l3cat, l3cdp, l2cat, l2cdp,
- mba, smba, bmec.
+ mba, smba, bmec, sdciae.
E.g. to turn on cmt and turn off mba use:
rdt=cmt,!mba
diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesystems/resctrl.rst
index c7949dd44f2f..f08699030312 100644
--- a/Documentation/filesystems/resctrl.rst
+++ b/Documentation/filesystems/resctrl.rst
@@ -17,16 +17,17 @@ AMD refers to this feature as AMD Platform Quality of Service(AMD QoS).
This feature is enabled by the CONFIG_X86_CPU_RESCTRL and the x86 /proc/cpuinfo
flag bits:
-=============================================== ================================
-RDT (Resource Director Technology) Allocation "rdt_a"
-CAT (Cache Allocation Technology) "cat_l3", "cat_l2"
-CDP (Code and Data Prioritization) "cdp_l3", "cdp_l2"
-CQM (Cache QoS Monitoring) "cqm_llc", "cqm_occup_llc"
-MBM (Memory Bandwidth Monitoring) "cqm_mbm_total", "cqm_mbm_local"
-MBA (Memory Bandwidth Allocation) "mba"
-SMBA (Slow Memory Bandwidth Allocation) ""
-BMEC (Bandwidth Monitoring Event Configuration) ""
-=============================================== ================================
+=============================================================== ================================
+RDT (Resource Director Technology) Allocation "rdt_a"
+CAT (Cache Allocation Technology) "cat_l3", "cat_l2"
+CDP (Code and Data Prioritization) "cdp_l3", "cdp_l2"
+CQM (Cache QoS Monitoring) "cqm_llc", "cqm_occup_llc"
+MBM (Memory Bandwidth Monitoring) "cqm_mbm_total", "cqm_mbm_local"
+MBA (Memory Bandwidth Allocation) "mba"
+SMBA (Slow Memory Bandwidth Allocation) ""
+BMEC (Bandwidth Monitoring Event Configuration) ""
+SDCIAE (Smart Data Cache Injection Allocation Enforcement) ""
+=============================================================== ================================
Historically, new features were made visible by default in /proc/cpuinfo. This
resulted in the feature flags becoming hard to parse by humans. Adding a new
diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
index 187d527ef73b..f6d84882cc4e 100644
--- a/arch/x86/kernel/cpu/resctrl/core.c
+++ b/arch/x86/kernel/cpu/resctrl/core.c
@@ -707,6 +707,7 @@ enum {
RDT_FLAG_MBA,
RDT_FLAG_SMBA,
RDT_FLAG_BMEC,
+ RDT_FLAG_SDCIAE,
};
#define RDT_OPT(idx, n, f) \
@@ -732,6 +733,7 @@ static struct rdt_options rdt_options[] __ro_after_init = {
RDT_OPT(RDT_FLAG_MBA, "mba", X86_FEATURE_MBA),
RDT_OPT(RDT_FLAG_SMBA, "smba", X86_FEATURE_SMBA),
RDT_OPT(RDT_FLAG_BMEC, "bmec", X86_FEATURE_BMEC),
+ RDT_OPT(RDT_FLAG_SDCIAE, "sdciae", X86_FEATURE_SDCIAE),
};
#define NUM_RDT_OPTIONS ARRAY_SIZE(rdt_options)
--
2.34.1Hi Babu, On 8/5/25 4:30 PM, Babu Moger wrote: > Add the command line options to enable or disable the new resctrl feature options -> option? > L3 Smart Data Cache Injection Allocation Enforcement (SDCIAE). > > Signed-off-by: Babu Moger <babu.moger@amd.com> > --- > --- > .../admin-guide/kernel-parameters.txt | 2 +- > Documentation/filesystems/resctrl.rst | 21 ++++++++++--------- > arch/x86/kernel/cpu/resctrl/core.c | 2 ++ > 3 files changed, 14 insertions(+), 11 deletions(-) > > diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt > index 0d2ea9a60145..0170c0af03cc 100644 > --- a/Documentation/admin-guide/kernel-parameters.txt > +++ b/Documentation/admin-guide/kernel-parameters.txt > @@ -6089,7 +6089,7 @@ > rdt= [HW,X86,RDT] > Turn on/off individual RDT features. List is: > cmt, mbmtotal, mbmlocal, l3cat, l3cdp, l2cat, l2cdp, > - mba, smba, bmec. > + mba, smba, bmec, sdciae. > E.g. to turn on cmt and turn off mba use: > rdt=cmt,!mba > > diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesystems/resctrl.rst > index c7949dd44f2f..f08699030312 100644 > --- a/Documentation/filesystems/resctrl.rst > +++ b/Documentation/filesystems/resctrl.rst > @@ -17,16 +17,17 @@ AMD refers to this feature as AMD Platform Quality of Service(AMD QoS). > This feature is enabled by the CONFIG_X86_CPU_RESCTRL and the x86 /proc/cpuinfo > flag bits: > > -=============================================== ================================ > -RDT (Resource Director Technology) Allocation "rdt_a" > -CAT (Cache Allocation Technology) "cat_l3", "cat_l2" > -CDP (Code and Data Prioritization) "cdp_l3", "cdp_l2" > -CQM (Cache QoS Monitoring) "cqm_llc", "cqm_occup_llc" > -MBM (Memory Bandwidth Monitoring) "cqm_mbm_total", "cqm_mbm_local" > -MBA (Memory Bandwidth Allocation) "mba" > -SMBA (Slow Memory Bandwidth Allocation) "" > -BMEC (Bandwidth Monitoring Event Configuration) "" > -=============================================== ================================ > +=============================================================== ================================ > +RDT (Resource Director Technology) Allocation "rdt_a" > +CAT (Cache Allocation Technology) "cat_l3", "cat_l2" > +CDP (Code and Data Prioritization) "cdp_l3", "cdp_l2" > +CQM (Cache QoS Monitoring) "cqm_llc", "cqm_occup_llc" > +MBM (Memory Bandwidth Monitoring) "cqm_mbm_total", "cqm_mbm_local" > +MBA (Memory Bandwidth Allocation) "mba" > +SMBA (Slow Memory Bandwidth Allocation) "" With all these adjustments this looks like an ideal time to fix the missing TABs in the SMBA spacing? > +BMEC (Bandwidth Monitoring Event Configuration) "" > +SDCIAE (Smart Data Cache Injection Allocation Enforcement) "" > +=============================================================== ================================ Reinette
Hi Reinette, Thanks for the comments. It took a while to get to it. On 8/7/2025 8:44 PM, Reinette Chatre wrote: > Hi Babu, > > On 8/5/25 4:30 PM, Babu Moger wrote: >> Add the command line options to enable or disable the new resctrl feature > options -> option? sure. > >> L3 Smart Data Cache Injection Allocation Enforcement (SDCIAE). >> >> Signed-off-by: Babu Moger <babu.moger@amd.com> >> --- >> --- >> .../admin-guide/kernel-parameters.txt | 2 +- >> Documentation/filesystems/resctrl.rst | 21 ++++++++++--------- >> arch/x86/kernel/cpu/resctrl/core.c | 2 ++ >> 3 files changed, 14 insertions(+), 11 deletions(-) >> >> diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt >> index 0d2ea9a60145..0170c0af03cc 100644 >> --- a/Documentation/admin-guide/kernel-parameters.txt >> +++ b/Documentation/admin-guide/kernel-parameters.txt >> @@ -6089,7 +6089,7 @@ >> rdt= [HW,X86,RDT] >> Turn on/off individual RDT features. List is: >> cmt, mbmtotal, mbmlocal, l3cat, l3cdp, l2cat, l2cdp, >> - mba, smba, bmec. >> + mba, smba, bmec, sdciae. >> E.g. to turn on cmt and turn off mba use: >> rdt=cmt,!mba >> >> diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesystems/resctrl.rst >> index c7949dd44f2f..f08699030312 100644 >> --- a/Documentation/filesystems/resctrl.rst >> +++ b/Documentation/filesystems/resctrl.rst >> @@ -17,16 +17,17 @@ AMD refers to this feature as AMD Platform Quality of Service(AMD QoS). >> This feature is enabled by the CONFIG_X86_CPU_RESCTRL and the x86 /proc/cpuinfo >> flag bits: >> >> -=============================================== ================================ >> -RDT (Resource Director Technology) Allocation "rdt_a" >> -CAT (Cache Allocation Technology) "cat_l3", "cat_l2" >> -CDP (Code and Data Prioritization) "cdp_l3", "cdp_l2" >> -CQM (Cache QoS Monitoring) "cqm_llc", "cqm_occup_llc" >> -MBM (Memory Bandwidth Monitoring) "cqm_mbm_total", "cqm_mbm_local" >> -MBA (Memory Bandwidth Allocation) "mba" >> -SMBA (Slow Memory Bandwidth Allocation) "" >> -BMEC (Bandwidth Monitoring Event Configuration) "" >> -=============================================== ================================ >> +=============================================================== ================================ >> +RDT (Resource Director Technology) Allocation "rdt_a" >> +CAT (Cache Allocation Technology) "cat_l3", "cat_l2" >> +CDP (Code and Data Prioritization) "cdp_l3", "cdp_l2" >> +CQM (Cache QoS Monitoring) "cqm_llc", "cqm_occup_llc" >> +MBM (Memory Bandwidth Monitoring) "cqm_mbm_total", "cqm_mbm_local" >> +MBA (Memory Bandwidth Allocation) "mba" >> +SMBA (Slow Memory Bandwidth Allocation) "" > With all these adjustments this looks like an ideal time to fix the missing TABs in the SMBA spacing? Sure. Noticed both SMBA and BMEC had tabs missing. Taken care now. thanks Babu > >> +BMEC (Bandwidth Monitoring Event Configuration) "" >> +SDCIAE (Smart Data Cache Injection Allocation Enforcement) "" >> +=============================================================== ================================ > Reinette >
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