Hi Nam,
On 11/05/2025 23:17, Nam Cao wrote:
> Similar to other instruction-processing macros/functions, branch_rs2_idx
> should be in insn.h.
>
> Move it into insn.h as RV_EXTRACT_RS2_REG. This new name matches the style
> in insn.h.
>
> Signed-off-by: Nam Cao <namcao@linutronix.de>
> ---
> arch/riscv/include/asm/insn.h | 5 +++++
> arch/riscv/kernel/probes/simulate-insn.c | 5 +----
> 2 files changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/arch/riscv/include/asm/insn.h b/arch/riscv/include/asm/insn.h
> index 09fde95a5e8f..debac13a3476 100644
> --- a/arch/riscv/include/asm/insn.h
> +++ b/arch/riscv/include/asm/insn.h
> @@ -64,6 +64,7 @@
> #define RVG_RS2_OPOFF 20
> #define RVG_RD_OPOFF 7
> #define RVG_RS1_MASK GENMASK(4, 0)
> +#define RVG_RS2_MASK GENMASK(4, 0)
> #define RVG_RD_MASK GENMASK(4, 0)
>
> /* The bit field of immediate value in RVC J instruction */
> @@ -295,6 +296,10 @@ static __always_inline bool riscv_insn_is_c_jalr(u32 code)
> ({typeof(x) x_ = (x); \
> (RV_X(x_, RVG_RS1_OPOFF, RVG_RS1_MASK)); })
>
> +#define RV_EXTRACT_RS2_REG(x) \
> + ({typeof(x) x_ = (x); \
> + (RV_X(x_, RVG_RS2_OPOFF, RVG_RS2_MASK)); })
RV_X() definition was inconsistent across multiple files, so I
harmonized RV_X() it in this patch
https://lore.kernel.org/linux-riscv/20250508125202.108613-3-alexghiti@rivosinc.com/
So here you use the "old" version, would you mind rebasing on top this
patchset and use RV_X_mask() instead?
If you can't, let me know and I'll find some time, I'd like to merge
those cleanups in 6.16.
Thanks,
Alex
> +
> #define RV_EXTRACT_RD_REG(x) \
> ({typeof(x) x_ = (x); \
> (RV_X(x_, RVG_RD_OPOFF, RVG_RD_MASK)); })
> diff --git a/arch/riscv/kernel/probes/simulate-insn.c b/arch/riscv/kernel/probes/simulate-insn.c
> index 6c166029079c..77be381bb8b4 100644
> --- a/arch/riscv/kernel/probes/simulate-insn.c
> +++ b/arch/riscv/kernel/probes/simulate-insn.c
> @@ -121,9 +121,6 @@ bool __kprobes simulate_auipc(u32 opcode, unsigned long addr, struct pt_regs *re
> #define branch_rs1_idx(opcode) \
> (((opcode) >> 15) & 0x1f)
>
> -#define branch_rs2_idx(opcode) \
> - (((opcode) >> 20) & 0x1f)
> -
> #define branch_funct3(opcode) \
> (((opcode) >> 12) & 0x7)
>
> @@ -157,7 +154,7 @@ bool __kprobes simulate_branch(u32 opcode, unsigned long addr, struct pt_regs *r
> unsigned long rs2_val;
>
> if (!rv_insn_reg_get_val(regs, branch_rs1_idx(opcode), &rs1_val) ||
> - !rv_insn_reg_get_val(regs, branch_rs2_idx(opcode), &rs2_val))
> + !rv_insn_reg_get_val(regs, RV_EXTRACT_RS2_REG(opcode), &rs2_val))
> return false;
>
> offset_tmp = branch_offset(opcode);