[PATCH v3 0/2] Improve code readability in rtl8723bs module

Erick Karanja posted 2 patches 8 months, 1 week ago
.../staging/rtl8723bs/hal/rtl8723b_hal_init.c | 81 ++++++-------------
.../staging/rtl8723bs/hal/rtl8723bs_xmit.c    | 33 +++-----
2 files changed, 33 insertions(+), 81 deletions(-)
[PATCH v3 0/2] Improve code readability in rtl8723bs module
Posted by Erick Karanja 8 months, 1 week ago
The patchset aims at improving code readability by initializing
variables at declaration.Key consideration is made to ensure that the
code is clean, maintainable and easy to debug.

Changes since v2:
Avoid refactoring the code in instances where comments are left dangling
and in instances where refactoring introduces a checkpatch warning "line
exceeds 100 columns"

Changes since v1:
Avoid mixing pre-initialized variables with not-initialized variables
and handle an edge case where initialization is made to function call.

Erick Karanja (2):
  staging: rtl8723bs: Initialize variables at declaration in
    rtl8723bs_xmit.c
  staging: rtl8723bs: Initialize variables at declaration in
    rtl8723b_hal_init.c

 .../staging/rtl8723bs/hal/rtl8723b_hal_init.c | 81 ++++++-------------
 .../staging/rtl8723bs/hal/rtl8723bs_xmit.c    | 33 +++-----
 2 files changed, 33 insertions(+), 81 deletions(-)

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2.43.0