Common YAML schema for devices that exports internal peripherals through
PCI BARs. The BARs are exposed as simple-buses through which the
peripherals can be accessed.
This is not intended to be used as a standalone binding, but should be
included by device specific bindings.
Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
---
.../devicetree/bindings/pci/pci-ep-bus.yaml | 58 +++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 59 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/pci-ep-bus.yaml
diff --git a/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml b/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml
new file mode 100644
index 000000000000..e532621f226b
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/pci-ep-bus.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Common Properties for PCI MFD Endpoints with Peripherals Addressable from BARs
+
+maintainers:
+ - Andrea della Porta <andrea.porta@suse.com>
+
+description:
+ Define a generic node representing a PCI endpoint which contains several sub-
+ peripherals. The peripherals can be accessed through one or more BARs.
+ This common schema is intended to be referenced from device tree bindings, and
+ does not represent a device tree binding by itself.
+
+properties:
+ '#address-cells':
+ const: 3
+
+ '#size-cells':
+ const: 2
+
+ ranges:
+ minItems: 1
+ maxItems: 6
+ items:
+ maxItems: 8
+ additionalItems: true
+ items:
+ - maximum: 5 # The BAR number
+ - const: 0
+ - const: 0
+
+patternProperties:
+ '^pci-ep-bus@[0-5]$':
+ type: object
+ description:
+ One node for each BAR used by peripherals contained in the PCI endpoint.
+ Each node represent a bus on which peripherals are connected.
+ This allows for some segmentation, e.g. one peripheral is accessible
+ through BAR0 and another through BAR1, and you don't want the two
+ peripherals to be able to act on the other BAR. Alternatively, when
+ different peripherals need to share BARs, you can define only one node
+ and use 'ranges' property to map all the used BARs.
+
+ additionalProperties: true
+
+ properties:
+ compatible:
+ const: simple-bus
+
+ required:
+ - compatible
+
+additionalProperties: true
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index c55d12550246..ccf123b805c8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -19384,6 +19384,7 @@ RASPBERRY PI RP1 PCI DRIVER
M: Andrea della Porta <andrea.porta@suse.com>
S: Maintained
F: Documentation/devicetree/bindings/clock/raspberrypi,rp1-clocks.yaml
+F: Documentation/devicetree/bindings/pci/pci-ep-bus.yaml
F: Documentation/devicetree/bindings/pinctrl/raspberrypi,rp1-gpio.yaml
F: include/dt-bindings/clock/rp1.h
F: include/dt-bindings/misc/rp1.h
--
2.35.3On Mon, Oct 28, 2024 at 03:07:20PM +0100, Andrea della Porta wrote: > Common YAML schema for devices that exports internal peripherals through > PCI BARs. The BARs are exposed as simple-buses through which the > peripherals can be accessed. > > This is not intended to be used as a standalone binding, but should be > included by device specific bindings. > > Signed-off-by: Andrea della Porta <andrea.porta@suse.com> > --- > .../devicetree/bindings/pci/pci-ep-bus.yaml | 58 +++++++++++++++++++ > MAINTAINERS | 1 + > 2 files changed, 59 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/pci-ep-bus.yaml > > diff --git a/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml b/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml > new file mode 100644 > index 000000000000..e532621f226b > --- /dev/null > +++ b/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml > @@ -0,0 +1,58 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pci/pci-ep-bus.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Common Properties for PCI MFD Endpoints with Peripherals Addressable from BARs > + > +maintainers: > + - Andrea della Porta <andrea.porta@suse.com> > + > +description: > + Define a generic node representing a PCI endpoint which contains several sub- > + peripherals. The peripherals can be accessed through one or more BARs. > + This common schema is intended to be referenced from device tree bindings, and Please wrap code according to coding style (checkpatch is not a coding style description but only a tool). Above applies to all places here and other bindings. Best regards, Krzysztof
Hi Krzysztof, On 08:28 Tue 29 Oct , Krzysztof Kozlowski wrote: > On Mon, Oct 28, 2024 at 03:07:20PM +0100, Andrea della Porta wrote: > > Common YAML schema for devices that exports internal peripherals through > > PCI BARs. The BARs are exposed as simple-buses through which the > > peripherals can be accessed. > > > > This is not intended to be used as a standalone binding, but should be > > included by device specific bindings. > > > > Signed-off-by: Andrea della Porta <andrea.porta@suse.com> > > --- > > .../devicetree/bindings/pci/pci-ep-bus.yaml | 58 +++++++++++++++++++ > > MAINTAINERS | 1 + > > 2 files changed, 59 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/pci/pci-ep-bus.yaml > > > > diff --git a/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml b/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml > > new file mode 100644 > > index 000000000000..e532621f226b > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml > > @@ -0,0 +1,58 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/pci/pci-ep-bus.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Common Properties for PCI MFD Endpoints with Peripherals Addressable from BARs > > + > > +maintainers: > > + - Andrea della Porta <andrea.porta@suse.com> > > + > > +description: > > + Define a generic node representing a PCI endpoint which contains several sub- > > + peripherals. The peripherals can be accessed through one or more BARs. > > + This common schema is intended to be referenced from device tree bindings, and > > Please wrap code according to coding style (checkpatch is not a coding > style description but only a tool). > > Above applies to all places here and other bindings. Are you referring to the title being longer than 80 column here, right? Because the description seems correctly wrapped... or should I add a newline for each paragraph? Many thanks, Andrea > > Best regards, > Krzysztof >
On 31/10/2024 15:20, Andrea della Porta wrote: > Hi Krzysztof, > > On 08:28 Tue 29 Oct , Krzysztof Kozlowski wrote: >> On Mon, Oct 28, 2024 at 03:07:20PM +0100, Andrea della Porta wrote: >>> Common YAML schema for devices that exports internal peripherals through >>> PCI BARs. The BARs are exposed as simple-buses through which the >>> peripherals can be accessed. >>> >>> This is not intended to be used as a standalone binding, but should be >>> included by device specific bindings. >>> >>> Signed-off-by: Andrea della Porta <andrea.porta@suse.com> >>> --- >>> .../devicetree/bindings/pci/pci-ep-bus.yaml | 58 +++++++++++++++++++ >>> MAINTAINERS | 1 + >>> 2 files changed, 59 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/pci/pci-ep-bus.yaml >>> >>> diff --git a/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml b/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml >>> new file mode 100644 >>> index 000000000000..e532621f226b >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml >>> @@ -0,0 +1,58 @@ >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >>> +%YAML 1.2 >>> +--- >>> +$id: http://devicetree.org/schemas/pci/pci-ep-bus.yaml# >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>> + >>> +title: Common Properties for PCI MFD Endpoints with Peripherals Addressable from BARs >>> + >>> +maintainers: >>> + - Andrea della Porta <andrea.porta@suse.com> >>> + >>> +description: >>> + Define a generic node representing a PCI endpoint which contains several sub- >>> + peripherals. The peripherals can be accessed through one or more BARs. >>> + This common schema is intended to be referenced from device tree bindings, and >> >> Please wrap code according to coding style (checkpatch is not a coding >> style description but only a tool). >> >> Above applies to all places here and other bindings. > > Are you referring to the title being longer than 80 column here, right? > Because the description seems correctly wrapped... or should I add a > newline for each paragraph? Hmm, I might commented on wrong description. I just looked at patch #2 and there it's passed 80. Here the title is not wrapped. Best regards, Krzysztof
Hi Krzysztof, On 19:06 Thu 31 Oct , Krzysztof Kozlowski wrote: > On 31/10/2024 15:20, Andrea della Porta wrote: > > Hi Krzysztof, > > > > On 08:28 Tue 29 Oct , Krzysztof Kozlowski wrote: > >> On Mon, Oct 28, 2024 at 03:07:20PM +0100, Andrea della Porta wrote: > >>> Common YAML schema for devices that exports internal peripherals through > >>> PCI BARs. The BARs are exposed as simple-buses through which the > >>> peripherals can be accessed. > >>> > >>> This is not intended to be used as a standalone binding, but should be > >>> included by device specific bindings. > >>> > >>> Signed-off-by: Andrea della Porta <andrea.porta@suse.com> > >>> --- > >>> .../devicetree/bindings/pci/pci-ep-bus.yaml | 58 +++++++++++++++++++ > >>> MAINTAINERS | 1 + > >>> 2 files changed, 59 insertions(+) > >>> create mode 100644 Documentation/devicetree/bindings/pci/pci-ep-bus.yaml > >>> > >>> diff --git a/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml b/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml > >>> new file mode 100644 > >>> index 000000000000..e532621f226b > >>> --- /dev/null > >>> +++ b/Documentation/devicetree/bindings/pci/pci-ep-bus.yaml > >>> @@ -0,0 +1,58 @@ > >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > >>> +%YAML 1.2 > >>> +--- > >>> +$id: http://devicetree.org/schemas/pci/pci-ep-bus.yaml# > >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# > >>> + > >>> +title: Common Properties for PCI MFD Endpoints with Peripherals Addressable from BARs > >>> + > >>> +maintainers: > >>> + - Andrea della Porta <andrea.porta@suse.com> > >>> + > >>> +description: > >>> + Define a generic node representing a PCI endpoint which contains several sub- > >>> + peripherals. The peripherals can be accessed through one or more BARs. > >>> + This common schema is intended to be referenced from device tree bindings, and > >> > >> Please wrap code according to coding style (checkpatch is not a coding > >> style description but only a tool). > >> > >> Above applies to all places here and other bindings. > > > > Are you referring to the title being longer than 80 column here, right? > > Because the description seems correctly wrapped... or should I add a > > newline for each paragraph? > > Hmm, I might commented on wrong description. I just looked at patch #2 > and there it's passed 80. > > Here the title is not wrapped. Ack. Many thanks, Andrea > > Best regards, > Krzysztof >
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