Implement MOSI idle low and MOSI idle high to better support peripherals
that request specific MOSI behavior.
Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
---
drivers/spi/spi-axi-spi-engine.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/spi/spi-axi-spi-engine.c b/drivers/spi/spi-axi-spi-engine.c
index 0aa31d745734..787e22ae80c0 100644
--- a/drivers/spi/spi-axi-spi-engine.c
+++ b/drivers/spi/spi-axi-spi-engine.c
@@ -41,6 +41,7 @@
#define SPI_ENGINE_CONFIG_CPHA BIT(0)
#define SPI_ENGINE_CONFIG_CPOL BIT(1)
#define SPI_ENGINE_CONFIG_3WIRE BIT(2)
+#define SPI_ENGINE_CONFIG_SDO_IDLE BIT(3)
#define SPI_ENGINE_INST_TRANSFER 0x0
#define SPI_ENGINE_INST_ASSERT 0x1
@@ -132,6 +133,10 @@ static unsigned int spi_engine_get_config(struct spi_device *spi)
config |= SPI_ENGINE_CONFIG_CPHA;
if (spi->mode & SPI_3WIRE)
config |= SPI_ENGINE_CONFIG_3WIRE;
+ if (spi->mode & SPI_MOSI_IDLE_HIGH)
+ config |= SPI_ENGINE_CONFIG_SDO_IDLE;
+ if (spi->mode & SPI_MOSI_IDLE_LOW)
+ config &= ~SPI_ENGINE_CONFIG_SDO_IDLE;
return config;
}
@@ -646,6 +651,9 @@ static int spi_engine_probe(struct platform_device *pdev)
host->dev.of_node = pdev->dev.of_node;
host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_3WIRE;
+ if (ADI_AXI_PCORE_VER_MAJOR(version) >= 1 &&
+ ADI_AXI_PCORE_VER_MINOR(version) >= 3)
+ host->mode_bits |= SPI_MOSI_IDLE_LOW | SPI_MOSI_IDLE_HIGH;
host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
host->max_speed_hz = clk_get_rate(spi_engine->ref_clk) / 2;
host->transfer_one_message = spi_engine_transfer_one_message;
--
2.43.0
On 6/18/24 6:11 PM, Marcelo Schmitt wrote: > Implement MOSI idle low and MOSI idle high to better support peripherals > that request specific MOSI behavior. > > Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> > --- > drivers/spi/spi-axi-spi-engine.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/spi/spi-axi-spi-engine.c b/drivers/spi/spi-axi-spi-engine.c > index 0aa31d745734..787e22ae80c0 100644 > --- a/drivers/spi/spi-axi-spi-engine.c > +++ b/drivers/spi/spi-axi-spi-engine.c > @@ -41,6 +41,7 @@ > #define SPI_ENGINE_CONFIG_CPHA BIT(0) > #define SPI_ENGINE_CONFIG_CPOL BIT(1) > #define SPI_ENGINE_CONFIG_3WIRE BIT(2) > +#define SPI_ENGINE_CONFIG_SDO_IDLE BIT(3) Calling this SPI_ENGINE_CONFIG_SDO_IDLE_HIGH would make it more clear what happens when the bit is enabled. > > #define SPI_ENGINE_INST_TRANSFER 0x0 > #define SPI_ENGINE_INST_ASSERT 0x1 > @@ -132,6 +133,10 @@ static unsigned int spi_engine_get_config(struct spi_device *spi) > config |= SPI_ENGINE_CONFIG_CPHA; > if (spi->mode & SPI_3WIRE) > config |= SPI_ENGINE_CONFIG_3WIRE; > + if (spi->mode & SPI_MOSI_IDLE_HIGH) > + config |= SPI_ENGINE_CONFIG_SDO_IDLE; > + if (spi->mode & SPI_MOSI_IDLE_LOW) > + config &= ~SPI_ENGINE_CONFIG_SDO_IDLE; > > return config; > } > @@ -646,6 +651,9 @@ static int spi_engine_probe(struct platform_device *pdev) > > host->dev.of_node = pdev->dev.of_node; > host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_3WIRE; > + if (ADI_AXI_PCORE_VER_MAJOR(version) >= 1 && Currently, the major version is required to be 1, so this check is not strictly needed. > + ADI_AXI_PCORE_VER_MINOR(version) >= 3) > + host->mode_bits |= SPI_MOSI_IDLE_LOW | SPI_MOSI_IDLE_HIGH; > host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); > host->max_speed_hz = clk_get_rate(spi_engine->ref_clk) / 2; > host->transfer_one_message = spi_engine_transfer_one_message;
On 06/19, David Lechner wrote: > On 6/18/24 6:11 PM, Marcelo Schmitt wrote: > > Implement MOSI idle low and MOSI idle high to better support peripherals > > that request specific MOSI behavior. > > > > Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> > > --- > > drivers/spi/spi-axi-spi-engine.c | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/drivers/spi/spi-axi-spi-engine.c b/drivers/spi/spi-axi-spi-engine.c > > index 0aa31d745734..787e22ae80c0 100644 > > --- a/drivers/spi/spi-axi-spi-engine.c > > +++ b/drivers/spi/spi-axi-spi-engine.c > > @@ -41,6 +41,7 @@ > > #define SPI_ENGINE_CONFIG_CPHA BIT(0) > > #define SPI_ENGINE_CONFIG_CPOL BIT(1) > > #define SPI_ENGINE_CONFIG_3WIRE BIT(2) > > +#define SPI_ENGINE_CONFIG_SDO_IDLE BIT(3) > > Calling this SPI_ENGINE_CONFIG_SDO_IDLE_HIGH would make it more > clear what happens when the bit is enabled. Yeah, agreed. Changing to SPI_ENGINE_CONFIG_SDO_IDLE_HIGH. > > > > > #define SPI_ENGINE_INST_TRANSFER 0x0 > > #define SPI_ENGINE_INST_ASSERT 0x1 > > @@ -132,6 +133,10 @@ static unsigned int spi_engine_get_config(struct spi_device *spi) > > config |= SPI_ENGINE_CONFIG_CPHA; > > if (spi->mode & SPI_3WIRE) > > config |= SPI_ENGINE_CONFIG_3WIRE; > > + if (spi->mode & SPI_MOSI_IDLE_HIGH) > > + config |= SPI_ENGINE_CONFIG_SDO_IDLE; > > + if (spi->mode & SPI_MOSI_IDLE_LOW) > > + config &= ~SPI_ENGINE_CONFIG_SDO_IDLE; > > > > return config; > > } > > @@ -646,6 +651,9 @@ static int spi_engine_probe(struct platform_device *pdev) > > > > host->dev.of_node = pdev->dev.of_node; > > host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_3WIRE; > > + if (ADI_AXI_PCORE_VER_MAJOR(version) >= 1 && > > Currently, the major version is required to be 1, so this check is not > strictly needed. > This is expecting the MOSI idle feature to be available on all versions from 1.3 on. Will SPI-Engine always be major version 1? > > + ADI_AXI_PCORE_VER_MINOR(version) >= 3) > > + host->mode_bits |= SPI_MOSI_IDLE_LOW | SPI_MOSI_IDLE_HIGH; > > > > > host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); > > host->max_speed_hz = clk_get_rate(spi_engine->ref_clk) / 2; > > host->transfer_one_message = spi_engine_transfer_one_message; >
On 6/19/24 12:27 PM, Marcelo Schmitt wrote: > On 06/19, David Lechner wrote: >> On 6/18/24 6:11 PM, Marcelo Schmitt wrote: >>> @@ -646,6 +651,9 @@ static int spi_engine_probe(struct platform_device *pdev) >>> >>> host->dev.of_node = pdev->dev.of_node; >>> host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_3WIRE; >>> + if (ADI_AXI_PCORE_VER_MAJOR(version) >= 1 && >> >> Currently, the major version is required to be 1, so this check is not >> strictly needed. >> > This is expecting the MOSI idle feature to be available on all versions from 1.3 on. > Will SPI-Engine always be major version 1? <yoda voice>Difficult to see, the future is.</yoda voice> It's fine if you want to leave it the way it is. > >>> + ADI_AXI_PCORE_VER_MINOR(version) >= 3) >>> + host->mode_bits |= SPI_MOSI_IDLE_LOW | SPI_MOSI_IDLE_HIGH; >>
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