MxL's CGU driver was found to be lacking below required features. Add these
required lacking features:
1. Since it is a core driver, it has to conform to secure boot & secure
access architecture. In order for the register accesses to be secure
access compliant, it needs regmap support as per our security architecture.
Hence, replace direct read/writel with regmap based IO. Also remove
redundant spinlocks from the driver as they are no longer necessary
because regmap uses its own lock.
2. In MxL's LGM SoC, gate clocks can be controlled either from CGU clk driver
i.e. this driver or directly from power management driver/daemon. It is
dependent on the power policy/profile requirements of the end product.
To support such use cases, provide option to override gate clks enable/disable
by adding a flag GATE_CLK_HW which controls if these gate clks are controlled
by HW i.e. this driver or overridden in order to allow it to be controlled
by power profiles instead.
3. Fix a bug related to missing flags in one 'dcl' clk entry.
This patch series is based on below git tree (linux-v6.0-rc1):
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git
v4:
- Address review concern (Stephen Boyd)
- Change the design of how GATE_CLKs are overridden.
Make the clk provider return NULL when that clk needs
to be overridden.
v3:
- Address review concern (Stephen Boyd)
- Change the method of fixing invalid width for reg read/write.
v2:
- Add option to override gate clks
- Fix a clk entry by adding relevant flags
v1:
- Initial version
Rahul Tanwar (4):
clk: mxl: Switch from direct readl/writel based IO to regmap based IO
clk: mxl: Remove redundant spinlocks
clk: mxl: Add option to override gate clks
clk: mxl: Fix a clk entry by adding relevant flags
drivers/clk/x86/Kconfig | 5 +-
drivers/clk/x86/clk-cgu-pll.c | 23 ++------
drivers/clk/x86/clk-cgu.c | 105 ++++++++++------------------------
drivers/clk/x86/clk-cgu.h | 46 +++++++--------
drivers/clk/x86/clk-lgm.c | 18 +++---
5 files changed, 72 insertions(+), 125 deletions(-)
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2.17.1