Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml | 6 ++++++ 1 file changed, 6 insertions(+)
ZynqMP SDHCI Arasan IP core has own power domain and also iommu ID that's
why describe optional power-domains and iommus properties.
Signed-off-by: Michal Simek <michal.simek@amd.com>
---
Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml
index a6c19a6cc99e..3e99801f77d2 100644
--- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml
+++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml
@@ -160,6 +160,12 @@ properties:
description:
The MIO bank number in which the command and data lines are configured.
+ iommus:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
dependencies:
'#clock-cells': [ clock-output-names ]
--
2.36.1
On Thu, 3 Aug 2023 at 09:23, Michal Simek <michal.simek@amd.com> wrote: > > ZynqMP SDHCI Arasan IP core has own power domain and also iommu ID that's > why describe optional power-domains and iommus properties. > > Signed-off-by: Michal Simek <michal.simek@amd.com> Applied for next, thanks! Kind regards Uffe > --- > > Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml > index a6c19a6cc99e..3e99801f77d2 100644 > --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml > +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml > @@ -160,6 +160,12 @@ properties: > description: > The MIO bank number in which the command and data lines are configured. > > + iommus: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > dependencies: > '#clock-cells': [ clock-output-names ] > > -- > 2.36.1 >
On Thu, Aug 03, 2023 at 09:22:56AM +0200, Michal Simek wrote: > ZynqMP SDHCI Arasan IP core has own power domain and also iommu ID that's > why describe optional power-domains and iommus properties. > > Signed-off-by: Michal Simek <michal.simek@amd.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Thanks, Conor.
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