arch/parisc/include/asm/cmpxchg.h | 19 +++++------- arch/parisc/kernel/parisc_ksyms.c | 1 arch/parisc/lib/bitops.c | 52 +++++++++++----------------------- arch/sparc/include/asm/cmpxchg_32.h | 18 +++++------ arch/sparc/lib/atomic32.c | 47 +++++++++++++----------------- b/arch/Kconfig | 3 + b/arch/arc/Kconfig | 1 b/arch/arc/include/asm/cmpxchg.h | 33 +++++++++++++++------ b/arch/csky/Kconfig | 1 b/arch/csky/include/asm/cmpxchg.h | 10 ++++++ b/arch/parisc/include/asm/cmpxchg.h | 3 - b/arch/parisc/kernel/parisc_ksyms.c | 1 b/arch/parisc/lib/bitops.c | 6 +-- b/arch/sh/Kconfig | 1 b/arch/sh/include/asm/cmpxchg.h | 3 + b/arch/sparc/include/asm/cmpxchg_32.h | 4 +- b/arch/sparc/lib/atomic32.c | 4 +- b/arch/xtensa/Kconfig | 1 b/arch/xtensa/include/asm/cmpxchg.h | 2 + b/include/linux/cmpxchg-emu.h | 15 +++++++++ b/lib/Makefile | 1 b/lib/cmpxchg-emu.c | 45 +++++++++++++++++++++++++++++ 22 files changed, 172 insertions(+), 99 deletions(-)
Hello!
This v2 series provides emulation functions for one-byte cmpxchg,
and uses it for those architectures not supporting this in hardware.
The emulation is in terms of the fully ordered four-byte cmpxchg() that
is supplied by all of these architectures. This was tested by making
x86 forget that it can do one-byte cmpxchg() natively:
f0183ab28489 ("EXP arch/x86: Test one-byte cmpxchg emulation")
This commit is local to -rcu and is of course not intended for mainline.
If accepted, RCU Tasks will use this capability in place of the current
rcu_trc_cmpxchg_need_qs() open-coding of this emulation.
The patches are as follows:
1. sparc32: make __cmpxchg_u32() return u32, courtesy of Al Viro.
2. sparc32: make the first argument of __cmpxchg_u64() volatile u64 *,
courtesy of Al Viro.
3. sparc32: unify __cmpxchg_u{32,64}, courtesy of Al Viro.
4. sparc32: add __cmpxchg_u{8,16}() and teach __cmpxchg() to handle those
sizes, courtesy of Al Viro.
5. parisc: __cmpxchg_u32(): lift conversion into the callers,
courtesy of Al Viro.
6. parisc: unify implementations of __cmpxchg_u{8,32,64}, courtesy of
Al Viro.
7. parisc: add missing export of __cmpxchg_u8(), courtesy of Al Viro.
8. parisc: add u16 support to cmpxchg(), courtesy of Al Viro.
9. lib: Add one-byte emulation function.
10. ARC: Emulate one-byte cmpxchg.
11. csky: Emulate one-byte cmpxchg.
12. sh: Emulate one-byte cmpxchg.
13. xtensa: Emulate one-byte cmpxchg.
Changes since v2:
o Dropped riscv patch in favor of alternative patch that
provides native support.
o Fixed yet more casting bugs spotted by kernel test robot
and by Geert Uytterhoeven.
Changes since v1:
o Add native support for sparc32 and parisc, courtesy of Al Viro.
o Remove two-byte emulation due to architectures that still do not
support two-byte load and store instructions, per Arnd Bergmann
feedback. (Yes, there are a few systems out there that do not
even support one-byte load instructions, but these are slated
for removal anyway.)
o Fix numerous casting bugs spotted by kernel test robot.
o Fix SPDX header. "//" for .c files and "/*" for .h files.
I am sure that there is a good reason for this. ;-)
Thanx, Paul
------------------------------------------------------------------------
arch/parisc/include/asm/cmpxchg.h | 19 +++++-------
arch/parisc/kernel/parisc_ksyms.c | 1
arch/parisc/lib/bitops.c | 52 +++++++++++-----------------------
arch/sparc/include/asm/cmpxchg_32.h | 18 +++++------
arch/sparc/lib/atomic32.c | 47 +++++++++++++-----------------
b/arch/Kconfig | 3 +
b/arch/arc/Kconfig | 1
b/arch/arc/include/asm/cmpxchg.h | 33 +++++++++++++++------
b/arch/csky/Kconfig | 1
b/arch/csky/include/asm/cmpxchg.h | 10 ++++++
b/arch/parisc/include/asm/cmpxchg.h | 3 -
b/arch/parisc/kernel/parisc_ksyms.c | 1
b/arch/parisc/lib/bitops.c | 6 +--
b/arch/sh/Kconfig | 1
b/arch/sh/include/asm/cmpxchg.h | 3 +
b/arch/sparc/include/asm/cmpxchg_32.h | 4 +-
b/arch/sparc/lib/atomic32.c | 4 +-
b/arch/xtensa/Kconfig | 1
b/arch/xtensa/include/asm/cmpxchg.h | 2 +
b/include/linux/cmpxchg-emu.h | 15 +++++++++
b/lib/Makefile | 1
b/lib/cmpxchg-emu.c | 45 +++++++++++++++++++++++++++++
22 files changed, 172 insertions(+), 99 deletions(-)
Hello!
This v3 series uses one-byte cmpxchg emulation for those architectures
that do not support this in hardware and that are not already using this
emulation. The emulation is in terms of the fully ordered four-byte
cmpxchg() that is supplied by all of these architectures. This was
tested by the csky commit already in mainline and by making x86 forget
that it can do one-byte cmpxchg() natively:
f0183ab28489 ("EXP arch/x86: Test one-byte cmpxchg emulation")
This x86 commit has since been dropped from RCU in favor of the
aforementioned csky commit in mainline.
Once one-byte cmpxchg emulation patches are in mainline for all remaining
architectures in need of it, RCU Tasks will use one-byte cmpxchg()
in place of the current rcu_trc_cmpxchg_need_qs() open-coding of this
emulation.
The remaining patches are as follows:
1. ARC: Emulate one-byte cmpxchg.
2. Emulate one-byte cmpxchg.
3. Emulate one-byte cmpxchg.
4. ARM: Emulate one-byte cmpxchg.
Changes since v2:
o Dropped the sparc32, parisc, lib, and csky patches due to their
having been accepted into mainline.
o Added a 32-bit ARM patch for systems with v6 and earlier CPUs.
o Apply other feedback from review and testing.
Changes since v1:
o Dropped riscv patch in favor of alternative patch that
provides native support.
o Fixed yet more casting bugs spotted by kernel test robot
and by Geert Uytterhoeven.
Changes since RFC:
o Add native support for sparc32 and parisc, courtesy of Al Viro.
o Remove two-byte emulation due to architectures that still do not
support two-byte load and store instructions, per Arnd Bergmann
feedback. (Yes, there are a few systems out there that do not
even support one-byte load instructions, but these are slated
for removal anyway.)
o Fix numerous casting bugs spotted by kernel test robot.
o Fix SPDX header. "//" for .c files and "/*" for .h files.
I am sure that there is a good reason for this. ;-)
Thanx, Paul
------------------------------------------------------------------------
arc/Kconfig | 1 +
arc/include/asm/cmpxchg.h | 33 ++++++++++++++++++++++++---------
arm/Kconfig | 1 +
arm/include/asm/cmpxchg.h | 7 ++++++-
sh/Kconfig | 1 +
sh/include/asm/cmpxchg.h | 3 +++
xtensa/Kconfig | 1 +
xtensa/include/asm/cmpxchg.h | 2 ++
8 files changed, 39 insertions(+), 10 deletions(-)
Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on arc.
[ paulmck: Drop two-byte support per Arnd Bergmann feedback. ]
[ paulmck: Apply feedback from Naresh Kamboju. ]
[ paulmck: Apply kernel test robot feedback. ]
Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
Cc: Vineet Gupta <vgupta@kernel.org>
Cc: Andi Shyti <andi.shyti@linux.intel.com>
Cc: Andrzej Hajda <andrzej.hajda@intel.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Palmer Dabbelt <palmer@rivosinc.com>
Cc: <linux-snps-arc@lists.infradead.org>
---
arch/arc/Kconfig | 1 +
arch/arc/include/asm/cmpxchg.h | 33 ++++++++++++++++++++++++---------
2 files changed, 25 insertions(+), 9 deletions(-)
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index fd0b0a0d4686a..163608fd49d18 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -13,6 +13,7 @@ config ARC
select ARCH_HAS_SETUP_DMA_OPS
select ARCH_HAS_SYNC_DMA_FOR_CPU
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
+ select ARCH_NEED_CMPXCHG_1_EMU
select ARCH_SUPPORTS_ATOMIC_RMW if ARC_HAS_LLSC
select ARCH_32BIT_OFF_T
select BUILDTIME_TABLE_SORT
diff --git a/arch/arc/include/asm/cmpxchg.h b/arch/arc/include/asm/cmpxchg.h
index e138fde067dea..2102ce076f28b 100644
--- a/arch/arc/include/asm/cmpxchg.h
+++ b/arch/arc/include/asm/cmpxchg.h
@@ -8,6 +8,7 @@
#include <linux/build_bug.h>
#include <linux/types.h>
+#include <linux/cmpxchg-emu.h>
#include <asm/barrier.h>
#include <asm/smp.h>
@@ -46,6 +47,9 @@
__typeof__(*(ptr)) _prev_; \
\
switch(sizeof((_p_))) { \
+ case 1: \
+ _prev_ = (__typeof__(*(ptr)))cmpxchg_emu_u8((volatile u8 *)_p_, (uintptr_t)_o_, (uintptr_t)_n_); \
+ break; \
case 4: \
_prev_ = __cmpxchg(_p_, _o_, _n_); \
break; \
@@ -65,16 +69,27 @@
__typeof__(*(ptr)) _prev_; \
unsigned long __flags; \
\
- BUILD_BUG_ON(sizeof(_p_) != 4); \
+ switch(sizeof((_p_))) { \
+ case 1: \
+ __flags = cmpxchg_emu_u8((volatile u8 *)_p_, (uintptr_t)_o_, (uintptr_t)_n_); \
+ _prev_ = (__typeof__(*(ptr)))__flags; \
+ break; \
+ break; \
+ case 4: \
+ /* \
+ * spin lock/unlock provide the needed smp_mb() \
+ * before/after \
+ */ \
+ atomic_ops_lock(__flags); \
+ _prev_ = *_p_; \
+ if (_prev_ == _o_) \
+ *_p_ = _n_; \
+ atomic_ops_unlock(__flags); \
+ break; \
+ default: \
+ BUILD_BUG(); \
+ } \
\
- /* \
- * spin lock/unlock provide the needed smp_mb() before/after \
- */ \
- atomic_ops_lock(__flags); \
- _prev_ = *_p_; \
- if (_prev_ == _o_) \
- *_p_ = _n_; \
- atomic_ops_unlock(__flags); \
_prev_; \
})
--
2.40.1Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on sh.
[ paulmck: Drop two-byte support per Arnd Bergmann feedback. ]
[ paulmck: Apply feedback from Naresh Kamboju. ]
[ Apply Geert Uytterhoeven feedback. ]
Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
Cc: Andi Shyti <andi.shyti@linux.intel.com>
Cc: Palmer Dabbelt <palmer@rivosinc.com>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: <linux-sh@vger.kernel.org>
---
arch/sh/Kconfig | 1 +
arch/sh/include/asm/cmpxchg.h | 3 +++
2 files changed, 4 insertions(+)
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 5e6a3ead51fb1..f723e2256c9c1 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -16,6 +16,7 @@ config SUPERH
select ARCH_HIBERNATION_POSSIBLE if MMU
select ARCH_MIGHT_HAVE_PC_PARPORT
select ARCH_WANT_IPC_PARSE_VERSION
+ select ARCH_NEED_CMPXCHG_1_EMU
select CPU_NO_EFFICIENT_FFS
select DMA_DECLARE_COHERENT
select GENERIC_ATOMIC64
diff --git a/arch/sh/include/asm/cmpxchg.h b/arch/sh/include/asm/cmpxchg.h
index 5d617b3ef78f7..1e5dc5ccf7bf5 100644
--- a/arch/sh/include/asm/cmpxchg.h
+++ b/arch/sh/include/asm/cmpxchg.h
@@ -9,6 +9,7 @@
#include <linux/compiler.h>
#include <linux/types.h>
+#include <linux/cmpxchg-emu.h>
#if defined(CONFIG_GUSA_RB)
#include <asm/cmpxchg-grb.h>
@@ -56,6 +57,8 @@ static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
unsigned long new, int size)
{
switch (size) {
+ case 1:
+ return cmpxchg_emu_u8(ptr, old, new);
case 4:
return __cmpxchg_u32(ptr, old, new);
}
--
2.40.1Hello,
On Tue, 2024-06-04 at 10:04 -0700, Paul E. McKenney wrote:
> Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on sh.
>
> [ paulmck: Drop two-byte support per Arnd Bergmann feedback. ]
> [ paulmck: Apply feedback from Naresh Kamboju. ]
> [ Apply Geert Uytterhoeven feedback. ]
>
> Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
> Cc: Andi Shyti <andi.shyti@linux.intel.com>
> Cc: Palmer Dabbelt <palmer@rivosinc.com>
> Cc: Masami Hiramatsu <mhiramat@kernel.org>
> Cc: Arnd Bergmann <arnd@arndb.de>
> Cc: <linux-sh@vger.kernel.org>
> ---
> arch/sh/Kconfig | 1 +
> arch/sh/include/asm/cmpxchg.h | 3 +++
> 2 files changed, 4 insertions(+)
>
> diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
> index 5e6a3ead51fb1..f723e2256c9c1 100644
> --- a/arch/sh/Kconfig
> +++ b/arch/sh/Kconfig
> @@ -16,6 +16,7 @@ config SUPERH
> select ARCH_HIBERNATION_POSSIBLE if MMU
> select ARCH_MIGHT_HAVE_PC_PARPORT
> select ARCH_WANT_IPC_PARSE_VERSION
> + select ARCH_NEED_CMPXCHG_1_EMU
> select CPU_NO_EFFICIENT_FFS
> select DMA_DECLARE_COHERENT
> select GENERIC_ATOMIC64
> diff --git a/arch/sh/include/asm/cmpxchg.h b/arch/sh/include/asm/cmpxchg.h
> index 5d617b3ef78f7..1e5dc5ccf7bf5 100644
> --- a/arch/sh/include/asm/cmpxchg.h
> +++ b/arch/sh/include/asm/cmpxchg.h
> @@ -9,6 +9,7 @@
>
> #include <linux/compiler.h>
> #include <linux/types.h>
> +#include <linux/cmpxchg-emu.h>
>
> #if defined(CONFIG_GUSA_RB)
> #include <asm/cmpxchg-grb.h>
> @@ -56,6 +57,8 @@ static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
> unsigned long new, int size)
> {
> switch (size) {
> + case 1:
> + return cmpxchg_emu_u8(ptr, old, new);
> case 4:
> return __cmpxchg_u32(ptr, old, new);
> }
Reviewed-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
I can pick this up through my SH tree unless someone insists this to
go through some other tree.
Adrian
PS: I'm a bit stumped that I'm not CC'ed as the SH maintainer.
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer
`. `' Physicist
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
On Tue, Jun 04, 2024 at 07:09:11PM +0200, John Paul Adrian Glaubitz wrote:
> Hello,
>
> On Tue, 2024-06-04 at 10:04 -0700, Paul E. McKenney wrote:
> > Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on sh.
> >
> > [ paulmck: Drop two-byte support per Arnd Bergmann feedback. ]
> > [ paulmck: Apply feedback from Naresh Kamboju. ]
> > [ Apply Geert Uytterhoeven feedback. ]
> >
> > Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
> > Cc: Andi Shyti <andi.shyti@linux.intel.com>
> > Cc: Palmer Dabbelt <palmer@rivosinc.com>
> > Cc: Masami Hiramatsu <mhiramat@kernel.org>
> > Cc: Arnd Bergmann <arnd@arndb.de>
> > Cc: <linux-sh@vger.kernel.org>
> > ---
> > arch/sh/Kconfig | 1 +
> > arch/sh/include/asm/cmpxchg.h | 3 +++
> > 2 files changed, 4 insertions(+)
> >
> > diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
> > index 5e6a3ead51fb1..f723e2256c9c1 100644
> > --- a/arch/sh/Kconfig
> > +++ b/arch/sh/Kconfig
> > @@ -16,6 +16,7 @@ config SUPERH
> > select ARCH_HIBERNATION_POSSIBLE if MMU
> > select ARCH_MIGHT_HAVE_PC_PARPORT
> > select ARCH_WANT_IPC_PARSE_VERSION
> > + select ARCH_NEED_CMPXCHG_1_EMU
> > select CPU_NO_EFFICIENT_FFS
> > select DMA_DECLARE_COHERENT
> > select GENERIC_ATOMIC64
> > diff --git a/arch/sh/include/asm/cmpxchg.h b/arch/sh/include/asm/cmpxchg.h
> > index 5d617b3ef78f7..1e5dc5ccf7bf5 100644
> > --- a/arch/sh/include/asm/cmpxchg.h
> > +++ b/arch/sh/include/asm/cmpxchg.h
> > @@ -9,6 +9,7 @@
> >
> > #include <linux/compiler.h>
> > #include <linux/types.h>
> > +#include <linux/cmpxchg-emu.h>
> >
> > #if defined(CONFIG_GUSA_RB)
> > #include <asm/cmpxchg-grb.h>
> > @@ -56,6 +57,8 @@ static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
> > unsigned long new, int size)
> > {
> > switch (size) {
> > + case 1:
> > + return cmpxchg_emu_u8(ptr, old, new);
> > case 4:
> > return __cmpxchg_u32(ptr, old, new);
> > }
>
> Reviewed-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
>
> I can pick this up through my SH tree unless someone insists this to
> go through some other tree.
Please do take it, and thank you! When I see it in -next, I will drop
it from my tree.
> Adrian
>
> PS: I'm a bit stumped that I'm not CC'ed as the SH maintainer.
Me too, now that you mention it. I did generate the list some time
back, but "git blame" shows you being maintainer for more than a year.
Yet I do have the linux-sh email list, so it is unlikely that I pasted
the get_maintainer.pl output from the wrong commit.
I am forced to hypothesize that I fat-fingered the output of
get_maintainer.pl when adding the Cc lines to that commit.
Please accept my apologies for having left you out!
Thanx, Paul
Hello, On Tue, 2024-06-04 at 10:50 -0700, Paul E. McKenney wrote: > > Reviewed-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> > > > > I can pick this up through my SH tree unless someone insists this to > > go through some other tree. > > Please do take it, and thank you! When I see it in -next, I will drop > it from my tree. I'll pick it up over the weekend for which I have planned my usual kernel review and merge session. > > Adrian > > > > PS: I'm a bit stumped that I'm not CC'ed as the SH maintainer. > > Me too, now that you mention it. I did generate the list some time > back, but "git blame" shows you being maintainer for more than a year. > Yet I do have the linux-sh email list, so it is unlikely that I pasted > the get_maintainer.pl output from the wrong commit. > > I am forced to hypothesize that I fat-fingered the output of > get_maintainer.pl when adding the Cc lines to that commit. > > Please accept my apologies for having left you out! No worries. I was just surprised as I assume get_maintainer.pl should have done the right thing and spit out the names of the responsible maintainers. Thanks, Adrian -- .''`. John Paul Adrian Glaubitz : :' : Debian Developer `. `' Physicist `- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
On Tue, Jun 04, 2024 at 07:56:49PM +0200, John Paul Adrian Glaubitz wrote: > Hello, > > On Tue, 2024-06-04 at 10:50 -0700, Paul E. McKenney wrote: > > > Reviewed-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> > > > > > > I can pick this up through my SH tree unless someone insists this to > > > go through some other tree. > > > > Please do take it, and thank you! When I see it in -next, I will drop > > it from my tree. > > I'll pick it up over the weekend for which I have planned my usual kernel > review and merge session. Very good, and again, thank you! > > > Adrian > > > > > > PS: I'm a bit stumped that I'm not CC'ed as the SH maintainer. > > > > Me too, now that you mention it. I did generate the list some time > > back, but "git blame" shows you being maintainer for more than a year. > > Yet I do have the linux-sh email list, so it is unlikely that I pasted > > the get_maintainer.pl output from the wrong commit. > > > > I am forced to hypothesize that I fat-fingered the output of > > get_maintainer.pl when adding the Cc lines to that commit. > > > > Please accept my apologies for having left you out! > > No worries. I was just surprised as I assume get_maintainer.pl should have > done the right thing and spit out the names of the responsible maintainers. I will look more carefully next time. Thanx, Paul
On Tue, Jun 04, 2024 at 02:14:54PM -0700, Paul E. McKenney wrote: > On Tue, Jun 04, 2024 at 07:56:49PM +0200, John Paul Adrian Glaubitz wrote: > > Hello, > > > > On Tue, 2024-06-04 at 10:50 -0700, Paul E. McKenney wrote: > > > > Reviewed-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> > > > > > > > > I can pick this up through my SH tree unless someone insists this to > > > > go through some other tree. > > > > > > Please do take it, and thank you! When I see it in -next, I will drop > > > it from my tree. > > > > I'll pick it up over the weekend for which I have planned my usual kernel > > review and merge session. > > Very good, and again, thank you! Just following up... I don't yet see this from you in -next. When your version does show up in -next, I will drop my copy from -rcu. Thanx, Paul
Hi Paul, On Mon, 2024-06-17 at 09:50 -0700, Paul E. McKenney wrote: > On Tue, Jun 04, 2024 at 02:14:54PM -0700, Paul E. McKenney wrote: > > On Tue, Jun 04, 2024 at 07:56:49PM +0200, John Paul Adrian Glaubitz wrote: > > > Hello, > > > > > > On Tue, 2024-06-04 at 10:50 -0700, Paul E. McKenney wrote: > > > > > Reviewed-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> > > > > > > > > > > I can pick this up through my SH tree unless someone insists this to > > > > > go through some other tree. > > > > > > > > Please do take it, and thank you! When I see it in -next, I will drop > > > > it from my tree. > > > > > > I'll pick it up over the weekend for which I have planned my usual kernel > > > review and merge session. > > > > Very good, and again, thank you! > > Just following up... I don't yet see this from you in -next. When your > version does show up in -next, I will drop my copy from -rcu. Sorry, I was very busy last week and didn't get around to do any kernel stuff. I will take care of it this week, I have not forgotten about it and I never let patches unanswered, and unmerged once I have reviewed them. Adrian -- .''`. John Paul Adrian Glaubitz : :' : Debian Developer `. `' Physicist `- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
On Mon, Jun 17, 2024 at 10:30:40PM +0200, John Paul Adrian Glaubitz wrote: > Hi Paul, > > On Mon, 2024-06-17 at 09:50 -0700, Paul E. McKenney wrote: > > On Tue, Jun 04, 2024 at 02:14:54PM -0700, Paul E. McKenney wrote: > > > On Tue, Jun 04, 2024 at 07:56:49PM +0200, John Paul Adrian Glaubitz wrote: > > > > Hello, > > > > > > > > On Tue, 2024-06-04 at 10:50 -0700, Paul E. McKenney wrote: > > > > > > Reviewed-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> > > > > > > > > > > > > I can pick this up through my SH tree unless someone insists this to > > > > > > go through some other tree. > > > > > > > > > > Please do take it, and thank you! When I see it in -next, I will drop > > > > > it from my tree. > > > > > > > > I'll pick it up over the weekend for which I have planned my usual kernel > > > > review and merge session. > > > > > > Very good, and again, thank you! > > > > Just following up... I don't yet see this from you in -next. When your > > version does show up in -next, I will drop my copy from -rcu. > > Sorry, I was very busy last week and didn't get around to do any kernel stuff. > > I will take care of it this week, I have not forgotten about it and I never let > patches unanswered, and unmerged once I have reviewed them. Very good, thank you, and apologies for the noise. Thanx, Paul
Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on xtensa.
[ paulmck: Apply kernel test robot feedback. ]
[ paulmck: Drop two-byte support per Arnd Bergmann feedback. ]
[ Apply Geert Uytterhoeven feedback. ]
Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
Tested-by: Yujie Liu <yujie.liu@intel.com>
Cc: Andi Shyti <andi.shyti@linux.intel.com>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: "Peter Zijlstra (Intel)" <peterz@infradead.org>
---
arch/xtensa/Kconfig | 1 +
arch/xtensa/include/asm/cmpxchg.h | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index f200a4ec044e6..d3db28f2f8110 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -14,6 +14,7 @@ config XTENSA
select ARCH_HAS_DMA_SET_UNCACHED if MMU
select ARCH_HAS_STRNCPY_FROM_USER if !KASAN
select ARCH_HAS_STRNLEN_USER
+ select ARCH_NEED_CMPXCHG_1_EMU
select ARCH_USE_MEMTEST
select ARCH_USE_QUEUED_RWLOCKS
select ARCH_USE_QUEUED_SPINLOCKS
diff --git a/arch/xtensa/include/asm/cmpxchg.h b/arch/xtensa/include/asm/cmpxchg.h
index 675a11ea8de76..95e33a913962d 100644
--- a/arch/xtensa/include/asm/cmpxchg.h
+++ b/arch/xtensa/include/asm/cmpxchg.h
@@ -15,6 +15,7 @@
#include <linux/bits.h>
#include <linux/stringify.h>
+#include <linux/cmpxchg-emu.h>
/*
* cmpxchg
@@ -74,6 +75,7 @@ static __inline__ unsigned long
__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
{
switch (size) {
+ case 1: return cmpxchg_emu_u8(ptr, old, new);
case 4: return __cmpxchg_u32(ptr, old, new);
default: __cmpxchg_called_with_bad_pointer();
return old;
--
2.40.1Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on ARM systems
with ARCH < ARMv6K.
[ paulmck: Apply Arnd Bergmann and Nathan Chancellor feedback. ]
Reported-by: Mark Brown <broonie@kernel.org>
Closes: https://lore.kernel.org/all/54798f68-48f7-4c65-9cba-47c0bf175143@sirena.org.uk/
Reported-by: Naresh Kamboju <naresh.kamboju@linaro.org>
Closes: https://lore.kernel.org/all/CA+G9fYuZ+pf6p8AXMZWtdFtX-gbG8HMaBKp=XbxcdzA_QeLkxQ@mail.gmail.com/
Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
Tested-by: Nathan Chancellor <nathan@kernel.org>
Cc: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Andrew Davis <afd@ti.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Eric DeVolder <eric.devolder@oracle.com>
Cc: Rob Herring <robh@kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>
---
arch/arm/Kconfig | 1 +
arch/arm/include/asm/cmpxchg.h | 7 ++++++-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ee5115252aac4..a867a7d967aa5 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -34,6 +34,7 @@ config ARM
select ARCH_MIGHT_HAVE_PC_PARPORT
select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7
+ select ARCH_NEED_CMPXCHG_1_EMU if CPU_V6
select ARCH_SUPPORTS_ATOMIC_RMW
select ARCH_SUPPORTS_CFI_CLANG
select ARCH_SUPPORTS_HUGETLBFS if ARM_LPAE
diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h
index 44667bdb4707a..a428e06fe94ee 100644
--- a/arch/arm/include/asm/cmpxchg.h
+++ b/arch/arm/include/asm/cmpxchg.h
@@ -5,6 +5,7 @@
#include <linux/irqflags.h>
#include <linux/prefetch.h>
#include <asm/barrier.h>
+#include <linux/cmpxchg-emu.h>
#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110)
/*
@@ -162,7 +163,11 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
prefetchw((const void *)ptr);
switch (size) {
-#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
+#ifdef CONFIG_CPU_V6 /* min ARCH < ARMv6K */
+ case 1:
+ oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
+ break;
+#else /* min ARCH >= ARMv6K */
case 1:
do {
asm volatile("@ __cmpxchg1\n"
--
2.40.1Hi Paul, thanks for your patch! This caught my eye: On Tue, Jun 4, 2024 at 7:04 PM Paul E. McKenney <paulmck@kernel.org> wrote: > Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on ARM systems > with ARCH < ARMv6K. ARCH == ARMv6. This ARCH < ARMv6K comes from inversion of the the a bit terse comment for ifndef CONFIG_CPU_V6, which means "out of the post-v6 CPUs, the following applies to those > V6". The code in the patch, IIUC make use of cmpxchg_emu_u8() if and only if the CPU is V6. > -#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */ > +#ifdef CONFIG_CPU_V6 /* min ARCH < ARMv6K */ This is now a set with one member so this comment should say: /* ARCH == ARMv6 */ After this change. Yours, Linus Walleij
On Tue, Jun 04, 2024 at 10:52:23PM +0200, Linus Walleij wrote:
> Hi Paul,
>
> thanks for your patch! This caught my eye:
>
> On Tue, Jun 4, 2024 at 7:04 PM Paul E. McKenney <paulmck@kernel.org> wrote:
>
> > Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on ARM systems
> > with ARCH < ARMv6K.
>
> ARCH == ARMv6.
>
> This ARCH < ARMv6K comes from inversion of the the a bit terse
> comment for ifndef CONFIG_CPU_V6, which means "out of the
> post-v6 CPUs, the following applies to those > V6".
>
> The code in the patch, IIUC make use of cmpxchg_emu_u8()
> if and only if the CPU is V6.
>
> > -#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
> > +#ifdef CONFIG_CPU_V6 /* min ARCH < ARMv6K */
>
> This is now a set with one member so this comment should say:
>
> /* ARCH == ARMv6 */
>
> After this change.
Thank you for looking this over! Does the following patch (to be merged
into the original) capture it properly?
Thanx, Paul
------------------------------------------------------------------------
diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h
index a428e06fe94ee..9beb64d305866 100644
--- a/arch/arm/include/asm/cmpxchg.h
+++ b/arch/arm/include/asm/cmpxchg.h
@@ -163,11 +163,11 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
prefetchw((const void *)ptr);
switch (size) {
-#ifdef CONFIG_CPU_V6 /* min ARCH < ARMv6K */
+#ifdef CONFIG_CPU_V6 /* ARCH == ARMv6 */
case 1:
oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
break;
-#else /* min ARCH >= ARMv6K */
+#else /* min ARCH > ARMv6 */
case 1:
do {
asm volatile("@ __cmpxchg1\n"
On Tue, Jun 4, 2024 at 11:14 PM Paul E. McKenney <paulmck@kernel.org> wrote: > Thank you for looking this over! Does the following patch (to be merged > into the original) capture it properly? Yup, also fix the commit message to be == CPU_V6, with that: Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Yours, Linus Walleij
On Wed, Jun 05, 2024 at 10:38:07AM +0200, Linus Walleij wrote: > On Tue, Jun 4, 2024 at 11:14 PM Paul E. McKenney <paulmck@kernel.org> wrote: > > > Thank you for looking this over! Does the following patch (to be merged > > into the original) capture it properly? > > Yup, also fix the commit message to be == CPU_V6, > with that: Good catch, and will fix. > Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Thank you! I will apply these on my next rebase. Thanx, Paul
On Wed, May 01, 2024 at 03:58:14PM -0700, Paul E. McKenney wrote:
> Hello!
>
> This v2 series provides emulation functions for one-byte cmpxchg,
^^
...
> Changes since v2:
^^
On Thu, May 02, 2024 at 09:01:53PM +0100, Al Viro wrote: > On Wed, May 01, 2024 at 03:58:14PM -0700, Paul E. McKenney wrote: > > Hello! > > > > This v2 series provides emulation functions for one-byte cmpxchg, > ^^ > ... > > > Changes since v2: Good catch, and I clearly wasn't paying attention. It should be "Changes since v1" and then "Changes since RFC". Again, apologies for my confusion! Thanx, Paul
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