With a 32-bit kernel running on 64-bit MIPS hardware the hardcoded value 
of `cpu_vmbits' only records the size of compatibility useg and does not 
reflect the size of native xuseg or the complete range of values allowed
in the VPN2 field of TLB entries.

An upcoming change will need the actual VPN2 value range permitted even 
in 32-bit kernel configurations, so always include the `vmbits' member 
in `struct cpuinfo_mips' and probe for SEGBITS when running on 64-bit 
hardware and resorting to the currently hardcoded value of 31 on 32-bit
processors.  No functional change for users of `cpu_vmbits'.

Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
---
 arch/mips/include/asm/cpu-features.h |    1 -
 arch/mips/include/asm/cpu-info.h     |    2 --
 arch/mips/include/asm/mipsregs.h     |    2 ++
 arch/mips/kernel/cpu-probe.c         |   13 ++++++++-----
 arch/mips/kernel/cpu-r3k-probe.c     |    2 ++
 5 files changed, 12 insertions(+), 8 deletions(-)

linux-mips-vmbits.diff
Index: linux-macro/arch/mips/include/asm/cpu-features.h
===================================================================
--- linux-macro.orig/arch/mips/include/asm/cpu-features.h
+++ linux-macro/arch/mips/include/asm/cpu-features.h
@@ -484,7 +484,6 @@
 # endif
 # ifndef cpu_vmbits
 # define cpu_vmbits cpu_data[0].vmbits
-# define __NEED_VMBITS_PROBE
 # endif
 #endif
 
Index: linux-macro/arch/mips/include/asm/cpu-info.h
===================================================================
--- linux-macro.orig/arch/mips/include/asm/cpu-info.h
+++ linux-macro/arch/mips/include/asm/cpu-info.h
@@ -80,9 +80,7 @@ struct cpuinfo_mips {
 	int			srsets; /* Shadow register sets */
 	int			package;/* physical package number */
 	unsigned int		globalnumber;
-#ifdef CONFIG_64BIT
 	int			vmbits; /* Virtual memory size in bits */
-#endif
 	void			*data;	/* Additional data */
 	unsigned int		watch_reg_count;   /* Number that exist */
 	unsigned int		watch_reg_use_cnt; /* Usable by ptrace */
Index: linux-macro/arch/mips/include/asm/mipsregs.h
===================================================================
--- linux-macro.orig/arch/mips/include/asm/mipsregs.h
+++ linux-macro/arch/mips/include/asm/mipsregs.h
@@ -1871,6 +1871,8 @@ do {									\
 
 #define read_c0_entryhi()	__read_ulong_c0_register($10, 0)
 #define write_c0_entryhi(val)	__write_ulong_c0_register($10, 0, val)
+#define read_c0_entryhi_64()	__read_64bit_c0_register($10, 0)
+#define write_c0_entryhi_64(val) __write_64bit_c0_register($10, 0, val)
 
 #define read_c0_guestctl1()	__read_32bit_c0_register($10, 4)
 #define write_c0_guestctl1(val)	__write_32bit_c0_register($10, 4, val)
Index: linux-macro/arch/mips/kernel/cpu-probe.c
===================================================================
--- linux-macro.orig/arch/mips/kernel/cpu-probe.c
+++ linux-macro/arch/mips/kernel/cpu-probe.c
@@ -210,11 +210,14 @@ static inline void set_elf_base_platform
 
 static inline void cpu_probe_vmbits(struct cpuinfo_mips *c)
 {
-#ifdef __NEED_VMBITS_PROBE
-	write_c0_entryhi(0x3fffffffffffe000ULL);
-	back_to_back_c0_hazard();
-	c->vmbits = fls64(read_c0_entryhi() & 0x3fffffffffffe000ULL);
-#endif
+	int vmbits = 31;
+
+	if (cpu_has_64bits) {
+		write_c0_entryhi_64(0x3fffffffffffe000ULL);
+		back_to_back_c0_hazard();
+		vmbits = fls64(read_c0_entryhi_64() & 0x3fffffffffffe000ULL);
+	}
+	c->vmbits = vmbits;
 }
 
 static void set_isa(struct cpuinfo_mips *c, unsigned int isa)
Index: linux-macro/arch/mips/kernel/cpu-r3k-probe.c
===================================================================
--- linux-macro.orig/arch/mips/kernel/cpu-r3k-probe.c
+++ linux-macro/arch/mips/kernel/cpu-r3k-probe.c
@@ -137,6 +137,8 @@ void cpu_probe(void)
 	else
 		cpu_set_nofpu_opts(c);
 
+	c->vmbits = 31;
+
 	reserve_exception_space(0, 0x400);
 }