riscv: Add macros for software check and hardware error exception codes

[PATCH] riscv: Add macros for software check and hardware error exception codes

Posted by Austin Kim 2 weeks, 2 days ago

The latest RISC-V Privileged specification defines new synchronous
exception codes in the scause register:

   18: Software check
   19: Hardware error

Link: https://docs.riscv.org/reference/isa/priv/supervisor.html
- 12.1.8. Supervisor Cause (scause) Register

Add these macros for future use.

Signed-off-by: Austin Kim <austindh.kim@gmail.com>
---
 arch/riscv/include/asm/csr.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index 4a37a9839..5ea875813 100644
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -108,6 +108,8 @@
 #define EXC_INST_PAGE_FAULT	12
 #define EXC_LOAD_PAGE_FAULT	13
 #define EXC_STORE_PAGE_FAULT	15
+#define EXC_SOFTWARE_CHECK	18
+#define EXC_HARDWARE_ERROR      19
 #define EXC_INST_GUEST_PAGE_FAULT	20
 #define EXC_LOAD_GUEST_PAGE_FAULT	21
 #define EXC_VIRTUAL_INST_FAULT		22
-- 
2.34.1

Re: [PATCH] riscv: Add macros for software check and hardware error exception codes

Posted by Paul Walmsley 2 weeks ago

Hi Austin,

On Thu, 22 Jan 2026, Austin Kim wrote:

> The latest RISC-V Privileged specification defines new synchronous
> exception codes in the scause register:
> 
>    18: Software check
>    19: Hardware error
> 
> Link: https://docs.riscv.org/reference/isa/priv/supervisor.html
> - 12.1.8. Supervisor Cause (scause) Register
> 
> Add these macros for future use.
> 
> Signed-off-by: Austin Kim <austindh.kim@gmail.com>

Thanks for the patch.  Though, maybe it makes more sense to add these 
along with code that uses them?


- Paul

Re: [PATCH] riscv: Add macros for software check and hardware error exception codes

Posted by Austin Kim 1 week, 5 days ago

Hello,

2026년 1월 24일 (토) PM 4:57, Paul Walmsley <pjw@kernel.org>님이 작성:
>
> Hi Austin,
>
> On Thu, 22 Jan 2026, Austin Kim wrote:
>
> > The latest RISC-V Privileged specification defines new synchronous
> > exception codes in the scause register:
> >
> >    18: Software check
> >    19: Hardware error
> >
> > Link: https://docs.riscv.org/reference/isa/priv/supervisor.html
> > - 12.1.8. Supervisor Cause (scause) Register
> >
> > Add these macros for future use.
> >
> > Signed-off-by: Austin Kim <austindh.kim@gmail.com>
>
> Thanks for the patch.  Though, maybe it makes more sense to add these
> along with code that uses them?

Thank you for the feedback.

Could you consider adding macro definitions for the upcoming exception codes?
These might be used later when trying to handle exceptions for
SOFTWARE_CHECK or HARDWARE_ERROR.

    18 = integrity fault
    19 = corrupt/poisoned memory

<From: https://lists.riscv.org/g/tech-privileged/topic/new_exception_cause_codes_for/100518912>

As for SOFTWARE_CHECK(18), Deepak Gupta is now developing patch-set
for the entire patch for
CFI with SOFTWARE_CHECK error, as below.

https://lkml.org/lkml/2025/6/4/979

And HARDWARE_ERROR(19) is intented for 'implementation defined'.

I guess the following switch~case is the right place to put
EXC_SOFTWARE_CHECK and
EXC_HARDWARE_ERROR.

arch/riscv/kvm/vcpu_exit.c
int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
                        struct kvm_cpu_trap *trap)
{
[...]
        case EXC_BREAKPOINT:
                run->exit_reason = KVM_EXIT_DEBUG;
                ret = 0;
                break;
+       case EXC_SOFTWARE_CHECK:
+       case EXC_HARDWARE_ERROR:
+               /* Todo: This exception code is added at Privileged
ISA version 1.13,
+                  further actions will follow          */
+               break;

If code with the macro definition should be added, I will propose a
new version later
with these macro definition.

Thank you again.

BR,
Austin Kim

>
>
> - Paul