drivers/crypto/marvell/cesa/cesa.c | 2 +- drivers/crypto/marvell/cesa/cesa.h | 9 +++-- drivers/crypto/marvell/cesa/tdma.c | 55 ++++++++++++++++++------------ 3 files changed, 41 insertions(+), 25 deletions(-)
On Wed, May 07, 2025 at 05:16:03PM +0200, Corentin Labbe wrote:
>
> I tested this patch and my armada-388-clearfog-pro panic with:
Thanks for testing! I didn't realise that you had one of these.
So just out of curiosity, does this driver actually pass the
self-tests before this patch with CRYPTO_MANAGER_EXTRA_TESTS?
Is your system SMP? How many CPUs?
In any case, my patch screwed up the very first chaining and here
is a fixed version:
---8<---
This driver tries to chain requests together before submitting them
to hardware in order to reduce completion interrupts.
However, it even extends chains that have already been submitted
to hardware. This is dangerous because there is no way of knowing
whether the hardware has already read the DMA memory in question
or not.
Fix this by splitting the chain list into two. One for submitted
requests and one for requests that have not yet been submitted.
Only extend the latter.
Reported-by: Klaus Kudielka <klaus.kudielka@gmail.com>
Fixes: 85030c5168f1 ("crypto: marvell - Add support for chaining crypto requests in TDMA mode")
Cc: <stable@vger.kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
drivers/crypto/marvell/cesa/cesa.c | 2 +-
drivers/crypto/marvell/cesa/cesa.h | 9 +++--
drivers/crypto/marvell/cesa/tdma.c | 55 ++++++++++++++++++------------
3 files changed, 41 insertions(+), 25 deletions(-)
diff --git a/drivers/crypto/marvell/cesa/cesa.c b/drivers/crypto/marvell/cesa/cesa.c
index fa08f10e6f3f..9c21f5d835d2 100644
--- a/drivers/crypto/marvell/cesa/cesa.c
+++ b/drivers/crypto/marvell/cesa/cesa.c
@@ -94,7 +94,7 @@ static int mv_cesa_std_process(struct mv_cesa_engine *engine, u32 status)
static int mv_cesa_int_process(struct mv_cesa_engine *engine, u32 status)
{
- if (engine->chain.first && engine->chain.last)
+ if (engine->chain_hw.first && engine->chain_hw.last)
return mv_cesa_tdma_process(engine, status);
return mv_cesa_std_process(engine, status);
diff --git a/drivers/crypto/marvell/cesa/cesa.h b/drivers/crypto/marvell/cesa/cesa.h
index d215a6bed6bc..50ca1039fdaa 100644
--- a/drivers/crypto/marvell/cesa/cesa.h
+++ b/drivers/crypto/marvell/cesa/cesa.h
@@ -440,8 +440,10 @@ struct mv_cesa_dev {
* SRAM
* @queue: fifo of the pending crypto requests
* @load: engine load counter, useful for load balancing
- * @chain: list of the current tdma descriptors being processed
- * by this engine.
+ * @chain_hw: list of the current tdma descriptors being processed
+ * by the hardware.
+ * @chain_sw: list of the current tdma descriptors that will be
+ * submitted to the hardware.
* @complete_queue: fifo of the processed requests by the engine
*
* Structure storing CESA engine information.
@@ -463,7 +465,8 @@ struct mv_cesa_engine {
struct gen_pool *pool;
struct crypto_queue queue;
atomic_t load;
- struct mv_cesa_tdma_chain chain;
+ struct mv_cesa_tdma_chain chain_hw;
+ struct mv_cesa_tdma_chain chain_sw;
struct list_head complete_queue;
int irq;
};
diff --git a/drivers/crypto/marvell/cesa/tdma.c b/drivers/crypto/marvell/cesa/tdma.c
index 388a06e180d6..02b609ef7043 100644
--- a/drivers/crypto/marvell/cesa/tdma.c
+++ b/drivers/crypto/marvell/cesa/tdma.c
@@ -38,6 +38,15 @@ void mv_cesa_dma_step(struct mv_cesa_req *dreq)
{
struct mv_cesa_engine *engine = dreq->engine;
+ spin_lock_bh(&engine->lock);
+ if (engine->chain_sw.first == dreq->chain.first) {
+ engine->chain_sw.first = NULL;
+ engine->chain_sw.last = NULL;
+ }
+ engine->chain_hw.first = dreq->chain.first;
+ engine->chain_hw.last = dreq->chain.last;
+ spin_unlock_bh(&engine->lock);
+
writel_relaxed(0, engine->regs + CESA_SA_CFG);
mv_cesa_set_int_mask(engine, CESA_SA_INT_ACC0_IDMA_DONE);
@@ -96,25 +105,29 @@ void mv_cesa_dma_prepare(struct mv_cesa_req *dreq,
void mv_cesa_tdma_chain(struct mv_cesa_engine *engine,
struct mv_cesa_req *dreq)
{
- if (engine->chain.first == NULL && engine->chain.last == NULL) {
- engine->chain.first = dreq->chain.first;
- engine->chain.last = dreq->chain.last;
+ struct mv_cesa_tdma_desc *last = engine->chain_sw.last;
+
+ /*
+ * Break the DMA chain if the request being queued needs the IV
+ * regs to be set before lauching the request.
+ */
+ if (!last || dreq->chain.first->flags & CESA_TDMA_SET_STATE) {
+ engine->chain_sw.first = dreq->chain.first;
+ last = dreq->chain.last;
+ engine->chain_sw.last = last;
} else {
- struct mv_cesa_tdma_desc *last;
-
- last = engine->chain.last;
last->next = dreq->chain.first;
- engine->chain.last = dreq->chain.last;
-
- /*
- * Break the DMA chain if the CESA_TDMA_BREAK_CHAIN is set on
- * the last element of the current chain, or if the request
- * being queued needs the IV regs to be set before lauching
- * the request.
- */
- if (!(last->flags & CESA_TDMA_BREAK_CHAIN) &&
- !(dreq->chain.first->flags & CESA_TDMA_SET_STATE))
- last->next_dma = cpu_to_le32(dreq->chain.first->cur_dma);
+ last->next_dma = cpu_to_le32(dreq->chain.first->cur_dma);
+ last = dreq->chain.last;
+ engine->chain_sw.last = last;
+ }
+ /*
+ * Break the DMA chain if the CESA_TDMA_BREAK_CHAIN is set on
+ * the last element of the current chain.
+ */
+ if (last->flags & CESA_TDMA_BREAK_CHAIN) {
+ engine->chain_sw.first = NULL;
+ engine->chain_sw.last = NULL;
}
}
@@ -127,7 +140,7 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
tdma_cur = readl(engine->regs + CESA_TDMA_CUR);
- for (tdma = engine->chain.first; tdma; tdma = next) {
+ for (tdma = engine->chain_hw.first; tdma; tdma = next) {
spin_lock_bh(&engine->lock);
next = tdma->next;
spin_unlock_bh(&engine->lock);
@@ -149,12 +162,12 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
&backlog);
/* Re-chaining to the next request */
- engine->chain.first = tdma->next;
+ engine->chain_hw.first = tdma->next;
tdma->next = NULL;
/* If this is the last request, clear the chain */
- if (engine->chain.first == NULL)
- engine->chain.last = NULL;
+ if (engine->chain_hw.first == NULL)
+ engine->chain_hw.last = NULL;
spin_unlock_bh(&engine->lock);
ctx = crypto_tfm_ctx(req->tfm);
--
2.39.5
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txtLe Thu, May 08, 2025 at 01:15:55PM +0800, Herbert Xu a écrit : > On Wed, May 07, 2025 at 05:16:03PM +0200, Corentin Labbe wrote: > > > > I tested this patch and my armada-388-clearfog-pro panic with: > > Thanks for testing! I didn't realise that you had one of these. I have started a bot which try to build/boot automaticly all patches touching hardware I own. And for the moment it handles only linux-sunxi and crypto patches. Happy it found something. > So just out of curiosity, does this driver actually pass the > self-tests before this patch with CRYPTO_MANAGER_EXTRA_TESTS? > > Is your system SMP? How many CPUs? > It fails to pass selftest on 6.14.4. It has 2 CPU
v3 simplifies it a little bit:
---8<---
This driver tries to chain requests together before submitting them
to hardware in order to reduce completion interrupts.
However, it even extends chains that have already been submitted
to hardware. This is dangerous because there is no way of knowing
whether the hardware has already read the DMA memory in question
or not.
Fix this by splitting the chain list into two. One for submitted
requests and one for requests that have not yet been submitted.
Only extend the latter.
Reported-by: Klaus Kudielka <klaus.kudielka@gmail.com>
Fixes: 85030c5168f1 ("crypto: marvell - Add support for chaining crypto requests in TDMA mode")
Cc: <stable@vger.kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
drivers/crypto/marvell/cesa/cesa.c | 2 +-
drivers/crypto/marvell/cesa/cesa.h | 9 +++--
drivers/crypto/marvell/cesa/tdma.c | 53 ++++++++++++++++++------------
3 files changed, 39 insertions(+), 25 deletions(-)
diff --git a/drivers/crypto/marvell/cesa/cesa.c b/drivers/crypto/marvell/cesa/cesa.c
index fa08f10e6f3f..9c21f5d835d2 100644
--- a/drivers/crypto/marvell/cesa/cesa.c
+++ b/drivers/crypto/marvell/cesa/cesa.c
@@ -94,7 +94,7 @@ static int mv_cesa_std_process(struct mv_cesa_engine *engine, u32 status)
static int mv_cesa_int_process(struct mv_cesa_engine *engine, u32 status)
{
- if (engine->chain.first && engine->chain.last)
+ if (engine->chain_hw.first && engine->chain_hw.last)
return mv_cesa_tdma_process(engine, status);
return mv_cesa_std_process(engine, status);
diff --git a/drivers/crypto/marvell/cesa/cesa.h b/drivers/crypto/marvell/cesa/cesa.h
index d215a6bed6bc..50ca1039fdaa 100644
--- a/drivers/crypto/marvell/cesa/cesa.h
+++ b/drivers/crypto/marvell/cesa/cesa.h
@@ -440,8 +440,10 @@ struct mv_cesa_dev {
* SRAM
* @queue: fifo of the pending crypto requests
* @load: engine load counter, useful for load balancing
- * @chain: list of the current tdma descriptors being processed
- * by this engine.
+ * @chain_hw: list of the current tdma descriptors being processed
+ * by the hardware.
+ * @chain_sw: list of the current tdma descriptors that will be
+ * submitted to the hardware.
* @complete_queue: fifo of the processed requests by the engine
*
* Structure storing CESA engine information.
@@ -463,7 +465,8 @@ struct mv_cesa_engine {
struct gen_pool *pool;
struct crypto_queue queue;
atomic_t load;
- struct mv_cesa_tdma_chain chain;
+ struct mv_cesa_tdma_chain chain_hw;
+ struct mv_cesa_tdma_chain chain_sw;
struct list_head complete_queue;
int irq;
};
diff --git a/drivers/crypto/marvell/cesa/tdma.c b/drivers/crypto/marvell/cesa/tdma.c
index 388a06e180d6..243305354420 100644
--- a/drivers/crypto/marvell/cesa/tdma.c
+++ b/drivers/crypto/marvell/cesa/tdma.c
@@ -38,6 +38,15 @@ void mv_cesa_dma_step(struct mv_cesa_req *dreq)
{
struct mv_cesa_engine *engine = dreq->engine;
+ spin_lock_bh(&engine->lock);
+ if (engine->chain_sw.first == dreq->chain.first) {
+ engine->chain_sw.first = NULL;
+ engine->chain_sw.last = NULL;
+ }
+ engine->chain_hw.first = dreq->chain.first;
+ engine->chain_hw.last = dreq->chain.last;
+ spin_unlock_bh(&engine->lock);
+
writel_relaxed(0, engine->regs + CESA_SA_CFG);
mv_cesa_set_int_mask(engine, CESA_SA_INT_ACC0_IDMA_DONE);
@@ -96,25 +105,27 @@ void mv_cesa_dma_prepare(struct mv_cesa_req *dreq,
void mv_cesa_tdma_chain(struct mv_cesa_engine *engine,
struct mv_cesa_req *dreq)
{
- if (engine->chain.first == NULL && engine->chain.last == NULL) {
- engine->chain.first = dreq->chain.first;
- engine->chain.last = dreq->chain.last;
- } else {
- struct mv_cesa_tdma_desc *last;
+ struct mv_cesa_tdma_desc *last = engine->chain_sw.last;
- last = engine->chain.last;
+ /*
+ * Break the DMA chain if the request being queued needs the IV
+ * regs to be set before lauching the request.
+ */
+ if (!last || dreq->chain.first->flags & CESA_TDMA_SET_STATE)
+ engine->chain_sw.first = dreq->chain.first;
+ else {
last->next = dreq->chain.first;
- engine->chain.last = dreq->chain.last;
-
- /*
- * Break the DMA chain if the CESA_TDMA_BREAK_CHAIN is set on
- * the last element of the current chain, or if the request
- * being queued needs the IV regs to be set before lauching
- * the request.
- */
- if (!(last->flags & CESA_TDMA_BREAK_CHAIN) &&
- !(dreq->chain.first->flags & CESA_TDMA_SET_STATE))
- last->next_dma = cpu_to_le32(dreq->chain.first->cur_dma);
+ last->next_dma = cpu_to_le32(dreq->chain.first->cur_dma);
+ }
+ last = dreq->chain.last;
+ engine->chain_sw.last = last;
+ /*
+ * Break the DMA chain if the CESA_TDMA_BREAK_CHAIN is set on
+ * the last element of the current chain.
+ */
+ if (last->flags & CESA_TDMA_BREAK_CHAIN) {
+ engine->chain_sw.first = NULL;
+ engine->chain_sw.last = NULL;
}
}
@@ -127,7 +138,7 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
tdma_cur = readl(engine->regs + CESA_TDMA_CUR);
- for (tdma = engine->chain.first; tdma; tdma = next) {
+ for (tdma = engine->chain_hw.first; tdma; tdma = next) {
spin_lock_bh(&engine->lock);
next = tdma->next;
spin_unlock_bh(&engine->lock);
@@ -149,12 +160,12 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
&backlog);
/* Re-chaining to the next request */
- engine->chain.first = tdma->next;
+ engine->chain_hw.first = tdma->next;
tdma->next = NULL;
/* If this is the last request, clear the chain */
- if (engine->chain.first == NULL)
- engine->chain.last = NULL;
+ if (engine->chain_hw.first == NULL)
+ engine->chain_hw.last = NULL;
spin_unlock_bh(&engine->lock);
ctx = crypto_tfm_ctx(req->tfm);
--
2.39.5
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txtOn Thu, 2025-05-08 at 13:22 +0800, Herbert Xu wrote:
> v3 simplifies it a little bit:
>
> ---8<---
> This driver tries to chain requests together before submitting them
> to hardware in order to reduce completion interrupts.
>
> However, it even extends chains that have already been submitted
> to hardware. This is dangerous because there is no way of knowing
> whether the hardware has already read the DMA memory in question
> or not.
>
> Fix this by splitting the chain list into two. One for submitted
> requests and one for requests that have not yet been submitted.
> Only extend the latter.
>
> Reported-by: Klaus Kudielka <klaus.kudielka@gmail.com>
> Fixes: 85030c5168f1 ("crypto: marvell - Add support for chaining crypto requests in TDMA mode")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
[...]
So, I am back at the hardware (armada-385-turris-omnia), and gave this patch a try.
CONFIG_CRYPTO_DEV_MARVELL_CESA=m
Upon modprobe marvell-cesa, I get the following results.
v6.15-rc5, unmodified
=====================
[ 73.061653] marvell-cesa f1090000.crypto: CESA device successfully registered
[ 73.115082] alg: ahash: mv-hmac-sha1 test failed (wrong result) on test vector 2, cfg="import/export"
[ 73.115206] alg: ahash: mv-hmac-md5 test failed (wrong result) on test vector 6, cfg="init+update+update+final two even splits"
[ 73.124364] alg: self-tests for hmac(sha1) using mv-hmac-sha1 failed (rc=-22)
[ 73.135887] alg: self-tests for hmac(md5) using mv-hmac-md5 failed (rc=-22)
[ 73.135893] ------------[ cut here ]------------
[ 73.135902] ------------[ cut here ]------------
[ 73.135896] WARNING: CPU: 0 PID: 394 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614
[ 73.135906] WARNING: CPU: 1 PID: 397 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614
[ 73.135911] alg: self-tests for hmac(md5) using mv-hmac-md5 failed (rc=-22)
[ 73.135914] Modules linked in: marvell_cesa
[ 73.135918] alg: self-tests for hmac(sha1) using mv-hmac-sha1 failed (rc=-22)
[ 73.135921] libdes
[ 73.135922] Modules linked in:
[ 73.135924] libaes
[ 73.135925] marvell_cesa libdes
[ 73.135929] libaes
[ 73.135932] CPU: 0 UID: 0 PID: 394 Comm: cryptomgr_test Not tainted 6.15.0-rc5 #3 NONE
[ 73.135940] Hardware name: Marvell Armada 380/385 (Device Tree)
[ 73.135943] Call trace:
[ 73.135948] unwind_backtrace from show_stack+0x10/0x14
[ 73.135963] show_stack from dump_stack_lvl+0x50/0x64
[ 73.135973] dump_stack_lvl from __warn+0x7c/0xd4
[ 73.135982] __warn from warn_slowpath_fmt+0x110/0x16c
[ 73.135994] warn_slowpath_fmt from alg_test+0x5f0/0x614
[ 73.136004] alg_test from cryptomgr_test+0x18/0x38
[ 73.136011] cryptomgr_test from kthread+0xe8/0x204
[ 73.136021] kthread from ret_from_fork+0x14/0x28
[ 73.136028] Exception stack(0xf0ac1fb0 to 0xf0ac1ff8)
[ 73.136033] 1fa0: 00000000 00000000 00000000 00000000
[ 73.136038] 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 73.136042] 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000
[ 73.136045] ---[ end trace 0000000000000000 ]---
[ 73.136046] CPU: 1 UID: 0 PID: 397 Comm: cryptomgr_test Not tainted 6.15.0-rc5 #3 NONE
[ 73.136052] Hardware name: Marvell Armada 380/385 (Device Tree)
[ 73.136055] Call trace:
[ 73.136057] unwind_backtrace from show_stack+0x10/0x14
[ 73.136070] show_stack from dump_stack_lvl+0x50/0x64
[ 73.136079] dump_stack_lvl from __warn+0x7c/0xd4
[ 73.136087] __warn from warn_slowpath_fmt+0x110/0x16c
[ 73.136098] warn_slowpath_fmt from alg_test+0x5f0/0x614
[ 73.136108] alg_test from cryptomgr_test+0x18/0x38
[ 73.136115] cryptomgr_test from kthread+0xe8/0x204
[ 73.136123] kthread from ret_from_fork+0x14/0x28
[ 73.136130] Exception stack(0xf0ac9fb0 to 0xf0ac9ff8)
[ 73.136135] 9fa0: 00000000 00000000 00000000 00000000
[ 73.136140] 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 73.136144] 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000
[ 73.136147] ---[ end trace 0000000000000000 ]---
[ 73.137628] alg: ahash: mv-hmac-sha256 test failed (wrong result) on test vector 0, cfg="init+update+final aligned buffer"
[ 73.148747] alg: self-tests for hmac(sha256) using mv-hmac-sha256 failed (rc=-22)
[ 73.148755] ------------[ cut here ]------------
[ 73.148760] WARNING: CPU: 0 PID: 399 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614
[ 73.148783] alg: self-tests for hmac(sha256) using mv-hmac-sha256 failed (rc=-22)
[ 73.148791] Modules linked in: marvell_cesa libdes libaes
[ 73.148827] CPU: 0 UID: 0 PID: 399 Comm: cryptomgr_test Tainted: G W 6.15.0-rc5 #3 NONE
[ 73.148840] Tainted: [W]=WARN
[ 73.148842] Hardware name: Marvell Armada 380/385 (Device Tree)
[ 73.148847] Call trace:
[ 73.148854] unwind_backtrace from show_stack+0x10/0x14
[ 73.148878] show_stack from dump_stack_lvl+0x50/0x64
[ 73.148893] dump_stack_lvl from __warn+0x7c/0xd4
[ 73.148912] __warn from warn_slowpath_fmt+0x110/0x16c
[ 73.148929] warn_slowpath_fmt from alg_test+0x5f0/0x614
[ 73.148951] alg_test from cryptomgr_test+0x18/0x38
[ 73.148960] cryptomgr_test from kthread+0xe8/0x204
[ 73.148970] kthread from ret_from_fork+0x14/0x28
[ 73.148977] Exception stack(0xf0addfb0 to 0xf0addff8)
[ 73.148982] dfa0: 00000000 00000000 00000000 00000000
[ 73.148987] dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 73.148991] dfe0: 00000000 00000000 00000000 00000000 00000013 00000000
[ 73.148994] ---[ end trace 0000000000000000 ]---
v6.15-rc5, with the v3 PATCH
============================
[ 28.374751] marvell-cesa f1090000.crypto: CESA device successfully registered
[ 28.427503] alg: ahash: mv-hmac-sha1 test failed (wrong result) on test vector 0, cfg="init+update+final misaligned buffer"
[ 28.427520] alg: ahash: mv-hmac-sha256 test failed (wrong result) on test vector 2, cfg="init+update+update+final two even splits"
[ 28.438688] alg: self-tests for hmac(sha1) using mv-hmac-sha1 failed (rc=-22)
[ 28.438693] ------------[ cut here ]------------
[ 28.438695] WARNING: CPU: 1 PID: 392 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614
[ 28.450482] alg: self-tests for hmac(sha1) using mv-hmac-sha1 failed (rc=-22)
[ 28.450486] Modules linked in:
[ 28.450485] alg: self-tests for hmac(sha256) using mv-hmac-sha256 failed (rc=-22)
[ 28.450489] ------------[ cut here ]------------
[ 28.450490] marvell_cesa libdes libaes
[ 28.450494] WARNING: CPU: 0 PID: 395 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614
[ 28.450504] alg: self-tests for hmac(sha256) using mv-hmac-sha256 failed (rc=-22)
[ 28.450502] CPU: 1 UID: 0 PID: 392 Comm: cryptomgr_test Not tainted 6.15.0-rc5+ #4 NONE
[ 28.450508] Modules linked in:
[ 28.450510] Hardware name: Marvell Armada 380/385 (Device Tree)
[ 28.450511] marvell_cesa
[ 28.450513] Call trace:
[ 28.450514] libdes libaes
[ 28.450519] unwind_backtrace from show_stack+0x10/0x14
[ 28.450534] show_stack from dump_stack_lvl+0x50/0x64
[ 28.450544] dump_stack_lvl from __warn+0x7c/0xd4
[ 28.450554] __warn from warn_slowpath_fmt+0x110/0x16c
[ 28.450565] warn_slowpath_fmt from alg_test+0x5f0/0x614
[ 28.450575] alg_test from cryptomgr_test+0x18/0x38
[ 28.450582] cryptomgr_test from kthread+0xe8/0x204
[ 28.450592] kthread from ret_from_fork+0x14/0x28
[ 28.450599] Exception stack(0xf0b09fb0 to 0xf0b09ff8)
[ 28.450604] 9fa0: 00000000 00000000 00000000 00000000
[ 28.450609] 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 28.450613] 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000
[ 28.450616] ---[ end trace 0000000000000000 ]---
[ 28.450617] CPU: 0 UID: 0 PID: 395 Comm: cryptomgr_test Not tainted 6.15.0-rc5+ #4 NONE
[ 28.450624] Hardware name: Marvell Armada 380/385 (Device Tree)
[ 28.450626] Call trace:
[ 28.450628] unwind_backtrace from show_stack+0x10/0x14
[ 28.450640] show_stack from dump_stack_lvl+0x50/0x64
[ 28.450650] dump_stack_lvl from __warn+0x7c/0xd4
[ 28.450658] __warn from warn_slowpath_fmt+0x110/0x16c
[ 28.450669] warn_slowpath_fmt from alg_test+0x5f0/0x614
[ 28.450679] alg_test from cryptomgr_test+0x18/0x38
[ 28.450686] cryptomgr_test from kthread+0xe8/0x204
[ 28.450694] kthread from ret_from_fork+0x14/0x28
[ 28.450701] Exception stack(0xf0aa9fb0 to 0xf0aa9ff8)
[ 28.450706] 9fa0: 00000000 00000000 00000000 00000000
[ 28.450711] 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 28.450716] 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000
[ 28.450718] ---[ end trace 0000000000000000 ]---
[ 28.454686] alg: ahash: mv-md5 test failed (wrong result) on test vector 1, cfg="init+update+final aligned buffer"
[ 28.465109] alg: self-tests for md5 using mv-md5 failed (rc=-22)
[ 28.465120] ------------[ cut here ]------------
[ 28.465125] WARNING: CPU: 1 PID: 385 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614
[ 28.465140] alg: self-tests for md5 using mv-md5 failed (rc=-22)
[ 28.465143] Modules linked in: marvell_cesa libdes libaes
[ 28.465172] CPU: 1 UID: 0 PID: 385 Comm: cryptomgr_test Tainted: G W 6.15.0-rc5+ #4 NONE
[ 28.465181] Tainted: [W]=WARN
[ 28.465183] Hardware name: Marvell Armada 380/385 (Device Tree)
[ 28.465186] Call trace:
[ 28.465190] unwind_backtrace from show_stack+0x10/0x14
[ 28.465205] show_stack from dump_stack_lvl+0x50/0x64
[ 28.465215] dump_stack_lvl from __warn+0x7c/0xd4
[ 28.465224] __warn from warn_slowpath_fmt+0x110/0x16c
[ 28.465235] warn_slowpath_fmt from alg_test+0x5f0/0x614
[ 28.465246] alg_test from cryptomgr_test+0x18/0x38
[ 28.465253] cryptomgr_test from kthread+0xe8/0x204
[ 28.465262] kthread from ret_from_fork+0x14/0x28
[ 28.465270] Exception stack(0xf0ae9fb0 to 0xf0ae9ff8)
[ 28.465275] 9fa0: 00000000 00000000 00000000 00000000
[ 28.465280] 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 28.465284] 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000
[ 28.465287] ---[ end trace 0000000000000000 ]---
[ 28.465317] alg: ahash: mv-hmac-md5 setkey failed on test vector 0; expected_error=0, actual_error=-80, flags=0x1
[ 28.475674] alg: self-tests for hmac(md5) using mv-hmac-md5 failed (rc=-80)
[ 28.475685] ------------[ cut here ]------------
[ 28.475694] WARNING: CPU: 0 PID: 390 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614
[ 28.475716] alg: self-tests for hmac(md5) using mv-hmac-md5 failed (rc=-80)
[ 28.475724] Modules linked in: marvell_cesa libdes libaes
[ 28.475752] CPU: 0 UID: 0 PID: 390 Comm: cryptomgr_test Tainted: G W 6.15.0-rc5+ #4 NONE
[ 28.475770] Tainted: [W]=WARN
[ 28.475772] Hardware name: Marvell Armada 380/385 (Device Tree)
[ 28.475774] Call trace:
[ 28.475780] unwind_backtrace from show_stack+0x10/0x14
[ 28.475799] show_stack from dump_stack_lvl+0x50/0x64
[ 28.475818] dump_stack_lvl from __warn+0x7c/0xd4
[ 28.475831] __warn from warn_slowpath_fmt+0x110/0x16c
[ 28.475853] warn_slowpath_fmt from alg_test+0x5f0/0x614
[ 28.475865] alg_test from cryptomgr_test+0x18/0x38
[ 28.475872] cryptomgr_test from kthread+0xe8/0x204
[ 28.475881] kthread from ret_from_fork+0x14/0x28
[ 28.475888] Exception stack(0xf0b05fb0 to 0xf0b05ff8)
[ 28.475893] 5fa0: 00000000 00000000 00000000 00000000
[ 28.475897] 5fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 28.475902] 5fe0: 00000000 00000000 00000000 00000000 00000013 00000000
[ 28.475904] ---[ end trace 0000000000000000 ]---
On Sat, May 10, 2025 at 10:32:53AM +0200, Klaus Kudielka wrote:
>
> So, I am back at the hardware (armada-385-turris-omnia), and gave this patch a try.
> CONFIG_CRYPTO_DEV_MARVELL_CESA=m
>
> Upon modprobe marvell-cesa, I get the following results.
Thanks, could you please try this patch which goes on top of the
previous v3 patch to disable chaining completely?
Thanks,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
--
diff --git a/drivers/crypto/marvell/cesa/tdma.c b/drivers/crypto/marvell/cesa/tdma.c
index 9b5fd957dde2..f4fe2a881f1e 100644
--- a/drivers/crypto/marvell/cesa/tdma.c
+++ b/drivers/crypto/marvell/cesa/tdma.c
@@ -123,7 +123,7 @@ void mv_cesa_tdma_chain(struct mv_cesa_engine *engine,
* Break the DMA chain if the CESA_TDMA_BREAK_CHAIN is set on
* the last element of the current chain.
*/
- if (last->flags & CESA_TDMA_BREAK_CHAIN) {
+ if (1 || (last->flags & CESA_TDMA_BREAK_CHAIN)) {
engine->chain_sw.first = NULL;
engine->chain_sw.last = NULL;
}
On Sat, 2025-05-10 at 17:05 +0800, Herbert Xu wrote: > On Sat, May 10, 2025 at 10:32:53AM +0200, Klaus Kudielka wrote: > > > > So, I am back at the hardware (armada-385-turris-omnia), and gave this patch a try. > > CONFIG_CRYPTO_DEV_MARVELL_CESA=m > > > > Upon modprobe marvell-cesa, I get the following results. > > Thanks, could you please try this patch which goes on top of the > previous v3 patch to disable chaining completely? > > Thanks, Patch applied on top. On the first attempt all self-tests passed, but on the second and third unfortunately not. [ 16.841981] marvell-cesa f1090000.crypto: CESA device successfully registered [ 16.912258] alg: ahash: mv-sha256 test failed (wrong result) on test vector 2, cfg="import/export" [ 16.917574] alg: ahash: mv-md5 test failed (wrong result) on test vector 3, cfg="init+update+final misaligned buffer" [ 16.921323] alg: self-tests for sha256 using mv-sha256 failed (rc=-22) [ 16.931961] ------------[ cut here ]------------ [ 16.931966] WARNING: CPU: 1 PID: 388 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614 [ 16.931982] alg: self-tests for sha256 using mv-sha256 failed (rc=-22) [ 16.931985] Modules linked in: [ 16.931984] alg: self-tests for md5 using mv-md5 failed (rc=-22) [ 16.931989] ------------[ cut here ]------------ [ 16.931989] marvell_cesa libdes libaes [ 16.931993] WARNING: CPU: 0 PID: 386 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614 [ 16.932001] CPU: 1 UID: 0 PID: 388 Comm: cryptomgr_test Not tainted 6.15.0-rc5+ #5 NONE [ 16.932004] alg: self-tests for md5 using mv-md5 failed (rc=-22) [ 16.932007] Modules linked in: [ 16.932009] Hardware name: Marvell Armada 380/385 (Device Tree) [ 16.932012] marvell_cesa [ 16.932013] Call trace: [ 16.932015] libdes libaes [ 16.932018] unwind_backtrace from show_stack+0x10/0x14 [ 16.932033] show_stack from dump_stack_lvl+0x50/0x64 [ 16.932042] dump_stack_lvl from __warn+0x7c/0xd4 [ 16.932052] __warn from warn_slowpath_fmt+0x110/0x16c [ 16.932063] warn_slowpath_fmt from alg_test+0x5f0/0x614 [ 16.932073] alg_test from cryptomgr_test+0x18/0x38 [ 16.932080] cryptomgr_test from kthread+0xe8/0x204 [ 16.932090] kthread from ret_from_fork+0x14/0x28 [ 16.932097] Exception stack(0xf0aadfb0 to 0xf0aadff8) [ 16.932102] dfa0: 00000000 00000000 00000000 00000000 [ 16.932107] dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 16.932112] dfe0: 00000000 00000000 00000000 00000000 00000013 00000000 [ 16.932115] ---[ end trace 0000000000000000 ]--- [ 16.932115] CPU: 0 UID: 0 PID: 386 Comm: cryptomgr_test Not tainted 6.15.0-rc5+ #5 NONE [ 16.932122] Hardware name: Marvell Armada 380/385 (Device Tree) [ 16.932125] Call trace: [ 16.932127] unwind_backtrace from show_stack+0x10/0x14 [ 16.932139] show_stack from dump_stack_lvl+0x50/0x64 [ 16.932148] dump_stack_lvl from __warn+0x7c/0xd4 [ 16.932157] __warn from warn_slowpath_fmt+0x110/0x16c [ 16.932168] warn_slowpath_fmt from alg_test+0x5f0/0x614 [ 16.932178] alg_test from cryptomgr_test+0x18/0x38 [ 16.932185] cryptomgr_test from kthread+0xe8/0x204 [ 16.932193] kthread from ret_from_fork+0x14/0x28 [ 16.932200] Exception stack(0xf0aa1fb0 to 0xf0aa1ff8) [ 16.932205] 1fa0: 00000000 00000000 00000000 00000000 [ 16.932210] 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 16.932214] 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 [ 16.932217] ---[ end trace 0000000000000000 ]--- [ 16.932990] alg: ahash: mv-hmac-md5 setkey failed on test vector 0; expected_error=0, actual_error=-80, flags=0x1 [ 16.943346] alg: self-tests for hmac(md5) using mv-hmac-md5 failed (rc=-80) [ 16.943353] ------------[ cut here ]------------ [ 16.943357] WARNING: CPU: 0 PID: 391 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614 [ 16.943370] alg: self-tests for hmac(md5) using mv-hmac-md5 failed (rc=-80) [ 16.943374] Modules linked in: marvell_cesa libdes libaes [ 16.943408] CPU: 0 UID: 0 PID: 391 Comm: cryptomgr_test Tainted: G W 6.15.0-rc5+ #5 NONE [ 16.943418] Tainted: [W]=WARN [ 16.943420] Hardware name: Marvell Armada 380/385 (Device Tree) [ 16.943423] Call trace: [ 16.943428] unwind_backtrace from show_stack+0x10/0x14 [ 16.943445] show_stack from dump_stack_lvl+0x50/0x64 [ 16.943455] dump_stack_lvl from __warn+0x7c/0xd4 [ 16.943465] __warn from warn_slowpath_fmt+0x110/0x16c [ 16.943476] warn_slowpath_fmt from alg_test+0x5f0/0x614 [ 16.943487] alg_test from cryptomgr_test+0x18/0x38 [ 16.943495] cryptomgr_test from kthread+0xe8/0x204 [ 16.943504] kthread from ret_from_fork+0x14/0x28 [ 16.943512] Exception stack(0xf0ab9fb0 to 0xf0ab9ff8) [ 16.943517] 9fa0: 00000000 00000000 00000000 00000000 [ 16.943522] 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 16.943527] 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000 [ 16.943530] ---[ end trace 0000000000000000 ]--- [ 16.943600] alg: ahash: mv-hmac-sha256 setkey failed on test vector 0; expected_error=0, actual_error=-80, flags=0x1 [ 16.954188] alg: self-tests for hmac(sha256) using mv-hmac-sha256 failed (rc=-80) [ 16.954195] ------------[ cut here ]------------ [ 16.954200] WARNING: CPU: 0 PID: 394 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614 [ 16.954211] alg: self-tests for hmac(sha256) using mv-hmac-sha256 failed (rc=-80) [ 16.954215] Modules linked in: marvell_cesa libdes libaes [ 16.954229] CPU: 0 UID: 0 PID: 394 Comm: cryptomgr_test Tainted: G W 6.15.0-rc5+ #5 NONE [ 16.954236] Tainted: [W]=WARN [ 16.954238] Hardware name: Marvell Armada 380/385 (Device Tree) [ 16.954241] Call trace: [ 16.954244] unwind_backtrace from show_stack+0x10/0x14 [ 16.954257] show_stack from dump_stack_lvl+0x50/0x64 [ 16.954266] dump_stack_lvl from __warn+0x7c/0xd4 [ 16.954275] __warn from warn_slowpath_fmt+0x110/0x16c [ 16.954286] warn_slowpath_fmt from alg_test+0x5f0/0x614 [ 16.954296] alg_test from cryptomgr_test+0x18/0x38 [ 16.954304] cryptomgr_test from kthread+0xe8/0x204 [ 16.954312] kthread from ret_from_fork+0x14/0x28 [ 16.954320] Exception stack(0xf0ac5fb0 to 0xf0ac5ff8) [ 16.954324] 5fa0: 00000000 00000000 00000000 00000000 [ 16.954329] 5fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 16.954333] 5fe0: 00000000 00000000 00000000 00000000 00000013 00000000 [ 16.954336] ---[ end trace 0000000000000000 ]---
On Sat, May 10, 2025 at 11:38:16AM +0200, Klaus Kudielka wrote:
>
> Patch applied on top.
> On the first attempt all self-tests passed, but on the second and third unfortunately not.
OK, you can get more consistent errors by enabling extra testing with
CONFIG_CRYPTO_MANAGER_EXTRA_TESTS=y.
In any case, let's go back to the printk approach and see what's
going on. This patch could either go on top of the previous ones
or be applied by itself.
Thanks,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
--
diff --git a/drivers/crypto/marvell/cesa/cesa.c b/drivers/crypto/marvell/cesa/cesa.c
index 9c21f5d835d2..fd7f43575cb2 100644
--- a/drivers/crypto/marvell/cesa/cesa.c
+++ b/drivers/crypto/marvell/cesa/cesa.c
@@ -127,6 +127,8 @@ static irqreturn_t mv_cesa_int(int irq, void *priv)
if (!(status & mask))
break;
+ pr_err("mv_cesa_int: %d 0x%x 0x%x\n", engine->id, status, mask);
+
/*
* TODO: avoid clearing the FPGA_INT_STATUS if this not
* relevant on some platforms.
diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c
index a46ae868110a..cc7efd9a099a 100644
--- a/drivers/crypto/marvell/cesa/hash.c
+++ b/drivers/crypto/marvell/cesa/hash.c
@@ -396,6 +396,8 @@ static void mv_cesa_ahash_complete(struct crypto_async_request *req)
}
atomic_sub(ahashreq->nbytes, &engine->load);
+
+ pr_err("mv_cesa_ahash_complete: %d 0x%lx\n", engine->id, (unsigned long)ahashreq);
}
static void mv_cesa_ahash_prepare(struct crypto_async_request *req,
@@ -417,6 +419,8 @@ static void mv_cesa_ahash_req_cleanup(struct crypto_async_request *req)
struct ahash_request *ahashreq = ahash_request_cast(req);
struct mv_cesa_ahash_req *creq = ahash_request_ctx(ahashreq);
+ pr_err("mv_cesa_ahash_req_cleanup: %d 0x%lx\n", creq->base.engine->id, (unsigned long)ahashreq);
+
if (creq->last_req)
mv_cesa_ahash_last_cleanup(ahashreq);
@@ -783,6 +787,7 @@ static int mv_cesa_ahash_queue_req(struct ahash_request *req)
engine = mv_cesa_select_engine(req->nbytes);
mv_cesa_ahash_prepare(&req->base, engine);
+ pr_err("mv_cesa_ahash_queue_req: %d 0x%lx\n", engine->id, (unsigned long)req);
ret = mv_cesa_queue_req(&req->base, &creq->base);
if (mv_cesa_req_needs_cleanup(&req->base, ret))
diff --git a/drivers/crypto/marvell/cesa/tdma.c b/drivers/crypto/marvell/cesa/tdma.c
index 9b5fd957dde2..59be742c5a1c 100644
--- a/drivers/crypto/marvell/cesa/tdma.c
+++ b/drivers/crypto/marvell/cesa/tdma.c
@@ -47,6 +47,8 @@ void mv_cesa_dma_step(struct mv_cesa_req *dreq)
engine->chain_hw.last = dreq->chain.last;
spin_unlock_bh(&engine->lock);
+ pr_err("mv_cesa_dma_step: %d 0x%lx 0x%lx 0x%lx\n", engine->id, (unsigned long)dreq, (unsigned long)dreq->chain.first->cur_dma, (unsigned long)dreq->chain.last->cur_dma);
+
writel_relaxed(0, engine->regs + CESA_SA_CFG);
mv_cesa_set_int_mask(engine, CESA_SA_INT_ACC0_IDMA_DONE);
@@ -137,6 +139,7 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
int res = 0;
tdma_cur = readl(engine->regs + CESA_TDMA_CUR);
+ pr_err("mv_cesa_tdma_process: %d 0x%lx\n", engine->id, (unsigned long)tdma_cur);
for (tdma = engine->chain_hw.first; tdma; tdma = next) {
spin_lock_bh(&engine->lock);
@@ -186,6 +189,8 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
break;
}
+ pr_err("mv_cesa_tdma_process: %d %d 0x%lx\n", engine->id, res, (unsigned long)req);
+
/*
* Save the last request in error to engine->req, so that the core
* knows which request was faulty
On Sat, May 10, 2025 at 11:38:16AM +0200, Klaus Kudielka wrote:
>
> Patch applied on top.
> On the first attempt all self-tests passed, but on the second and third unfortunately not.
This patch fixes the extra zero-length TDMA descriptor, which even
if it doesn't fix the problem, is obviously the right thing to do.
---8<---
The user may set req->src even if req->nbytes == 0. If there
is no data to hash from req->src, do not generate an empty TDMA
descriptor.
Fixes: db509a45339f ("crypto: marvell/cesa - add TDMA support")
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
drivers/crypto/marvell/cesa/hash.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c
index a46ae868110a..2200bc6a034f 100644
--- a/drivers/crypto/marvell/cesa/hash.c
+++ b/drivers/crypto/marvell/cesa/hash.c
@@ -650,7 +650,7 @@ static int mv_cesa_ahash_dma_req_init(struct ahash_request *req)
if (ret)
goto err_free_tdma;
- if (iter.src.sg) {
+ if (iter.base.len > iter.src.op_offset) {
/*
* Add all the new data, inserting an operation block and
* launch command between each full SRAM block-worth of
--
2.39.5
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txtOn Sat, 2025-05-10 at 18:43 +0800, Herbert Xu wrote: > On Sat, May 10, 2025 at 11:38:16AM +0200, Klaus Kudielka wrote: > > > > Patch applied on top. > > On the first attempt all self-tests passed, but on the second and third unfortunately not. > > This patch fixes the extra zero-length TDMA descriptor, which even > if it doesn't fix the problem, is obviously the right thing to do. > Here a result with the printk patch and the other two small fixes on top. Mai 10 16:39:36.497801 spare kernel: mv_cesa_dma_step: 0 0xc5924d40 0x35c1000 0x35c1080 Mai 10 16:39:36.497962 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:36.498043 spare kernel: mv_cesa_dma_step: 1 0xc5a78d40 0x35c10a0 0x35c1120 Mai 10 16:39:36.498104 spare kernel: mv_cesa_tdma_process: 0 0x35c1080 Mai 10 16:39:36.498165 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 10 16:39:36.498223 spare kernel: mv_cesa_tdma_process: 0 0 0xc5924d10 Mai 10 16:39:36.498290 spare kernel: mv_cesa_dma_step: 0 0xc5924d40 0x35c1080 0x35c1000 Mai 10 16:39:36.498355 spare kernel: mv_cesa_tdma_process: 1 0x35c1120 Mai 10 16:39:36.498414 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:36.498473 spare kernel: mv_cesa_tdma_process: 1 0 0xc5a78d10 Mai 10 16:39:36.498540 spare kernel: mv_cesa_dma_step: 1 0xc5a78e40 0x35c1120 0x35c10a0 Mai 10 16:39:36.498599 spare kernel: mv_cesa_tdma_process: 0 0x35c1000 Mai 10 16:39:36.498657 spare kernel: mv_cesa_tdma_process: 0 0 0xc5924d10 Mai 10 16:39:36.498714 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 10 16:39:36.498785 spare kernel: mv_cesa_dma_step: 0 0xc3afe140 0x35c1000 0x35c1080 Mai 10 16:39:36.498844 spare kernel: mv_cesa_tdma_process: 1 0x35c10a0 Mai 10 16:39:36.498902 spare kernel: mv_cesa_tdma_process: 1 0 0xc5a78e10 Mai 10 16:39:36.498960 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:36.499015 spare kernel: mv_cesa_dma_step: 1 0xc5a78d40 0x35c10a0 0x35c1120 Mai 10 16:39:36.499072 spare kernel: mv_cesa_tdma_process: 0 0x35c1080 Mai 10 16:39:36.499129 spare kernel: mv_cesa_tdma_process: 0 0 0xc3afe110 Mai 10 16:39:36.499186 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 10 16:39:36.499241 spare kernel: mv_cesa_dma_step: 0 0xc5924d40 0x35c1080 0x35c1000 Mai 10 16:39:36.499298 spare kernel: mv_cesa_tdma_process: 1 0x35c1120 Mai 10 16:39:36.499355 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:36.499415 spare kernel: mv_cesa_tdma_process: 1 0 0xc5a78d10 Mai 10 16:39:36.499473 spare kernel: mv_cesa_tdma_process: 0 0x35c1000 Mai 10 16:39:36.499531 spare kernel: mv_cesa_dma_step: 1 0xc5a78f40 0x35c1120 0x35c10a0 Mai 10 16:39:36.499589 spare kernel: mv_cesa_tdma_process: 0 0 0xc5924d10 Mai 10 16:39:36.516446 spare kernel: mv_cesa_dma_step: 0 0xc5924d40 0x35c1000 0x35c1080 Mai 10 16:39:36.516538 spare kernel: mv_cesa_int: 1 0x4ea4 0x80 Mai 10 16:39:36.516601 spare kernel: mv_cesa_tdma_process: 1 0x35c10a0 Mai 10 16:39:36.516660 spare kernel: mv_cesa_tdma_process: 1 0 0xc5a78f10 Mai 10 16:39:36.516719 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:36.516774 spare kernel: mv_cesa_dma_step: 1 0xcfd3a040 0x35c10a0 0x35c1120 Mai 10 16:39:36.516845 spare kernel: mv_cesa_tdma_process: 0 0x35c1080 Mai 10 16:39:36.516912 spare kernel: mv_cesa_tdma_process: 0 0 0xc5924d10 Mai 10 16:39:36.549929 spare kernel: mv_cesa_dma_step: 0 0xc3afe140 0x35c1080 0x35c1000 Mai 10 16:39:36.550005 spare kernel: mv_cesa_int: 1 0x4ea4 0x80 Mai 10 16:39:36.550065 spare kernel: mv_cesa_tdma_process: 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0xc3afe110 Mai 10 16:39:44.599395 spare kernel: mv_cesa_tdma_process: 0 0x35c1580 Mai 10 16:39:44.654351 spare kernel: mv_cesa_ahash_queue_req: 1 0xc3aa9400 Mai 10 16:39:44.654429 spare kernel: mv_cesa_tdma_process: 0 0 0xc5924d10 Mai 10 16:39:44.654491 spare kernel: mv_cesa_dma_step: 0 0xc3aa8840 0x35c1480 0x35c13a0 Mai 10 16:39:44.654551 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 10 16:39:44.654608 spare kernel: mv_cesa_dma_step: 1 0xc3aa9440 0x35c14c0 0x35c12a0 Mai 10 16:39:44.654667 spare kernel: mv_cesa_tdma_process: 0 0x35c13a0 Mai 10 16:39:44.654727 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 10 16:39:44.654786 spare kernel: mv_cesa_ahash_complete: 0 0xc3aa8800 Mai 10 16:39:44.654854 spare kernel: mv_cesa_tdma_process: 1 0x35c12a0 Mai 10 16:39:44.654914 spare kernel: mv_cesa_tdma_process: 0 0 0xc3aa8800 Mai 10 16:39:44.654972 spare kernel: mv_cesa_ahash_complete: 1 0xc3aa9400 Mai 10 16:39:44.655031 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc3aa8800 Mai 10 16:39:44.655088 spare kernel: mv_cesa_tdma_process: 1 0 0xc3aa9400 Mai 10 16:39:44.655148 spare kernel: mv_cesa_dma_step: 0 0xc5a78f40 0x35c13a0 0x35c13e0 Mai 10 16:39:44.655208 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc3aa9400 Mai 10 16:39:44.729880 spare kernel: mv_cesa_dma_step: 1 0xcfd3a040 0x35c12a0 0x35c1300 Mai 10 16:39:44.729982 spare kernel: mv_cesa_ahash_queue_req: 1 0xc3aa8800 Mai 10 16:39:44.730059 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 10 16:39:44.730122 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 10 16:39:44.730181 spare kernel: mv_cesa_tdma_process: 1 0x35c1300 Mai 10 16:39:44.730241 spare kernel: mv_cesa_tdma_process: 0 0x35c13e0 Mai 10 16:39:44.730304 spare kernel: mv_cesa_tdma_process: 1 0 0xcfd3a010 Mai 10 16:39:44.730366 spare kernel: mv_cesa_tdma_process: 0 0 0xc5a78f10 Mai 10 16:39:44.730428 spare kernel: mv_cesa_dma_step: 1 0xc3aa8840 0x35c14c0 0x35c1460 Mai 10 16:39:44.730488 spare kernel: mv_cesa_dma_step: 0 0xc5a78d40 0x35c13e0 0x35c13a0 Mai 10 16:39:44.730549 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 10 16:39:44.730607 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:44.730670 spare kernel: mv_cesa_tdma_process: 1 0x35c1460 Mai 10 16:39:44.730731 spare kernel: mv_cesa_ahash_complete: 1 0xc3aa8800 Mai 10 16:39:44.730791 spare kernel: mv_cesa_tdma_process: 0 0x35c13a0 Mai 10 16:39:44.730853 spare kernel: mv_cesa_tdma_process: 1 0 0xc3aa8800 Mai 10 16:39:44.730913 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc3aa8800 Mai 10 16:39:44.730973 spare kernel: mv_cesa_tdma_process: 0 0 0xc5a78d10 Mai 10 16:39:44.768929 spare kernel: mv_cesa_ahash_queue_req: 1 0xc3aa8e00 Mai 10 16:39:44.769012 spare kernel: mv_cesa_dma_step: 0 0xc5924d40 0x35c1460 0x35c1300 Mai 10 16:39:44.769075 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:44.769132 spare kernel: mv_cesa_tdma_process: 0 0x35c1300 Mai 10 16:39:44.769201 spare kernel: mv_cesa_tdma_process: 0 0 0xc5924d10 Mai 10 16:39:44.769259 spare kernel: mv_cesa_dma_step: 0 0xc3afe140 0x35c1300 0x35c1480 Mai 10 16:39:44.769318 spare kernel: mv_cesa_dma_step: 1 0xc3aa8e40 0x35c1320 0x35c1380 Mai 10 16:39:44.769378 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:44.769433 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 10 16:39:44.769489 spare kernel: mv_cesa_tdma_process: 0 0x35c1480 Mai 10 16:39:44.769547 spare kernel: mv_cesa_tdma_process: 1 0x35c1380 Mai 10 16:39:44.769606 spare kernel: mv_cesa_ahash_complete: 1 0xc3aa8e00 Mai 10 16:39:44.769664 spare kernel: mv_cesa_tdma_process: 1 0 0xc3aa8e00 Mai 10 16:39:44.769728 spare kernel: mv_cesa_tdma_process: 0 0 0xc3afe110 Mai 10 16:39:44.769788 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc3aa8e00 Mai 10 16:39:44.794745 spare kernel: mv_cesa_dma_step: 1 0xcfd3a040 0x35c1580 0x35c14a0 Mai 10 16:39:44.794818 spare kernel: mv_cesa_dma_step: 0 0xc5924d40 0x35c1380 0x35c1320 Mai 10 16:39:44.794880 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:44.794939 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 10 16:39:44.794996 spare kernel: mv_cesa_tdma_process: 0 0x35c1320 Mai 10 16:39:44.795055 spare kernel: mv_cesa_tdma_process: 1 0x35c14a0 Mai 10 16:39:44.795114 spare kernel: mv_cesa_tdma_process: 1 0 0xcfd3a010 Mai 10 16:39:44.795172 spare kernel: mv_cesa_tdma_process: 0 0 0xc5924d10 Mai 10 16:39:44.925487 spare kernel: mv_cesa_ahash_queue_req: 1 0xc3aa9400 Mai 10 16:39:44.925566 spare kernel: mv_cesa_dma_step: 0 0xcfd3a040 0x35c14a0 0x35c1580 Mai 10 16:39:44.925629 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 10 16:39:44.925686 spare kernel: mv_cesa_tdma_process: 0 0x35c1580 Mai 10 16:39:44.925744 spare kernel: mv_cesa_tdma_process: 0 0 0xcfd3a010 Mai 10 16:39:44.925801 spare kernel: mv_cesa_ahash_queue_req: 0 0xc3aa8800 Mai 10 16:39:44.925857 spare kernel: mv_cesa_dma_step: 1 0xc3aa9440 0x35c1480 0x35c1460 Mai 10 16:39:44.925917 spare kernel: mv_cesa_dma_step: 0 0xc3aa8840 0x35c1580 0x35c13c0 Mai 10 16:39:44.925976 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 10 16:39:44.926033 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 10 16:39:44.926089 spare kernel: mv_cesa_tdma_process: 1 0x35c1460 Mai 10 16:39:44.926159 spare kernel: mv_cesa_tdma_process: 0 0x35c13c0 Mai 10 16:39:44.926243 spare kernel: mv_cesa_ahash_complete: 1 0xc3aa9400 Mai 10 16:39:44.926303 spare kernel: mv_cesa_ahash_complete: 0 0xc3aa8800 Mai 10 16:39:44.926359 spare kernel: mv_cesa_tdma_process: 1 0 0xc3aa9400 Mai 10 16:39:44.926417 spare kernel: mv_cesa_tdma_process: 0 0 0xc3aa8800 Mai 10 16:39:44.926473 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc3aa9400 Mai 10 16:39:44.926530 spare kernel: mv_cesa_dma_step: 1 0xc5a78d40 0x35c1500 0x35c15c0 Mai 10 16:39:44.926589 spare kernel: mv_cesa_dma_step: 0 0xcfd3a040 0x35c1460 0x35c1320 Mai 10 16:39:44.926648 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc3aa8800 Mai 10 16:39:44.926710 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 10 16:39:44.926767 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 10 16:39:44.926826 spare kernel: mv_cesa_tdma_process: 0 0x35c1320 Mai 10 16:39:44.926883 spare kernel: mv_cesa_tdma_process: 1 0x35c15c0 Mai 10 16:39:44.926942 spare kernel: mv_cesa_tdma_process: 0 0 0xcfd3a010 Mai 10 16:39:44.926999 spare kernel: mv_cesa_tdma_process: 1 0 0xc5a78d10 Mai 10 16:39:44.927055 spare kernel: mv_cesa_dma_step: 0 0xc3afe140 0x35c1320 0x35c1460 Mai 10 16:39:44.927115 spare kernel: mv_cesa_dma_step: 1 0xc5924d40 0x35c15c0 0x35c12e0 Mai 10 16:39:44.927175 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:44.927231 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 10 16:39:44.927286 spare kernel: mv_cesa_tdma_process: 0 0x35c1460 Mai 10 16:39:44.927351 spare kernel: mv_cesa_tdma_process: 1 0x35c12e0 Mai 10 16:39:44.927410 spare kernel: mv_cesa_tdma_process: 0 0 0xc3afe110 Mai 10 16:39:44.927468 spare kernel: mv_cesa_tdma_process: 1 0 0xc5924d10 Mai 10 16:39:44.927527 spare kernel: mv_cesa_dma_step: 0 0xc3afe140 0x35c1460 0x35c1480 Mai 10 16:39:44.992135 spare kernel: mv_cesa_dma_step: 1 0xcfd3a040 0x35c12e0 0x35c14a0 Mai 10 16:39:44.992207 spare kernel: mv_cesa_ahash_queue_req: 1 0xc3aa8800 Mai 10 16:39:44.992269 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 10 16:39:44.992325 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:44.992381 spare kernel: mv_cesa_tdma_process: 1 0x35c14a0 Mai 10 16:39:44.992439 spare kernel: mv_cesa_tdma_process: 0 0x35c1480 Mai 10 16:39:44.992504 spare kernel: mv_cesa_tdma_process: 1 0 0xcfd3a010 Mai 10 16:39:44.992572 spare kernel: mv_cesa_tdma_process: 0 0 0xc3afe110 Mai 10 16:39:44.992628 spare kernel: mv_cesa_dma_step: 1 0xc3aa8840 0x35c1320 0x35c13e0 Mai 10 16:39:44.992689 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 10 16:39:44.992745 spare kernel: mv_cesa_ahash_queue_req: 0 0xc3aa8e00 Mai 10 16:39:44.992803 spare kernel: mv_cesa_tdma_process: 1 0x35c13e0 Mai 10 16:39:44.992862 spare kernel: mv_cesa_ahash_complete: 1 0xc3aa8800 Mai 10 16:39:44.992920 spare kernel: mv_cesa_dma_step: 0 0xc3aa8e40 0x35c1480 0x35c13a0 Mai 10 16:39:44.992979 spare kernel: mv_cesa_tdma_process: 1 0 0xc3aa8800 Mai 10 16:39:44.993037 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc3aa8800 Mai 10 16:39:44.993100 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 10 16:39:45.029076 spare kernel: mv_cesa_dma_step: 1 0xcfd3a040 0x35c14a0 0x35c14c0 Mai 10 16:39:45.029156 spare kernel: mv_cesa_tdma_process: 0 0x35c13a0 Mai 10 16:39:45.029215 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 10 16:39:45.029276 spare kernel: mv_cesa_ahash_complete: 0 0xc3aa8e00 Mai 10 16:39:45.029336 spare kernel: mv_cesa_tdma_process: 0 0 0xc3aa8e00 Mai 10 16:39:45.029398 spare kernel: mv_cesa_dma_step: 0 0xc5924d40 0x35c13e0 0x35c1460 Mai 10 16:39:45.029460 spare kernel: mv_cesa_tdma_process: 1 0x35c14c0 Mai 10 16:39:45.029521 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc3aa8e00 Mai 10 16:39:45.029580 spare kernel: mv_cesa_tdma_process: 1 0 0xcfd3a010 Mai 10 16:39:45.029640 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:45.056071 spare kernel: mv_cesa_dma_step: 1 0xcfd3a040 0x35c14c0 0x35c1340 Mai 10 16:39:45.056149 spare kernel: mv_cesa_tdma_process: 0 0x35c1460 Mai 10 16:39:45.056212 spare kernel: mv_cesa_tdma_process: 0 0 0xc5924d10 Mai 10 16:39:45.056269 spare kernel: mv_cesa_dma_step: 0 0xc5a78d40 0x35c1460 0x35c1540 Mai 10 16:39:45.056329 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 10 16:39:45.056388 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:45.056444 spare kernel: mv_cesa_tdma_process: 1 0x35c1340 Mai 10 16:39:45.056504 spare kernel: mv_cesa_tdma_process: 1 0 0xcfd3a010 Mai 10 16:39:45.056570 spare kernel: mv_cesa_tdma_process: 0 0x35c1540 Mai 10 16:39:45.112143 spare kernel: mv_cesa_dma_step: 1 0xc5924d40 0x35c1340 0x35c1420 Mai 10 16:39:45.112225 spare kernel: mv_cesa_tdma_process: 0 0 0xc5a78d10 Mai 10 16:39:45.112287 spare kernel: mv_cesa_dma_step: 0 0xc3afe140 0x35c1540 0x35c13e0 Mai 10 16:39:45.112347 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 10 16:39:45.112404 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:45.112459 spare kernel: mv_cesa_tdma_process: 1 0x35c1420 Mai 10 16:39:45.112525 spare kernel: mv_cesa_tdma_process: 1 0 0xc5924d10 Mai 10 16:39:45.112586 spare kernel: mv_cesa_tdma_process: 0 0x35c13e0 Mai 10 16:39:45.112644 spare kernel: mv_cesa_dma_step: 1 0xc5a78d40 0x35c13c0 0x35c1080 Mai 10 16:39:45.112704 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 10 16:39:45.112760 spare kernel: mv_cesa_tdma_process: 0 0 0xc3afe110 Mai 10 16:39:45.112816 spare kernel: mv_cesa_tdma_process: 1 0x35c1080 Mai 10 16:39:45.112882 spare kernel: mv_cesa_dma_step: 0 0xc3afe140 0x35c13e0 0x35c1540 Mai 10 16:39:45.112942 spare kernel: mv_cesa_tdma_process: 1 0 0xc5a78d10 Mai 10 16:39:45.112999 spare kernel: mv_cesa_ahash_queue_req: 1 0xc3aa9400 Mai 10 16:39:45.113056 spare kernel: mv_cesa_dma_step: 1 0xc5a78d40 0x35c1500 0x35c12a0 Mai 10 16:39:45.276005 spare kernel: mv_cesa_ahash_queue_req: 1 0xc3aa8800 Mai 10 16:39:45.276083 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:45.276142 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 10 16:39:45.276199 spare kernel: mv_cesa_tdma_process: 0 0x35c1540 Mai 10 16:39:45.276258 spare kernel: mv_cesa_tdma_process: 1 0x35c12a0 Mai 10 16:39:45.276314 spare kernel: mv_cesa_tdma_process: 0 0 0xc3afe110 Mai 10 16:39:45.276371 spare kernel: mv_cesa_tdma_process: 1 0 0xc5a78d10 Mai 10 16:39:45.276439 spare kernel: alg: ahash: mv-sha1 test failed (wrong result) on test vector 3, cfg="import/export" Mai 10 16:39:45.276502 spare kernel: mv_cesa_dma_step: 1 0xc3aa9440 0x35c1080 0x35c1320 Mai 10 16:39:45.276571 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 10 16:39:45.276630 spare kernel: alg: self-tests for sha1 using mv-sha1 failed (rc=-22) Mai 10 16:39:45.276693 spare kernel: mv_cesa_tdma_process: 1 0x35c1320 Mai 10 16:39:45.276752 spare kernel: mv_cesa_ahash_complete: 1 0xc3aa9400 Mai 10 16:39:45.276807 spare kernel: ------------[ cut here ]------------ Mai 10 16:39:45.276868 spare kernel: mv_cesa_tdma_process: 1 0 0xc3aa9400 Mai 10 16:39:45.276924 spare kernel: WARNING: CPU: 0 PID: 388 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614 Mai 10 16:39:45.276991 spare kernel: mv_cesa_dma_step: 1 0xc3aa8840 0x35c1380 0x35c1360 Mai 10 16:39:45.277051 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc3aa9400 Mai 10 16:39:45.277108 spare kernel: alg: self-tests for sha1 using mv-sha1 failed (rc=-22) Mai 10 16:39:45.277167 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 10 16:39:45.277223 spare kernel: Modules linked in: Mai 10 16:39:45.277282 spare kernel: mv_cesa_tdma_process: 1 0x35c1360 Mai 10 16:39:45.277342 spare kernel: marvell_cesa Mai 10 16:39:45.277403 spare kernel: mv_cesa_ahash_complete: 1 0xc3aa8800 Mai 10 16:39:45.277459 spare kernel: libdes Mai 10 16:39:45.277519 spare kernel: mv_cesa_tdma_process: 1 0 0xc3aa8800 Mai 10 16:39:45.277581 spare kernel: libaes Mai 10 16:39:45.277640 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc3aa8800 Mai 10 16:39:45.277696 spare kernel: mv_cesa_ahash_queue_req: 0 0xc3aa9400 Mai 10 16:39:45.277755 spare kernel: Mai 10 16:39:45.277814 spare kernel: CPU: 0 UID: 0 PID: 388 Comm: cryptomgr_test Not tainted 6.15.0-rc5+ #6 NONE Mai 10 16:39:45.277875 spare kernel: Hardware name: Marvell Armada 380/385 (Device Tree) Mai 10 16:39:45.277934 spare kernel: Call trace: Mai 10 16:39:45.277993 spare kernel: unwind_backtrace from show_stack+0x10/0x14 Mai 10 16:39:45.278053 spare kernel: show_stack from dump_stack_lvl+0x50/0x64 Mai 10 16:39:45.278120 spare kernel: dump_stack_lvl from __warn+0x7c/0xd4 Mai 10 16:39:45.278181 spare kernel: __warn from warn_slowpath_fmt+0x110/0x16c Mai 10 16:39:45.278241 spare kernel: warn_slowpath_fmt from alg_test+0x5f0/0x614 Mai 10 16:39:45.278301 spare kernel: alg_test from cryptomgr_test+0x18/0x38 Mai 10 16:39:45.278360 spare kernel: cryptomgr_test from kthread+0xe8/0x204 Mai 10 16:39:45.278420 spare kernel: kthread from ret_from_fork+0x14/0x28 Mai 10 16:39:45.278479 spare kernel: Exception stack(0xf0a5dfb0 to 0xf0a5dff8) Mai 10 16:39:45.278539 spare kernel: dfa0: 00000000 00000000 00000000 00000000 Mai 10 16:39:45.278599 spare kernel: dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Mai 10 16:39:45.278664 spare kernel: dfe0: 00000000 00000000 00000000 00000000 00000013 00000000 Mai 10 16:39:45.278725 spare kernel: ---[ end trace 0000000000000000 ]--- Mai 10 16:39:45.278785 spare kernel: mv_cesa_dma_step: 0 0xc3aa9440 0x35c1360 0x35c1480 Mai 10 16:39:45.278844 spare kernel: mv_cesa_dma_step: 1 0xc3afe140 0x35c12a0 0x35c1500 Mai 10 16:39:45.278903 spare kernel: mv_cesa_ahash_queue_req: 0 0xc3aa8800 Mai 10 16:39:45.278960 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 10 16:39:45.279018 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 10 16:39:45.279074 spare kernel: mv_cesa_tdma_process: 0 0x35c1480 Mai 10 16:39:45.279130 spare kernel: mv_cesa_tdma_process: 1 0x35c1500 Mai 10 16:39:45.279187 spare kernel: mv_cesa_tdma_process: 1 0 0xc3afe110 Mai 10 16:39:45.360007 spare kernel: alg: ahash: mv-hmac-sha1 setkey failed on test vector 0; expected_error=0, actual_error=-80, flags=0x1 Mai 10 16:39:45.360092 spare kernel: mv_cesa_ahash_complete: 0 0xc3aa9400 Mai 10 16:39:45.360158 spare kernel: alg: self-tests for hmac(sha1) using mv-hmac-sha1 failed (rc=-80) Mai 10 16:39:45.360223 spare kernel: mv_cesa_tdma_process: 0 0 0xc3aa9400 Mai 10 16:39:45.360284 spare kernel: ------------[ cut here ]------------ Mai 10 16:39:45.360344 spare kernel: mv_cesa_dma_step: 0 0xc5924d40 0x35c1340 0x35c1080 Mai 10 16:39:45.360407 spare kernel: WARNING: CPU: 1 PID: 393 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614 Mai 10 16:39:45.360468 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc3aa9400 Mai 10 16:39:45.360540 spare kernel: alg: self-tests for hmac(sha1) using mv-hmac-sha1 failed (rc=-80) Mai 10 16:39:45.360613 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:45.360674 spare kernel: Modules linked in: marvell_cesa Mai 10 16:39:45.360736 spare kernel: mv_cesa_tdma_process: 0 0x35c1080 Mai 10 16:39:45.360798 spare kernel: libdes Mai 10 16:39:45.360857 spare kernel: mv_cesa_tdma_process: 0 0 0xc5924d10 Mai 10 16:39:45.360916 spare kernel: libaes Mai 10 16:39:45.360974 spare kernel: mv_cesa_dma_step: 0 0xcfd3a040 0x35c1540 0x35c13e0 Mai 10 16:39:45.361036 spare kernel: CPU: 1 UID: 0 PID: 393 Comm: cryptomgr_test Tainted: G W 6.15.0-rc5+ #6 NONE Mai 10 16:39:45.361098 spare kernel: Tainted: [W]=WARN Mai 10 16:39:45.361158 spare kernel: Hardware name: Marvell Armada 380/385 (Device Tree) Mai 10 16:39:45.361222 spare kernel: Call trace: Mai 10 16:39:45.361286 spare kernel: unwind_backtrace from show_stack+0x10/0x14 Mai 10 16:39:45.361346 spare kernel: show_stack from dump_stack_lvl+0x50/0x64 Mai 10 16:39:45.361404 spare kernel: dump_stack_lvl from __warn+0x7c/0xd4 Mai 10 16:39:45.361463 spare kernel: __warn from warn_slowpath_fmt+0x110/0x16c Mai 10 16:39:45.361527 spare kernel: warn_slowpath_fmt from alg_test+0x5f0/0x614 Mai 10 16:39:45.361587 spare kernel: alg_test from cryptomgr_test+0x18/0x38 Mai 10 16:39:45.361648 spare kernel: cryptomgr_test from kthread+0xe8/0x204 Mai 10 16:39:45.361709 spare kernel: kthread from ret_from_fork+0x14/0x28 Mai 10 16:39:45.361768 spare kernel: Exception stack(0xf0a9dfb0 to 0xf0a9dff8) Mai 10 16:39:45.361836 spare kernel: dfa0: 00000000 00000000 00000000 00000000 Mai 10 16:39:45.361896 spare kernel: dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Mai 10 16:39:45.361956 spare kernel: dfe0: 00000000 00000000 00000000 00000000 00000013 00000000 Mai 10 16:39:45.362018 spare kernel: ---[ end trace 0000000000000000 ]--- Mai 10 16:39:45.362077 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 10 16:39:45.600209 spare kernel: alg: ahash: mv-sha256 test failed (wrong result) on test vector 3, cfg="import/export" Mai 10 16:39:45.600310 spare kernel: mv_cesa_tdma_process: 0 0x35c13e0 Mai 10 16:39:45.600376 spare kernel: alg: self-tests for sha256 using mv-sha256 failed (rc=-22) Mai 10 16:39:45.600442 spare kernel: mv_cesa_tdma_process: 0 0 0xcfd3a010 Mai 10 16:39:45.600501 spare kernel: ------------[ cut here ]------------ Mai 10 16:39:45.600585 spare kernel: mv_cesa_dma_step: 0 0xc3aa8840 0x35c15a0 0x35c1440 Mai 10 16:39:45.600649 spare kernel: WARNING: CPU: 1 PID: 389 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614 Mai 10 16:39:45.600711 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 10 16:39:45.600769 spare kernel: alg: self-tests for sha256 using mv-sha256 failed (rc=-22) Mai 10 16:39:45.600828 spare kernel: mv_cesa_tdma_process: 0 0x35c1440 Mai 10 16:39:45.600888 spare kernel: Modules linked in: marvell_cesa libdes libaes Mai 10 16:39:45.600950 spare kernel: mv_cesa_ahash_complete: 0 0xc3aa8800 Mai 10 16:39:45.601006 spare kernel: Mai 10 16:39:45.601065 spare kernel: CPU: 1 UID: 0 PID: 389 Comm: cryptomgr_test Tainted: G W 6.15.0-rc5+ #6 NONE Mai 10 16:39:45.601127 spare kernel: Tainted: [W]=WARN Mai 10 16:39:45.601193 spare kernel: Hardware name: Marvell Armada 380/385 (Device Tree) Mai 10 16:39:45.601252 spare kernel: Call trace: Mai 10 16:39:45.601311 spare kernel: unwind_backtrace from show_stack+0x10/0x14 Mai 10 16:39:45.601369 spare kernel: show_stack from dump_stack_lvl+0x50/0x64 Mai 10 16:39:45.601425 spare kernel: dump_stack_lvl from __warn+0x7c/0xd4 Mai 10 16:39:45.601483 spare kernel: __warn from warn_slowpath_fmt+0x110/0x16c Mai 10 16:39:45.601539 spare kernel: warn_slowpath_fmt from alg_test+0x5f0/0x614 Mai 10 16:39:45.601596 spare kernel: alg_test from cryptomgr_test+0x18/0x38 Mai 10 16:39:45.601654 spare kernel: cryptomgr_test from kthread+0xe8/0x204 Mai 10 16:39:45.601712 spare kernel: kthread from ret_from_fork+0x14/0x28 Mai 10 16:39:45.601769 spare kernel: Exception stack(0xf0a61fb0 to 0xf0a61ff8) Mai 10 16:39:45.601829 spare kernel: 1fa0: 00000000 00000000 00000000 00000000 Mai 10 16:39:45.601896 spare kernel: 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Mai 10 16:39:45.601957 spare kernel: 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 Mai 10 16:39:45.602018 spare kernel: ---[ end trace 0000000000000000 ]--- Mai 10 16:39:45.602075 spare kernel: mv_cesa_tdma_process: 0 0 0xc3aa8800 Mai 10 16:39:45.602131 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc3aa8800 Mai 10 16:39:45.602188 spare kernel: mv_cesa_dma_step: 0 0xc5924d40 0x35c13e0 0x35c1080 Mai 10 16:39:45.602247 spare kernel: alg: ahash: mv-hmac-sha256 setkey failed on test vector 0; expected_error=0, actual_error=-80, flags=0x1 Mai 10 16:39:45.602308 spare kernel: mv_cesa_dma_step: 1 0xc5a78d40 0x35c1440 0x35c15a0 Mai 10 16:39:45.602367 spare kernel: alg: self-tests for hmac(sha256) using mv-hmac-sha256 failed (rc=-80) Mai 10 16:39:45.602433 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 10 16:39:45.602491 spare kernel: ------------[ cut here ]------------ Mai 10 16:39:45.602548 spare kernel: mv_cesa_tdma_process: 1 0x35c15a0 Mai 10 16:39:45.602610 spare kernel: WARNING: CPU: 0 PID: 396 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614 Mai 10 16:39:45.602670 spare kernel: mv_cesa_tdma_process: 1 0 0xc5a78d10 Mai 10 16:39:45.602727 spare kernel: mv_cesa_ahash_queue_req: 1 0xc3aa8800 Mai 10 16:39:45.602784 spare kernel: alg: self-tests for hmac(sha256) using mv-hmac-sha256 failed (rc=-80) Mai 10 16:39:45.602844 spare kernel: mv_cesa_dma_step: 1 0xc3aa8840 0x35c15a0 0x35c1560 Mai 10 16:39:45.602904 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 10 16:39:45.602960 spare kernel: Modules linked in: Mai 10 16:39:45.603018 spare kernel: mv_cesa_tdma_process: 1 0x35c1560 Mai 10 16:39:45.603083 spare kernel: marvell_cesa Mai 10 16:39:45.603143 spare kernel: mv_cesa_ahash_complete: 1 0xc3aa8800 Mai 10 16:39:45.603199 spare kernel: libdes Mai 10 16:39:45.603256 spare kernel: mv_cesa_tdma_process: 1 0 0xc3aa8800 Mai 10 16:39:45.603313 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc3aa8800 Mai 10 16:39:45.603370 spare kernel: libaes Mai 10 16:39:45.603425 spare kernel: mv_cesa_dma_step: 1 0xc5a78d40 0x35c1560 0x35c1440 Mai 10 16:39:45.603487 spare kernel: Mai 10 16:39:45.603544 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 10 16:39:45.603600 spare kernel: CPU: 0 UID: 0 PID: 396 Comm: cryptomgr_test Tainted: G W 6.15.0-rc5+ #6 NONE Mai 10 16:39:45.603668 spare kernel: Tainted: [W]=WARN Mai 10 16:39:45.603726 spare kernel: Hardware name: Marvell Armada 380/385 (Device Tree) Mai 10 16:39:45.603784 spare kernel: Call trace: Mai 10 16:39:45.603842 spare kernel: unwind_backtrace from show_stack+0x10/0x14 Mai 10 16:39:45.603899 spare kernel: show_stack from dump_stack_lvl+0x50/0x64 Mai 10 16:39:45.603956 spare kernel: dump_stack_lvl from __warn+0x7c/0xd4 Mai 10 16:39:45.604012 spare kernel: __warn from warn_slowpath_fmt+0x110/0x16c Mai 10 16:39:45.604068 spare kernel: warn_slowpath_fmt from alg_test+0x5f0/0x614 Mai 10 16:39:45.604125 spare kernel: alg_test from cryptomgr_test+0x18/0x38 Mai 10 16:39:45.604181 spare kernel: cryptomgr_test from kthread+0xe8/0x204 Mai 10 16:39:45.604237 spare kernel: kthread from ret_from_fork+0x14/0x28 Mai 10 16:39:45.604294 spare kernel: Exception stack(0xf0ab1fb0 to 0xf0ab1ff8) Mai 10 16:39:45.604358 spare kernel: 1fa0: 00000000 00000000 00000000 00000000 Mai 10 16:39:45.604420 spare kernel: 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Mai 10 16:39:45.604526 spare kernel: 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 Mai 10 16:39:45.604590 spare kernel: ---[ end trace 0000000000000000 ]--- Mai 10 16:39:45.604647 spare kernel: mv_cesa_tdma_process: 1 0x35c1440 Mai 10 16:39:45.604712 spare kernel: mv_cesa_tdma_process: 1 0 0xc5a78d10 Mai 10 16:39:45.604772 spare kernel: alg: ahash: mv-md5 test failed (wrong result) on test vector 4, cfg="import/export" Mai 10 16:39:45.604832 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:45.604890 spare kernel: alg: self-tests for md5 using mv-md5 failed (rc=-22) Mai 10 16:39:45.604952 spare kernel: mv_cesa_tdma_process: 0 0x35c1080 Mai 10 16:39:45.605012 spare kernel: mv_cesa_tdma_process: 0 0 0xc5924d10 Mai 10 16:39:45.605068 spare kernel: mv_cesa_dma_step: 0 0xcfd3a040 0x35c1080 0x35c15c0 Mai 10 16:39:45.605129 spare kernel: ------------[ cut here ]------------ Mai 10 16:39:45.605186 spare kernel: WARNING: CPU: 1 PID: 387 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614 Mai 10 16:39:45.605246 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 10 16:39:45.605311 spare kernel: alg: self-tests for md5 using mv-md5 failed (rc=-22) Mai 10 16:39:45.605373 spare kernel: mv_cesa_tdma_process: 0 0x35c15c0 Mai 10 16:39:45.605433 spare kernel: Modules linked in: marvell_cesa Mai 10 16:39:45.605492 spare kernel: mv_cesa_tdma_process: 0 0 0xcfd3a010 Mai 10 16:39:45.605552 spare kernel: libdes libaes Mai 10 16:39:45.605613 spare kernel: mv_cesa_dma_step: 0 0xcfd3a040 0x35c15c0 0x35c1080 Mai 10 16:39:45.605674 spare kernel: Mai 10 16:39:45.605730 spare kernel: CPU: 1 UID: 0 PID: 387 Comm: cryptomgr_test Tainted: G W 6.15.0-rc5+ #6 NONE Mai 10 16:39:45.605790 spare kernel: Tainted: [W]=WARN Mai 10 16:39:45.605847 spare kernel: Hardware name: Marvell Armada 380/385 (Device Tree) Mai 10 16:39:45.605910 spare kernel: Call trace: Mai 10 16:39:45.605970 spare kernel: unwind_backtrace from show_stack+0x10/0x14 Mai 10 16:39:45.606028 spare kernel: show_stack from dump_stack_lvl+0x50/0x64 Mai 10 16:39:45.606086 spare kernel: dump_stack_lvl from __warn+0x7c/0xd4 Mai 10 16:39:45.606143 spare kernel: __warn from warn_slowpath_fmt+0x110/0x16c Mai 10 16:39:45.606200 spare kernel: warn_slowpath_fmt from alg_test+0x5f0/0x614 Mai 10 16:39:45.606257 spare kernel: alg_test from cryptomgr_test+0x18/0x38 Mai 10 16:39:45.606314 spare kernel: cryptomgr_test from kthread+0xe8/0x204 Mai 10 16:39:45.606371 spare kernel: kthread from ret_from_fork+0x14/0x28 Mai 10 16:39:45.606428 spare kernel: Exception stack(0xf0af1fb0 to 0xf0af1ff8) Mai 10 16:39:45.606489 spare kernel: 1fa0: 00000000 00000000 00000000 00000000 Mai 10 16:39:45.606554 spare kernel: 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Mai 10 16:39:45.606613 spare kernel: 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 Mai 10 16:39:45.606671 spare kernel: ---[ end trace 0000000000000000 ]--- Mai 10 16:39:45.606728 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 10 16:39:45.606785 spare kernel: mv_cesa_dma_step: 1 0xc3afe140 0x35c13e0 0x35c1100 Mai 10 16:39:45.606845 spare kernel: mv_cesa_tdma_process: 0 0x35c1080 Mai 10 16:39:45.606901 spare kernel: mv_cesa_tdma_process: 0 0 0xcfd3a010 Mai 10 16:39:45.659732 spare kernel: mv_cesa_dma_step: 0 0xcfd3a040 0x35c1080 0x35c15c0 Mai 10 16:39:45.659808 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 10 16:39:45.659870 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 10 16:39:45.659938 spare kernel: mv_cesa_tdma_process: 1 0x35c1100 Mai 10 16:39:45.659997 spare kernel: mv_cesa_tdma_process: 1 0 0xc3afe110 Mai 10 16:39:45.660056 spare kernel: mv_cesa_dma_step: 1 0xc5a78d40 0x35c1100 0x35c13e0 Mai 10 16:39:45.660116 spare kernel: mv_cesa_tdma_process: 0 0x35c15c0 Mai 10 16:39:45.660175 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 10 16:39:45.660230 spare kernel: mv_cesa_tdma_process: 0 0 0xcfd3a010 Mai 10 16:39:45.660287 spare kernel: mv_cesa_dma_step: 0 0xc5924d40 0x35c15c0 0x35c1460 Mai 10 16:39:45.660348 spare kernel: mv_cesa_tdma_process: 1 0x35c13e0 Mai 10 16:39:45.660407 spare kernel: mv_cesa_tdma_process: 1 0 0xc5a78d10 Mai 10 16:39:45.660463 spare kernel: alg: ahash: mv-hmac-md5 setkey failed on test vector 0; expected_error=0, actual_error=-80, flags=0x1 Mai 10 16:39:45.660542 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:45.660601 spare kernel: alg: self-tests for hmac(md5) using mv-hmac-md5 failed (rc=-80) Mai 10 16:39:45.660662 spare kernel: mv_cesa_tdma_process: 0 0x35c1460 Mai 10 16:39:45.660720 spare kernel: ------------[ cut here ]------------ Mai 10 16:39:45.660780 spare kernel: WARNING: CPU: 1 PID: 391 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614 Mai 10 16:39:45.660841 spare kernel: mv_cesa_tdma_process: 0 0 0xc5924d10 Mai 10 16:39:45.688907 spare kernel: mv_cesa_dma_step: 0 0xc5924d40 0x35c1460 0x35c13a0 Mai 10 16:39:45.688980 spare kernel: alg: self-tests for hmac(md5) using mv-hmac-md5 failed (rc=-80) Mai 10 16:39:45.689043 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:45.689101 spare kernel: Modules linked in: marvell_cesa libdes libaes Mai 10 16:39:45.689160 spare kernel: CPU: 1 UID: 0 PID: 391 Comm: cryptomgr_test Tainted: G W 6.15.0-rc5+ #6 NONE Mai 10 16:39:45.689230 spare kernel: Tainted: [W]=WARN Mai 10 16:39:45.689288 spare kernel: Hardware name: Marvell Armada 380/385 (Device Tree) Mai 10 16:39:45.689348 spare kernel: Call trace: Mai 10 16:39:45.689408 spare kernel: unwind_backtrace from show_stack+0x10/0x14 Mai 10 16:39:45.689467 spare kernel: show_stack from dump_stack_lvl+0x50/0x64 Mai 10 16:39:45.689526 spare kernel: dump_stack_lvl from __warn+0x7c/0xd4 Mai 10 16:39:45.689585 spare kernel: __warn from warn_slowpath_fmt+0x110/0x16c Mai 10 16:39:45.689645 spare kernel: warn_slowpath_fmt from alg_test+0x5f0/0x614 Mai 10 16:39:45.689705 spare kernel: alg_test from cryptomgr_test+0x18/0x38 Mai 10 16:39:45.689764 spare kernel: cryptomgr_test from kthread+0xe8/0x204 Mai 10 16:39:45.689830 spare kernel: kthread from ret_from_fork+0x14/0x28 Mai 10 16:39:45.689890 spare kernel: Exception stack(0xf0a6dfb0 to 0xf0a6dff8) Mai 10 16:39:45.689950 spare kernel: dfa0: 00000000 00000000 00000000 00000000 Mai 10 16:39:45.690007 spare kernel: dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Mai 10 16:39:45.690066 spare kernel: dfe0: 00000000 00000000 00000000 00000000 00000013 00000000 Mai 10 16:39:45.690124 spare kernel: ---[ end trace 0000000000000000 ]--- Mai 10 16:39:45.690183 spare kernel: mv_cesa_tdma_process: 0 0x35c13a0 Mai 10 16:39:45.690240 spare kernel: mv_cesa_dma_step: 1 0xc5a78d40 0x35c14a0 0x35c15a0 Mai 10 16:39:45.690301 spare kernel: mv_cesa_tdma_process: 0 0 0xc5924d10 Mai 10 16:39:45.714425 spare kernel: mv_cesa_dma_step: 0 0xc5924d40 0x35c13a0 0x35c14c0 Mai 10 16:39:45.714504 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 10 16:39:45.714565 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:45.714622 spare kernel: mv_cesa_tdma_process: 1 0x35c15a0 Mai 10 16:39:45.714680 spare kernel: mv_cesa_tdma_process: 1 0 0xc5a78d10 Mai 10 16:39:45.714737 spare kernel: mv_cesa_tdma_process: 0 0x35c14c0 Mai 10 16:39:45.714795 spare kernel: mv_cesa_dma_step: 1 0xcfd3a040 0x35c15a0 0x35c14a0 Mai 10 16:39:45.714854 spare kernel: mv_cesa_tdma_process: 0 0 0xc5924d10 Mai 10 16:39:45.751989 spare kernel: mv_cesa_dma_step: 0 0xc5924d40 0x35c14c0 0x35c13a0 Mai 10 16:39:45.752059 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 10 16:39:45.752118 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:45.752175 spare kernel: mv_cesa_tdma_process: 1 0x35c14a0 Mai 10 16:39:45.752233 spare kernel: mv_cesa_tdma_process: 1 0 0xcfd3a010 Mai 10 16:39:45.752300 spare kernel: mv_cesa_tdma_process: 0 0x35c13a0 Mai 10 16:39:45.752358 spare kernel: mv_cesa_dma_step: 1 0xc3afe140 0x35c14a0 0x35c1460 Mai 10 16:39:45.752418 spare kernel: mv_cesa_tdma_process: 0 0 0xc5924d10 Mai 10 16:39:45.752475 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 10 16:39:45.781071 spare kernel: mv_cesa_dma_step: 0 0xc5924d40 0x35c13a0 0x35c14c0 Mai 10 16:39:45.781141 spare kernel: mv_cesa_tdma_process: 1 0x35c1460 Mai 10 16:39:45.781201 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:45.781258 spare kernel: mv_cesa_tdma_process: 1 0 0xc3afe110 Mai 10 16:39:45.781316 spare kernel: mv_cesa_tdma_process: 0 0x35c14c0 Mai 10 16:39:45.781374 spare kernel: mv_cesa_dma_step: 1 0xc5a78d40 0x35c1460 0x35c14a0 Mai 10 16:39:45.781435 spare kernel: mv_cesa_tdma_process: 0 0 0xc5924d10 Mai 10 16:39:45.817331 spare kernel: mv_cesa_dma_step: 0 0xc5924d40 0x35c14c0 0x35c13a0 Mai 10 16:39:45.817401 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 10 16:39:45.817460 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:45.817517 spare kernel: mv_cesa_tdma_process: 1 0x35c14a0 Mai 10 16:39:45.817573 spare kernel: mv_cesa_tdma_process: 1 0 0xc5a78d10 Mai 10 16:39:45.817630 spare kernel: mv_cesa_tdma_process: 0 0x35c13a0 Mai 10 16:39:45.817689 spare kernel: mv_cesa_dma_step: 1 0xcfd3a040 0x35c14a0 0x35c1460 Mai 10 16:39:45.817750 spare kernel: mv_cesa_tdma_process: 0 0 0xc5924d10 Mai 10 16:39:45.817806 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 10 16:39:45.932532 spare kernel: mv_cesa_dma_step: 0 0xc5924d40 0x35c13a0 0x35c14c0 Mai 10 16:39:45.932612 spare kernel: mv_cesa_tdma_process: 1 0x35c1460 Mai 10 16:39:45.932685 spare kernel: mv_cesa_tdma_process: 1 0 0xcfd3a010 Mai 10 16:39:45.932746 spare kernel: mv_cesa_dma_step: 1 0xc3afe140 0x35c1460 0x35c15c0 Mai 10 16:39:45.932808 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:45.932868 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 10 16:39:45.932927 spare kernel: mv_cesa_tdma_process: 0 0x35c14c0 Mai 10 16:39:45.932984 spare kernel: mv_cesa_tdma_process: 1 0x35c15c0 Mai 10 16:39:45.933045 spare kernel: mv_cesa_tdma_process: 0 0 0xc5924d10 Mai 10 16:39:45.933108 spare kernel: mv_cesa_tdma_process: 1 0 0xc3afe110 Mai 10 16:39:45.933170 spare kernel: mv_cesa_dma_step: 1 0xcfd3a040 0x35c15c0 0x35c1460 Mai 10 16:39:45.933233 spare kernel: mv_cesa_dma_step: 0 0xc5a78d40 0x35c14a0 0x35c1340 Mai 10 16:39:45.933299 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 10 16:39:45.933361 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:45.933420 spare kernel: mv_cesa_tdma_process: 1 0x35c1460 Mai 10 16:39:45.933478 spare kernel: mv_cesa_tdma_process: 1 0 0xcfd3a010 Mai 10 16:39:45.933535 spare kernel: mv_cesa_tdma_process: 0 0x35c1340 Mai 10 16:39:45.933596 spare kernel: mv_cesa_dma_step: 1 0xc3afe140 0x35c1460 0x35c1080 Mai 10 16:39:45.933656 spare kernel: mv_cesa_tdma_process: 0 0 0xc5a78d10 Mai 10 16:39:45.933716 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 10 16:39:45.933775 spare kernel: mv_cesa_dma_step: 0 0xcfd3a040 0x35c1540 0x35c1420 Mai 10 16:39:45.933836 spare kernel: mv_cesa_tdma_process: 1 0x35c1080 Mai 10 16:39:45.933896 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 10 16:39:45.933958 spare kernel: mv_cesa_tdma_process: 0 0x35c1420 Mai 10 16:39:45.934020 spare kernel: mv_cesa_tdma_process: 0 0 0xcfd3a010 Mai 10 16:39:45.934078 spare kernel: mv_cesa_tdma_process: 1 0 0xc3afe110 Mai 10 16:39:45.934135 spare kernel: mv_cesa_dma_step: 1 0xc3afe140 0x35c1340 0x35c12e0 Mai 10 16:39:45.934201 spare kernel: mv_cesa_dma_step: 0 0xc5a78d40 0x35c1080 0x35c1460 Mai 10 16:39:45.934270 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 10 16:39:45.934329 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 10 16:39:45.934387 spare kernel: mv_cesa_tdma_process: 0 0x35c1460 Mai 10 16:39:45.934444 spare kernel: mv_cesa_tdma_process: 0 0 0xc5a78d10 Mai 10 16:39:45.934504 spare kernel: mv_cesa_tdma_process: 1 0x35c12e0 Mai 10 16:39:45.971780 spare kernel: mv_cesa_dma_step: 0 0xc5924d40 0x35c1460 0x35c14c0 Mai 10 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On Sat, May 10, 2025 at 05:07:22PM +0200, Klaus Kudielka wrote:
>
> Here a result with the printk patch and the other two small fixes on top.
Thanks. So it's clearly not the chaining that's causing the
corruption. The requests seem to bouncing between the two engines,
but it's not clear whether that's relevant.
Please replace the previous printk patch with this that adds some
info on the request being processed so I can see which request is
which.
Cheers,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
--
diff --git a/drivers/crypto/marvell/cesa/cesa.c b/drivers/crypto/marvell/cesa/cesa.c
index 9c21f5d835d2..fd7f43575cb2 100644
--- a/drivers/crypto/marvell/cesa/cesa.c
+++ b/drivers/crypto/marvell/cesa/cesa.c
@@ -127,6 +127,8 @@ static irqreturn_t mv_cesa_int(int irq, void *priv)
if (!(status & mask))
break;
+ pr_err("mv_cesa_int: %d 0x%x 0x%x\n", engine->id, status, mask);
+
/*
* TODO: avoid clearing the FPGA_INT_STATUS if this not
* relevant on some platforms.
diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c
index 2200bc6a034f..be8471a8ab22 100644
--- a/drivers/crypto/marvell/cesa/hash.c
+++ b/drivers/crypto/marvell/cesa/hash.c
@@ -396,6 +396,8 @@ static void mv_cesa_ahash_complete(struct crypto_async_request *req)
}
atomic_sub(ahashreq->nbytes, &engine->load);
+
+ pr_err("mv_cesa_ahash_complete: %d 0x%lx\n", engine->id, (unsigned long)ahashreq);
}
static void mv_cesa_ahash_prepare(struct crypto_async_request *req,
@@ -417,6 +419,8 @@ static void mv_cesa_ahash_req_cleanup(struct crypto_async_request *req)
struct ahash_request *ahashreq = ahash_request_cast(req);
struct mv_cesa_ahash_req *creq = ahash_request_ctx(ahashreq);
+ pr_err("mv_cesa_ahash_req_cleanup: %d 0x%lx\n", creq->base.engine->id, (unsigned long)ahashreq);
+
if (creq->last_req)
mv_cesa_ahash_last_cleanup(ahashreq);
@@ -783,6 +787,7 @@ static int mv_cesa_ahash_queue_req(struct ahash_request *req)
engine = mv_cesa_select_engine(req->nbytes);
mv_cesa_ahash_prepare(&req->base, engine);
+ pr_err("mv_cesa_ahash_queue_req: %d 0x%lx %d %d\n", engine->id, (unsigned long)req, req->nbytes, creq->last_req);
ret = mv_cesa_queue_req(&req->base, &creq->base);
if (mv_cesa_req_needs_cleanup(&req->base, ret))
diff --git a/drivers/crypto/marvell/cesa/tdma.c b/drivers/crypto/marvell/cesa/tdma.c
index 9b5fd957dde2..59be742c5a1c 100644
--- a/drivers/crypto/marvell/cesa/tdma.c
+++ b/drivers/crypto/marvell/cesa/tdma.c
@@ -47,6 +47,8 @@ void mv_cesa_dma_step(struct mv_cesa_req *dreq)
engine->chain_hw.last = dreq->chain.last;
spin_unlock_bh(&engine->lock);
+ pr_err("mv_cesa_dma_step: %d 0x%lx 0x%lx 0x%lx\n", engine->id, (unsigned long)dreq, (unsigned long)dreq->chain.first->cur_dma, (unsigned long)dreq->chain.last->cur_dma);
+
writel_relaxed(0, engine->regs + CESA_SA_CFG);
mv_cesa_set_int_mask(engine, CESA_SA_INT_ACC0_IDMA_DONE);
@@ -137,6 +139,7 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
int res = 0;
tdma_cur = readl(engine->regs + CESA_TDMA_CUR);
+ pr_err("mv_cesa_tdma_process: %d 0x%lx\n", engine->id, (unsigned long)tdma_cur);
for (tdma = engine->chain_hw.first; tdma; tdma = next) {
spin_lock_bh(&engine->lock);
@@ -186,6 +189,8 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
break;
}
+ pr_err("mv_cesa_tdma_process: %d %d 0x%lx\n", engine->id, res, (unsigned long)req);
+
/*
* Save the last request in error to engine->req, so that the core
* knows which request was faulty
On Sun, 2025-05-11 at 11:22 +0800, Herbert Xu wrote: > Thanks. So it's clearly not the chaining that's causing the > corruption. The requests seem to bouncing between the two engines, > but it's not clear whether that's relevant. > > Please replace the previous printk patch with this that adds some > info on the request being processed so I can see which request is > which. > > Cheers, Here the log after modprobe, with the new printk patch: Mai 11 18:29:26.871125 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981000 0xf981080 Mai 11 18:29:26.871263 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:26.871355 spare kernel: mv_cesa_dma_step: 1 0xcf8ec040 0xf9810a0 0xf981120 Mai 11 18:29:26.871418 spare kernel: mv_cesa_tdma_process: 0 0xf981080 Mai 11 18:29:26.871487 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:26.871546 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:26.871613 spare kernel: mv_cesa_tdma_process: 1 0xf981120 Mai 11 18:29:26.908013 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981080 0xf981000 Mai 11 18:29:26.908087 spare kernel: mv_cesa_tdma_process: 1 0 0xcf8ec010 Mai 11 18:29:26.908148 spare kernel: mv_cesa_dma_step: 1 0xcf8ec040 0xf981120 0xf9810a0 Mai 11 18:29:26.908217 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:26.908278 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:26.908343 spare kernel: mv_cesa_tdma_process: 0 0xf981000 Mai 11 18:29:26.908402 spare kernel: mv_cesa_tdma_process: 1 0xf9810a0 Mai 11 18:29:26.908468 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:26.908548 spare kernel: mv_cesa_tdma_process: 1 0 0xcf8ec010 Mai 11 18:29:26.940875 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981000 0xf981080 Mai 11 18:29:26.940957 spare kernel: mv_cesa_dma_step: 1 0xc3041c40 0xf9810a0 0xf981120 Mai 11 18:29:26.941021 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:26.941077 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:26.941133 spare kernel: mv_cesa_tdma_process: 0 0xf981080 Mai 11 18:29:26.941190 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:26.941246 spare kernel: mv_cesa_tdma_process: 1 0xf981120 Mai 11 18:29:26.978095 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981080 0xf981000 Mai 11 18:29:26.978171 spare kernel: mv_cesa_tdma_process: 1 0 0xc3041c10 Mai 11 18:29:26.978233 spare kernel: mv_cesa_dma_step: 1 0xcf8ec040 0xf981120 0xf9810a0 Mai 11 18:29:26.978291 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:26.978347 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:26.978412 spare kernel: mv_cesa_tdma_process: 0 0xf981000 Mai 11 18:29:26.978470 spare kernel: mv_cesa_tdma_process: 1 0xf9810a0 Mai 11 18:29:26.978528 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:26.978584 spare kernel: mv_cesa_tdma_process: 1 0 0xcf8ec010 Mai 11 18:29:27.007183 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981000 0xf981080 Mai 11 18:29:27.007252 spare kernel: mv_cesa_dma_step: 1 0xcfabcc40 0xf9810a0 0xf981120 Mai 11 18:29:27.007313 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:27.007369 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:27.007424 spare kernel: mv_cesa_tdma_process: 0 0xf981080 Mai 11 18:29:27.007482 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:27.007553 spare kernel: mv_cesa_tdma_process: 1 0xf981120 Mai 11 18:29:27.071998 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981080 0xf981160 Mai 11 18:29:27.072093 spare kernel: mv_cesa_tdma_process: 1 0 0xcfabcc10 Mai 11 18:29:27.072167 spare kernel: mv_cesa_dma_step: 1 0xc3041c40 0xf981120 0xf9810a0 Mai 11 18:29:27.072233 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:27.072293 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:27.072353 spare kernel: mv_cesa_tdma_process: 0 0xf981160 Mai 11 18:29:27.072413 spare kernel: mv_cesa_tdma_process: 1 0xf9810a0 Mai 11 18:29:27.072469 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:27.072540 spare kernel: mv_cesa_tdma_process: 1 0 0xc3041c10 Mai 11 18:29:27.072602 spare kernel: mv_cesa_dma_step: 0 0xc2e3aa40 0xf981160 0xf981040 Mai 11 18:29:27.072664 spare kernel: mv_cesa_dma_step: 1 0xcf8ec040 0xf9810a0 0xf981120 Mai 11 18:29:27.072723 spare kernel: mv_cesa_int: 0 0x4ea4 0x80 Mai 11 18:29:27.072788 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:27.072848 spare kernel: mv_cesa_tdma_process: 0 0xf981040 Mai 11 18:29:27.072909 spare kernel: mv_cesa_tdma_process: 0 0 0xc2e3aa10 Mai 11 18:29:27.072970 spare kernel: mv_cesa_tdma_process: 1 0xf981120 Mai 11 18:29:27.098750 spare kernel: mv_cesa_dma_step: 0 0xc2e3aa40 0xf981040 0xf981160 Mai 11 18:29:27.098830 spare kernel: mv_cesa_tdma_process: 1 0 0xcf8ec010 Mai 11 18:29:27.098890 spare kernel: mv_cesa_dma_step: 1 0xcfabcc40 0xf981120 0xf9810a0 Mai 11 18:29:27.098951 spare kernel: mv_cesa_int: 0 0x4ea4 0x80 Mai 11 18:29:27.099009 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:27.099065 spare kernel: mv_cesa_tdma_process: 0 0xf981160 Mai 11 18:29:27.099122 spare kernel: mv_cesa_tdma_process: 0 0 0xc2e3aa10 Mai 11 18:29:27.099187 spare kernel: mv_cesa_tdma_process: 1 0xf9810a0 Mai 11 18:29:27.126978 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981160 0xf981060 Mai 11 18:29:27.127064 spare kernel: mv_cesa_tdma_process: 1 0 0xcfabcc10 Mai 11 18:29:27.127128 spare kernel: mv_cesa_dma_step: 1 0xc3041c40 0xf9810a0 0xf981120 Mai 11 18:29:27.127187 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:27.127244 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:27.127300 spare kernel: mv_cesa_tdma_process: 0 0xf981060 Mai 11 18:29:27.127359 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:27.127416 spare kernel: mv_cesa_tdma_process: 1 0xf981120 Mai 11 18:29:27.156055 spare kernel: mv_cesa_dma_step: 0 0xc2e3aa40 0xf981060 0xf981140 Mai 11 18:29:27.156126 spare kernel: mv_cesa_tdma_process: 1 0 0xc3041c10 Mai 11 18:29:27.156195 spare kernel: mv_cesa_dma_step: 1 0xcfc0e740 0xf981120 0xf9810a0 Mai 11 18:29:27.156257 spare kernel: mv_cesa_int: 0 0x4ea4 0x80 Mai 11 18:29:27.156313 spare kernel: mv_cesa_int: 1 0x4ea4 0x80 Mai 11 18:29:27.156371 spare kernel: mv_cesa_tdma_process: 0 0xf981140 Mai 11 18:29:27.156429 spare kernel: mv_cesa_tdma_process: 0 0 0xc2e3aa10 Mai 11 18:29:27.156485 spare kernel: mv_cesa_tdma_process: 1 0xf9810a0 Mai 11 18:29:27.193281 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981140 0xf9811a0 Mai 11 18:29:27.193355 spare kernel: mv_cesa_tdma_process: 1 0 0xcfc0e710 Mai 11 18:29:27.193416 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:27.193473 spare kernel: mv_cesa_dma_step: 1 0xcf8ec040 0xf9810a0 0xf981120 Mai 11 18:29:27.193537 spare kernel: mv_cesa_tdma_process: 0 0xf9811a0 Mai 11 18:29:27.193598 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:27.193654 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:27.193710 spare kernel: mv_cesa_tdma_process: 1 0xf981120 Mai 11 18:29:27.210434 spare kernel: mv_cesa_dma_step: 0 0xc2e3aa40 0xf9811a0 0xf981060 Mai 11 18:29:27.210562 spare kernel: mv_cesa_tdma_process: 1 0 0xcf8ec010 Mai 11 18:29:27.210628 spare kernel: mv_cesa_int: 0 0x4ea4 0x80 Mai 11 18:29:27.210686 spare kernel: mv_cesa_dma_step: 1 0xcfabcc40 0xf981120 0xf9810a0 Mai 11 18:29:27.210744 spare kernel: mv_cesa_tdma_process: 0 0xf981060 Mai 11 18:29:27.210801 spare kernel: mv_cesa_tdma_process: 0 0 0xc2e3aa10 Mai 11 18:29:27.253648 spare kernel: mv_cesa_dma_step: 0 0xcfc0e740 0xf981060 0xf9811a0 Mai 11 18:29:27.253796 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:27.253861 spare kernel: mv_cesa_int: 0 0x4ea4 0x80 Mai 11 18:29:27.253919 spare kernel: mv_cesa_tdma_process: 1 0xf9810a0 Mai 11 18:29:27.253977 spare kernel: mv_cesa_tdma_process: 1 0 0xcfabcc10 Mai 11 18:29:27.254034 spare kernel: mv_cesa_dma_step: 1 0xc3041c40 0xf9810a0 0xf981120 Mai 11 18:29:27.254090 spare kernel: mv_cesa_tdma_process: 0 0xf9811a0 Mai 11 18:29:27.254147 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:27.254202 spare kernel: mv_cesa_tdma_process: 0 0 0xcfc0e710 Mai 11 18:29:27.254261 spare kernel: mv_cesa_tdma_process: 1 0xf981120 Mai 11 18:29:27.300558 spare kernel: mv_cesa_dma_step: 0 0xc2e3aa40 0xf9811a0 0xf981060 Mai 11 18:29:27.300692 spare kernel: mv_cesa_tdma_process: 1 0 0xc3041c10 Mai 11 18:29:27.300775 spare kernel: mv_cesa_int: 0 0x4ea4 0x80 Mai 11 18:29:27.300836 spare kernel: mv_cesa_dma_step: 1 0xcf8ec040 0xf981120 0xf981020 Mai 11 18:29:27.300897 spare kernel: mv_cesa_tdma_process: 0 0xf981060 Mai 11 18:29:27.300955 spare kernel: mv_cesa_tdma_process: 0 0 0xc2e3aa10 Mai 11 18:29:27.301013 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981060 0xf981140 Mai 11 18:29:27.301072 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:27.301127 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:27.301183 spare kernel: mv_cesa_tdma_process: 1 0xf981020 Mai 11 18:29:27.301242 spare kernel: mv_cesa_tdma_process: 0 0xf981140 Mai 11 18:29:27.301298 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:27.301356 spare kernel: mv_cesa_ahash_queue_req: 0 0xc6670800 0 1 Mai 11 18:29:27.301435 spare kernel: mv_cesa_tdma_process: 1 0 0xcf8ec010 Mai 11 18:29:27.351523 spare kernel: mv_cesa_dma_step: 0 0xc3041c40 0xf981020 0xf9810e0 Mai 11 18:29:27.351696 spare kernel: marvell-cesa f1090000.crypto: CESA device successfully registered Mai 11 18:29:27.352415 spare kernel: mv_cesa_dma_step: 1 0xcfabcc40 0xf981100 0xf981060 Mai 11 18:29:27.352485 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:27.352566 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:27.352628 spare kernel: mv_cesa_tdma_process: 0 0xf9810e0 Mai 11 18:29:27.352697 spare kernel: mv_cesa_tdma_process: 0 0 0xc3041c10 Mai 11 18:29:27.352759 spare kernel: mv_cesa_tdma_process: 1 0xf981060 Mai 11 18:29:27.352823 spare kernel: mv_cesa_dma_step: 0 0xc6670840 0xf981140 0xf981180 Mai 11 18:29:27.352884 spare kernel: mv_cesa_tdma_process: 1 0 0xcfabcc10 Mai 11 18:29:27.352944 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 11 18:29:27.353005 spare kernel: mv_cesa_tdma_process: 0 0xf981180 Mai 11 18:29:27.353068 spare kernel: mv_cesa_ahash_complete: 0 0xc6670800 Mai 11 18:29:27.353130 spare kernel: mv_cesa_tdma_process: 0 0 0xc6670800 Mai 11 18:29:27.353190 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc6670800 Mai 11 18:29:27.372552 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf981180 0xf9810c0 Mai 11 18:29:27.372704 spare kernel: mv_cesa_dma_step: 1 0xc2e3aa40 0xf981060 0xf981040 Mai 11 18:29:27.372778 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:27.372840 spare kernel: mv_cesa_int: 1 0x4ea4 0x80 Mai 11 18:29:27.372900 spare kernel: mv_cesa_tdma_process: 0 0xf9810c0 Mai 11 18:29:27.372962 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:27.472553 spare kernel: mv_cesa_ahash_queue_req: 0 0xc6671200 0 1 Mai 11 18:29:27.472697 spare kernel: mv_cesa_tdma_process: 1 0xf981040 Mai 11 18:29:27.472782 spare kernel: mv_cesa_dma_step: 0 0xc6671240 0xf9810c0 0xf981000 Mai 11 18:29:27.472844 spare kernel: mv_cesa_tdma_process: 1 0 0xc2e3aa10 Mai 11 18:29:27.472905 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 11 18:29:27.472963 spare kernel: mv_cesa_dma_step: 1 0xc2e3aa40 0xf981160 0xf9811c0 Mai 11 18:29:27.473024 spare kernel: mv_cesa_tdma_process: 0 0xf981000 Mai 11 18:29:27.473080 spare kernel: mv_cesa_int: 1 0x4ea4 0x80 Mai 11 18:29:27.473136 spare kernel: mv_cesa_ahash_complete: 0 0xc6671200 Mai 11 18:29:27.473196 spare kernel: mv_cesa_tdma_process: 0 0 0xc6671200 Mai 11 18:29:27.473254 spare kernel: mv_cesa_dma_step: 0 0xcfc0e740 0xf981040 0xf981080 Mai 11 18:29:27.473313 spare kernel: mv_cesa_tdma_process: 1 0xf9811c0 Mai 11 18:29:27.473378 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc6671200 Mai 11 18:29:27.473438 spare kernel: mv_cesa_int: 0 0x4ea4 0x80 Mai 11 18:29:27.473494 spare kernel: mv_cesa_tdma_process: 1 0 0xc2e3aa10 Mai 11 18:29:27.473551 spare kernel: mv_cesa_tdma_process: 0 0xf981080 Mai 11 18:29:27.473607 spare kernel: mv_cesa_tdma_process: 0 0 0xcfc0e710 Mai 11 18:29:27.473665 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981080 0xf981040 Mai 11 18:29:27.473725 spare kernel: mv_cesa_dma_step: 1 0xcfc0e740 0xf9811c0 0xf981060 Mai 11 18:29:27.473783 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:27.473839 spare kernel: mv_cesa_int: 1 0x4ea4 0x80 Mai 11 18:29:27.473894 spare kernel: mv_cesa_tdma_process: 0 0xf981040 Mai 11 18:29:27.473957 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:27.474014 spare kernel: mv_cesa_tdma_process: 1 0xf981060 Mai 11 18:29:27.512546 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf981040 0xf9810e0 Mai 11 18:29:27.512687 spare kernel: mv_cesa_tdma_process: 1 0 0xcfc0e710 Mai 11 18:29:27.512752 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:27.512812 spare kernel: mv_cesa_dma_step: 1 0xc3041c40 0xf981060 0xf9811e0 Mai 11 18:29:27.512874 spare kernel: mv_cesa_tdma_process: 0 0xf9810e0 Mai 11 18:29:27.512933 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:27.512989 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:27.632907 spare kernel: mv_cesa_ahash_queue_req: 0 0xc6670800 0 1 Mai 11 18:29:27.633034 spare kernel: mv_cesa_tdma_process: 1 0xf9811e0 Mai 11 18:29:27.633117 spare kernel: mv_cesa_dma_step: 0 0xc6670840 0xf9810e0 0xf981160 Mai 11 18:29:27.633182 spare kernel: mv_cesa_tdma_process: 1 0 0xc3041c10 Mai 11 18:29:27.633243 spare kernel: mv_cesa_dma_step: 1 0xc3041c40 0xf981100 0xf981240 Mai 11 18:29:27.633304 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 11 18:29:27.633365 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:27.633423 spare kernel: mv_cesa_tdma_process: 0 0xf981160 Mai 11 18:29:27.633483 spare kernel: mv_cesa_ahash_complete: 0 0xc6670800 Mai 11 18:29:27.633543 spare kernel: mv_cesa_tdma_process: 1 0xf981240 Mai 11 18:29:27.633604 spare kernel: mv_cesa_tdma_process: 0 0 0xc6670800 Mai 11 18:29:27.633663 spare kernel: mv_cesa_tdma_process: 1 0 0xc3041c10 Mai 11 18:29:27.633731 spare kernel: mv_cesa_dma_step: 0 0xc2e3aa40 0xf9811e0 0xf981120 Mai 11 18:29:27.633795 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc6670800 Mai 11 18:29:27.633856 spare kernel: mv_cesa_ahash_queue_req: 1 0xc17cbc00 0 1 Mai 11 18:29:27.633917 spare kernel: mv_cesa_int: 0 0x4ea4 0x80 Mai 11 18:29:27.633977 spare kernel: mv_cesa_dma_step: 1 0xc17cbc40 0xf981240 0xf981040 Mai 11 18:29:27.634038 spare kernel: mv_cesa_tdma_process: 0 0xf981120 Mai 11 18:29:27.634099 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 11 18:29:27.634162 spare kernel: mv_cesa_tdma_process: 0 0 0xc2e3aa10 Mai 11 18:29:27.634222 spare kernel: mv_cesa_dma_step: 0 0xcfabcc40 0xf981120 0xf981180 Mai 11 18:29:27.634283 spare kernel: mv_cesa_tdma_process: 1 0xf981040 Mai 11 18:29:27.634349 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:27.634412 spare kernel: mv_cesa_ahash_complete: 1 0xc17cbc00 Mai 11 18:29:27.634473 spare kernel: mv_cesa_tdma_process: 1 0 0xc17cbc00 Mai 11 18:29:27.634536 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc17cbc00 Mai 11 18:29:27.634596 spare kernel: mv_cesa_dma_step: 1 0xcfe66240 0xf981040 0xf981020 Mai 11 18:29:27.634656 spare kernel: mv_cesa_tdma_process: 0 0xf981180 Mai 11 18:29:27.634718 spare kernel: mv_cesa_tdma_process: 0 0 0xcfabcc10 Mai 11 18:29:27.634779 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:27.634835 spare kernel: mv_cesa_dma_step: 0 0xcfabcc40 0xf981180 0xf9810c0 Mai 11 18:29:27.634901 spare kernel: mv_cesa_tdma_process: 1 0xf981020 Mai 11 18:29:27.634963 spare kernel: mv_cesa_tdma_process: 1 0 0xcfe66210 Mai 11 18:29:27.635026 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:27.809956 spare kernel: mv_cesa_dma_step: 1 0xcfc0e740 0xf981020 0xf981040 Mai 11 18:29:27.810074 spare kernel: mv_cesa_tdma_process: 0 0xf9810c0 Mai 11 18:29:27.810141 spare kernel: mv_cesa_int: 1 0x4ea4 0x80 Mai 11 18:29:27.810202 spare kernel: mv_cesa_tdma_process: 0 0 0xcfabcc10 Mai 11 18:29:27.810260 spare kernel: mv_cesa_ahash_queue_req: 0 0xc6671200 0 1 Mai 11 18:29:27.810318 spare kernel: mv_cesa_tdma_process: 1 0xf981040 Mai 11 18:29:27.810375 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18:29:31.416279 spare kernel: mv_cesa_ahash_complete: 1 0xc6671200 Mai 11 18:29:31.416354 spare kernel: mv_cesa_tdma_process: 1 0 0xc6671200 Mai 11 18:29:31.416413 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc6671200 Mai 11 18:29:31.416470 spare kernel: mv_cesa_dma_step: 1 0xcfe66240 0xf981420 0xf9813c0 Mai 11 18:29:31.416541 spare kernel: mv_cesa_int: 0 0x4ea4 0x80 Mai 11 18:29:31.416601 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:31.416658 spare kernel: mv_cesa_tdma_process: 0 0xf981080 Mai 11 18:29:31.416715 spare kernel: mv_cesa_tdma_process: 0 0 0xcfc0e710 Mai 11 18:29:31.416771 spare kernel: mv_cesa_tdma_process: 1 0xf9813c0 Mai 11 18:29:31.453333 spare kernel: mv_cesa_dma_step: 0 0xc2e3aa40 0xf981080 0xf9813e0 Mai 11 18:29:31.453433 spare kernel: mv_cesa_tdma_process: 1 0 0xcfe66210 Mai 11 18:29:31.453495 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 11 18:29:31.453571 spare kernel: mv_cesa_ahash_queue_req: 1 0xc6670800 0 1 Mai 11 18:29:31.453633 spare kernel: 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0xcfe66210 Mai 11 18:29:34.969621 spare kernel: mv_cesa_tdma_process: 0 0xf981100 Mai 11 18:29:35.013874 spare kernel: mv_cesa_ahash_queue_req: 1 0xc17cbc00 0 1 Mai 11 18:29:35.013944 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:35.014002 spare kernel: mv_cesa_ahash_queue_req: 0 0xc6670800 0 1 Mai 11 18:29:35.014061 spare kernel: mv_cesa_dma_step: 1 0xc17cbc40 0xf9810a0 0xf981580 Mai 11 18:29:35.014122 spare kernel: mv_cesa_dma_step: 0 0xc6670840 0xf981100 0xf981140 Mai 11 18:29:35.014181 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 11 18:29:35.014244 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 11 18:29:35.014304 spare kernel: mv_cesa_tdma_process: 1 0xf981580 Mai 11 18:29:35.014363 spare kernel: mv_cesa_ahash_complete: 1 0xc17cbc00 Mai 11 18:29:35.014419 spare kernel: mv_cesa_tdma_process: 0 0xf981140 Mai 11 18:29:35.014475 spare kernel: mv_cesa_tdma_process: 1 0 0xc17cbc00 Mai 11 18:29:35.014531 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc17cbc00 Mai 11 18:29:35.014587 spare kernel: mv_cesa_ahash_complete: 0 0xc6670800 Mai 11 18:29:35.051078 spare kernel: mv_cesa_ahash_queue_req: 0 0xc6671200 22 0 Mai 11 18:29:35.051152 spare kernel: mv_cesa_tdma_process: 0 0 0xc6670800 Mai 11 18:29:35.051210 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc6670800 Mai 11 18:29:35.051266 spare kernel: mv_cesa_dma_step: 1 0xc2e3aa40 0xf981140 0xf9815a0 Mai 11 18:29:35.051336 spare kernel: mv_cesa_dma_step: 0 0xc6671240 0xf981580 0xf9814a0 Mai 11 18:29:35.051397 spare kernel: mv_cesa_ahash_queue_req: 0 0xc6670800 26 1 Mai 11 18:29:35.051456 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 11 18:29:35.051514 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 11 18:29:35.051570 spare kernel: mv_cesa_tdma_process: 1 0xf9815a0 Mai 11 18:29:35.051629 spare kernel: mv_cesa_tdma_process: 1 0 0xc2e3aa10 Mai 11 18:29:35.051687 spare kernel: mv_cesa_tdma_process: 0 0xf9814a0 Mai 11 18:29:35.106243 spare kernel: mv_cesa_ahash_queue_req: 1 0xc17cbc00 64 0 Mai 11 18:29:35.106313 spare kernel: mv_cesa_ahash_complete: 0 0xc6671200 Mai 11 18:29:35.106371 spare kernel: mv_cesa_tdma_process: 0 0 0xc6671200 Mai 11 18:29:35.106434 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981440 0xf981380 Mai 11 18:29:35.106496 spare kernel: mv_cesa_dma_step: 1 0xc17cbc40 0xf9815a0 0xf9813e0 Mai 11 18:29:35.106555 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc6671200 Mai 11 18:29:35.106613 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 11 18:29:35.106671 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:35.106726 spare kernel: mv_cesa_tdma_process: 1 0xf9813e0 Mai 11 18:29:35.106786 spare kernel: mv_cesa_ahash_complete: 1 0xc17cbc00 Mai 11 18:29:35.106841 spare kernel: mv_cesa_tdma_process: 0 0xf981380 Mai 11 18:29:35.106900 spare kernel: mv_cesa_tdma_process: 1 0 0xc17cbc00 Mai 11 18:29:35.106957 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:35.107013 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf9813a0 0xf9814c0 Mai 11 18:29:35.107079 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc17cbc00 Mai 11 18:29:35.107137 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:35.174048 spare kernel: mv_cesa_ahash_queue_req: 1 0xc6671200 0 1 Mai 11 18:29:35.174120 spare kernel: mv_cesa_tdma_process: 0 0xf9814c0 Mai 11 18:29:35.174182 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:35.174239 spare kernel: mv_cesa_dma_step: 0 0xcfc0e740 0xf981540 0xf981340 Mai 11 18:29:35.174300 spare kernel: mv_cesa_dma_step: 1 0xc6671240 0xf9813e0 0xf9815a0 Mai 11 18:29:35.174360 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 11 18:29:35.174416 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 11 18:29:35.174472 spare kernel: mv_cesa_tdma_process: 0 0xf981340 Mai 11 18:29:35.174538 spare kernel: mv_cesa_tdma_process: 0 0 0xcfc0e710 Mai 11 18:29:35.174596 spare kernel: mv_cesa_tdma_process: 1 0xf9815a0 Mai 11 18:29:35.174654 spare kernel: mv_cesa_dma_step: 0 0xc6670840 0xf981320 0xf9811a0 Mai 11 18:29:35.174714 spare kernel: mv_cesa_ahash_complete: 1 0xc6671200 Mai 11 18:29:35.174771 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 11 18:29:35.174827 spare kernel: mv_cesa_tdma_process: 1 0 0xc6671200 Mai 11 18:29:35.174885 spare kernel: mv_cesa_tdma_process: 0 0xf9811a0 Mai 11 18:29:35.174944 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc6671200 Mai 11 18:29:35.175001 spare kernel: mv_cesa_ahash_complete: 0 0xc6670800 Mai 11 18:29:35.351172 spare kernel: mv_cesa_dma_step: 1 0xcf8ec040 0xf9812a0 0xf981540 Mai 11 18:29:35.351267 spare kernel: mv_cesa_tdma_process: 0 0 0xc6670800 Mai 11 18:29:35.351328 spare kernel: mv_cesa_dma_step: 0 0xcfc0e740 0xf9815a0 0xf981480 Mai 11 18:29:35.351391 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc6670800 Mai 11 18:29:35.351449 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 11 18:29:35.351506 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:35.351563 spare kernel: mv_cesa_tdma_process: 0 0xf981480 Mai 11 18:29:35.351622 spare kernel: mv_cesa_tdma_process: 1 0xf981540 Mai 11 18:29:35.351683 spare kernel: mv_cesa_tdma_process: 0 0 0xcfc0e710 Mai 11 18:29:35.351742 spare kernel: mv_cesa_tdma_process: 1 0 0xcf8ec010 Mai 11 18:29:35.351801 spare kernel: mv_cesa_dma_step: 0 0xc2e3aa40 0xf981480 0xf9811a0 Mai 11 18:29:35.351862 spare kernel: mv_cesa_dma_step: 1 0xcfe66240 0xf981540 0xf9812a0 Mai 11 18:29:35.351931 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 11 18:29:35.351992 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:35.352049 spare kernel: mv_cesa_tdma_process: 1 0xf9812a0 Mai 11 18:29:35.352112 spare kernel: mv_cesa_tdma_process: 0 0xf9811a0 Mai 11 18:29:35.352172 spare kernel: mv_cesa_tdma_process: 1 0 0xcfe66210 Mai 11 18:29:35.352230 spare kernel: mv_cesa_tdma_process: 0 0 0xc2e3aa10 Mai 11 18:29:35.352290 spare kernel: mv_cesa_ahash_queue_req: 1 0xc6670800 26 1 Mai 11 18:29:35.352349 spare kernel: mv_cesa_dma_step: 0 0xcfc0e740 0xf9812a0 0xf9814c0 Mai 11 18:29:35.352408 spare kernel: mv_cesa_dma_step: 1 0xc6670840 0xf9812c0 0xf9813a0 Mai 11 18:29:35.352468 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 11 18:29:35.352544 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 11 18:29:35.352607 spare kernel: mv_cesa_tdma_process: 1 0xf9813a0 Mai 11 18:29:35.352665 spare kernel: mv_cesa_tdma_process: 0 0xf9814c0 Mai 11 18:29:35.352723 spare kernel: mv_cesa_ahash_complete: 1 0xc6670800 Mai 11 18:29:35.352781 spare kernel: mv_cesa_tdma_process: 0 0 0xcfc0e710 Mai 11 18:29:35.352837 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf9814c0 0xf981540 Mai 11 18:29:35.352898 spare kernel: mv_cesa_tdma_process: 1 0 0xc6670800 Mai 11 18:29:35.352956 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:35.353012 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc6670800 Mai 11 18:29:35.353070 spare kernel: mv_cesa_dma_step: 1 0xcfc0e740 0xf9813a0 0xf981300 Mai 11 18:29:35.353129 spare kernel: mv_cesa_tdma_process: 0 0xf981540 Mai 11 18:29:35.353199 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 11 18:29:35.353257 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:35.353314 spare kernel: mv_cesa_tdma_process: 1 0xf981300 Mai 11 18:29:35.353374 spare kernel: mv_cesa_dma_step: 0 0xc2e3aa40 0xf981540 0xf9812a0 Mai 11 18:29:35.353435 spare kernel: mv_cesa_tdma_process: 1 0 0xcfc0e710 Mai 11 18:29:35.353494 spare kernel: mv_cesa_ahash_queue_req: 1 0xc17cbc00 0 1 Mai 11 18:29:35.353554 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 11 18:29:35.353610 spare kernel: mv_cesa_dma_step: 1 0xc17cbc40 0xf981300 0xf9812c0 Mai 11 18:29:35.353672 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 11 18:29:35.353729 spare kernel: mv_cesa_tdma_process: 0 0xf9812a0 Mai 11 18:29:35.353796 spare kernel: mv_cesa_tdma_process: 1 0xf9812c0 Mai 11 18:29:35.353858 spare kernel: mv_cesa_ahash_complete: 1 0xc17cbc00 Mai 11 18:29:35.353921 spare kernel: mv_cesa_tdma_process: 0 0 0xc2e3aa10 Mai 11 18:29:35.353982 spare kernel: mv_cesa_tdma_process: 1 0 0xc17cbc00 Mai 11 18:29:35.354043 spare kernel: mv_cesa_dma_step: 0 0xc2e3aa40 0xf9812a0 0xf9813a0 Mai 11 18:29:35.354103 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc17cbc00 Mai 11 18:29:35.380084 spare kernel: mv_cesa_dma_step: 1 0xcfe66240 0xf9812c0 0xf9811a0 Mai 11 18:29:35.380163 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 11 18:29:35.380225 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:35.380283 spare kernel: mv_cesa_tdma_process: 0 0xf9813a0 Mai 11 18:29:35.380350 spare kernel: mv_cesa_tdma_process: 0 0 0xc2e3aa10 Mai 11 18:29:35.380408 spare kernel: mv_cesa_dma_step: 0 0xc2e3aa40 0xf9813a0 0xf981320 Mai 11 18:29:35.380468 spare kernel: mv_cesa_tdma_process: 1 0xf9811a0 Mai 11 18:29:35.380535 spare kernel: mv_cesa_tdma_process: 1 0 0xcfe66210 Mai 11 18:29:35.380593 spare kernel: mv_cesa_dma_step: 1 0xcf8ec040 0xf9815a0 0xf981340 Mai 11 18:29:35.380653 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:35.380708 spare kernel: mv_cesa_tdma_process: 1 0xf981340 Mai 11 18:29:35.380766 spare kernel: mv_cesa_ahash_queue_req: 1 0xc17cbc00 64 1 Mai 11 18:29:35.380827 spare kernel: mv_cesa_tdma_process: 1 0 0xcf8ec010 Mai 11 18:29:35.389070 spare kernel: mv_cesa_ahash_queue_req: 1 0xc6671200 1023 0 Mai 11 18:29:35.389146 spare kernel: mv_cesa_dma_step: 1 0xc17cbc40 0xf9811a0 0xf981520 Mai 11 18:29:35.530082 spare kernel: mv_cesa_ahash_queue_req: 0 0xc6670800 0 1 Mai 11 18:29:35.530167 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 11 18:29:35.530229 spare kernel: mv_cesa_tdma_process: 0 0xf981320 Mai 11 18:29:35.530290 spare kernel: mv_cesa_tdma_process: 0 0 0xc2e3aa10 Mai 11 18:29:35.530347 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf981320 0xf9813a0 Mai 11 18:29:35.530407 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 11 18:29:35.530464 spare kernel: mv_cesa_tdma_process: 1 0xf981520 Mai 11 18:29:35.530523 spare kernel: mv_cesa_ahash_complete: 1 0xc17cbc00 Mai 11 18:29:35.530579 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:35.530635 spare kernel: mv_cesa_tdma_process: 1 0 0xc17cbc00 Mai 11 18:29:35.530703 spare kernel: mv_cesa_tdma_process: 0 0xf9813a0 Mai 11 18:29:35.530760 spare kernel: mv_cesa_dma_step: 1 0xc6671240 0xf981340 0xf981100 Mai 11 18:29:35.530820 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:35.530880 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc17cbc00 Mai 11 18:29:35.530936 spare kernel: mv_cesa_dma_step: 0 0xc6670840 0xf9815a0 0xf9812a0 Mai 11 18:29:35.530996 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 11 18:29:35.531052 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 11 18:29:35.531107 spare kernel: mv_cesa_tdma_process: 1 0xf981100 Mai 11 18:29:35.531167 spare kernel: mv_cesa_ahash_complete: 1 0xc6671200 Mai 11 18:29:35.531223 spare kernel: mv_cesa_tdma_process: 0 0xf9812a0 Mai 11 18:29:35.531286 spare kernel: mv_cesa_tdma_process: 1 0 0xc6671200 Mai 11 18:29:35.531344 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc6671200 Mai 11 18:29:35.531401 spare kernel: mv_cesa_ahash_queue_req: 1 0xc6671200 0 1 Mai 11 18:29:35.531459 spare kernel: mv_cesa_dma_step: 1 0xc6671240 0xf981360 0xf9814e0 Mai 11 18:29:35.531518 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 11 18:29:35.531574 spare kernel: mv_cesa_tdma_process: 1 0xf9814e0 Mai 11 18:29:35.531632 spare kernel: mv_cesa_ahash_complete: 1 0xc6671200 Mai 11 18:29:35.531689 spare kernel: mv_cesa_tdma_process: 1 0 0xc6671200 Mai 11 18:29:35.531744 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc6671200 Mai 11 18:29:35.531801 spare kernel: alg: ahash: mv-sha256 test failed (wrong result) on test vector 4, cfg="init+update+final aligned buffer" Mai 11 18:29:35.531863 spare kernel: mv_cesa_ahash_complete: 0 0xc6670800 Mai 11 18:29:35.531925 spare kernel: alg: self-tests for sha256 using mv-sha256 failed (rc=-22) Mai 11 18:29:35.531989 spare kernel: mv_cesa_tdma_process: 0 0 0xc6670800 Mai 11 18:29:35.532046 spare kernel: ------------[ cut here ]------------ Mai 11 18:29:35.532106 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981100 0xf9813a0 Mai 11 18:29:35.532165 spare kernel: WARNING: CPU: 1 PID: 389 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614 Mai 11 18:29:35.532225 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc6670800 Mai 11 18:29:35.532282 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:35.532338 spare kernel: alg: self-tests for sha256 using mv-sha256 failed (rc=-22) Mai 11 18:29:35.532396 spare kernel: mv_cesa_tdma_process: 0 0xf9813a0 Mai 11 18:29:35.532452 spare kernel: Modules linked in: Mai 11 18:29:35.548945 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:35.549026 spare kernel: marvell_cesa Mai 11 18:29:35.549092 spare kernel: mv_cesa_ahash_queue_req: 0 0xc17cbc00 64 1 Mai 11 18:29:35.549154 spare kernel: libdes libaes Mai 11 18:29:35.549215 spare kernel: CPU: 1 UID: 0 PID: 389 Comm: cryptomgr_test Not tainted 6.15.0-rc5+ #7 NONE Mai 11 18:29:35.549275 spare kernel: Hardware name: Marvell Armada 380/385 (Device Tree) Mai 11 18:29:35.549335 spare kernel: Call trace: Mai 11 18:29:35.549393 spare kernel: unwind_backtrace from show_stack+0x10/0x14 Mai 11 18:29:35.549452 spare kernel: show_stack from dump_stack_lvl+0x50/0x64 Mai 11 18:29:35.549525 spare kernel: dump_stack_lvl from __warn+0x7c/0xd4 Mai 11 18:29:35.549587 spare kernel: __warn from warn_slowpath_fmt+0x110/0x16c Mai 11 18:29:35.549648 spare kernel: warn_slowpath_fmt from alg_test+0x5f0/0x614 Mai 11 18:29:35.549707 spare kernel: alg_test from cryptomgr_test+0x18/0x38 Mai 11 18:29:35.549766 spare kernel: cryptomgr_test from kthread+0xe8/0x204 Mai 11 18:29:35.549825 spare kernel: kthread from ret_from_fork+0x14/0x28 Mai 11 18:29:35.549884 spare kernel: Exception stack(0xf0a8dfb0 to 0xf0a8dff8) Mai 11 18:29:35.549943 spare kernel: dfa0: 00000000 00000000 00000000 00000000 Mai 11 18:29:35.550004 spare kernel: dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Mai 11 18:29:35.550072 spare kernel: dfe0: 00000000 00000000 00000000 00000000 00000013 00000000 Mai 11 18:29:35.550166 spare kernel: ---[ end trace 0000000000000000 ]--- Mai 11 18:29:35.550228 spare kernel: mv_cesa_dma_step: 0 0xc17cbc40 0xf9813a0 0xf981400 Mai 11 18:29:35.550287 spare kernel: mv_cesa_dma_step: 1 0xcfc0e740 0xf981100 0xf9815a0 Mai 11 18:29:35.550353 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 11 18:29:35.550410 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 11 18:29:35.550467 spare kernel: mv_cesa_tdma_process: 0 0xf981400 Mai 11 18:29:35.550526 spare kernel: mv_cesa_tdma_process: 1 0xf9815a0 Mai 11 18:29:35.550582 spare kernel: mv_cesa_tdma_process: 1 0 0xcfc0e710 Mai 11 18:29:35.684694 spare kernel: mv_cesa_dma_step: 1 0xcfe66240 0xf9815a0 0xf981100 Mai 11 18:29:35.684802 spare kernel: mv_cesa_ahash_complete: 0 0xc17cbc00 Mai 11 18:29:35.684871 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:35.684931 spare kernel: mv_cesa_tdma_process: 0 0 0xc17cbc00 Mai 11 18:29:35.684991 spare kernel: mv_cesa_tdma_process: 1 0xf981100 Mai 11 18:29:35.685064 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc17cbc00 Mai 11 18:29:35.685127 spare kernel: mv_cesa_tdma_process: 1 0 0xcfe66210 Mai 11 18:29:35.685191 spare kernel: alg: ahash: mv-hmac-sha256 setkey failed on test vector 0; expected_error=0, actual_error=-80, flags=0x1 Mai 11 18:29:35.685253 spare kernel: mv_cesa_ahash_queue_req: 0 0xc17cbc00 64 0 Mai 11 18:29:35.685315 spare kernel: alg: self-tests for hmac(sha256) using mv-hmac-sha256 failed (rc=-80) Mai 11 18:29:35.685379 spare kernel: mv_cesa_dma_step: 0 0xc17cbc40 0xf981400 0xf9813a0 Mai 11 18:29:35.685443 spare kernel: ------------[ cut here ]------------ Mai 11 18:29:35.685504 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 11 18:29:35.685563 spare kernel: WARNING: CPU: 1 PID: 395 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614 Mai 11 18:29:35.685625 spare kernel: alg: self-tests for hmac(sha256) using mv-hmac-sha256 failed (rc=-80) Mai 11 18:29:35.685692 spare kernel: Modules linked in: marvell_cesa libdes libaes Mai 11 18:29:35.685755 spare kernel: CPU: 1 UID: 0 PID: 395 Comm: cryptomgr_test Tainted: G W 6.15.0-rc5+ #7 NONE Mai 11 18:29:35.685817 spare kernel: Tainted: [W]=WARN Mai 11 18:29:35.685878 spare kernel: Hardware name: Marvell Armada 380/385 (Device Tree) Mai 11 18:29:35.685938 spare kernel: Call trace: Mai 11 18:29:35.685998 spare kernel: unwind_backtrace from show_stack+0x10/0x14 Mai 11 18:29:35.686057 spare kernel: show_stack from dump_stack_lvl+0x50/0x64 Mai 11 18:29:35.686117 spare kernel: dump_stack_lvl from __warn+0x7c/0xd4 Mai 11 18:29:35.686175 spare kernel: __warn from warn_slowpath_fmt+0x110/0x16c Mai 11 18:29:35.686235 spare kernel: warn_slowpath_fmt from alg_test+0x5f0/0x614 Mai 11 18:29:35.686303 spare kernel: alg_test from cryptomgr_test+0x18/0x38 Mai 11 18:29:35.686363 spare kernel: cryptomgr_test from kthread+0xe8/0x204 Mai 11 18:29:35.686423 spare kernel: kthread from ret_from_fork+0x14/0x28 Mai 11 18:29:35.686483 spare kernel: Exception stack(0xf0b01fb0 to 0xf0b01ff8) Mai 11 18:29:35.686546 spare kernel: 1fa0: 00000000 00000000 00000000 00000000 Mai 11 18:29:35.686607 spare kernel: 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Mai 11 18:29:35.686669 spare kernel: 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 Mai 11 18:29:35.686731 spare kernel: ---[ end trace 0000000000000000 ]--- Mai 11 18:29:35.686789 spare kernel: mv_cesa_tdma_process: 0 0xf9813a0 Mai 11 18:29:35.686854 spare kernel: mv_cesa_dma_step: 1 0xcfc0e740 0xf981100 0xf9815a0 Mai 11 18:29:35.686916 spare kernel: mv_cesa_ahash_complete: 0 0xc17cbc00 Mai 11 18:29:35.686974 spare kernel: mv_cesa_tdma_process: 0 0 0xc17cbc00 Mai 11 18:29:35.687037 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc17cbc00 Mai 11 18:29:35.687100 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 11 18:29:35.687159 spare kernel: mv_cesa_ahash_queue_req: 0 0xc6670800 26 1 Mai 11 18:29:35.687218 spare kernel: mv_cesa_tdma_process: 1 0xf9815a0 Mai 11 18:29:35.687275 spare kernel: mv_cesa_tdma_process: 1 0 0xcfc0e710 Mai 11 18:29:35.687333 spare kernel: mv_cesa_dma_step: 1 0xcf8ec040 0xf9815a0 0xf9814e0 Mai 11 18:29:35.687393 spare kernel: mv_cesa_dma_step: 0 0xc6670840 0xf9813a0 0xf981400 Mai 11 18:29:35.687454 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 11 18:29:35.687512 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:35.687573 spare kernel: mv_cesa_tdma_process: 1 0xf9814e0 Mai 11 18:29:35.687633 spare kernel: mv_cesa_tdma_process: 1 0 0xcf8ec010 Mai 11 18:29:35.687697 spare kernel: mv_cesa_tdma_process: 0 0xf981400 Mai 11 18:29:35.687757 spare kernel: mv_cesa_dma_step: 1 0xcfe66240 0xf9814e0 0xf9812c0 Mai 11 18:29:35.687823 spare kernel: mv_cesa_ahash_complete: 0 0xc6670800 Mai 11 18:29:35.687884 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:35.687943 spare kernel: mv_cesa_tdma_process: 0 0 0xc6670800 Mai 11 18:29:35.688002 spare kernel: mv_cesa_tdma_process: 1 0xf9812c0 Mai 11 18:29:35.688064 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc6670800 Mai 11 18:29:35.688124 spare kernel: mv_cesa_tdma_process: 1 0 0xcfe66210 Mai 11 18:29:35.694904 spare kernel: mv_cesa_ahash_queue_req: 0 0xc17cbc00 0 1 Mai 11 18:29:35.694985 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf9812c0 0xf981360 Mai 11 18:29:35.740417 spare kernel: mv_cesa_ahash_queue_req: 1 0xc6670800 0 1 Mai 11 18:29:35.740498 spare kernel: mv_cesa_dma_step: 1 0xcfc0e740 0xf981300 0xf9813c0 Mai 11 18:29:35.740574 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:35.740633 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 11 18:29:35.740690 spare kernel: mv_cesa_tdma_process: 0 0xf981360 Mai 11 18:29:35.740748 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:35.740805 spare kernel: mv_cesa_dma_step: 0 0xc17cbc40 0xf981400 0xf9813a0 Mai 11 18:29:35.740862 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 11 18:29:35.740917 spare kernel: mv_cesa_tdma_process: 0 0xf9813a0 Mai 11 18:29:35.740975 spare kernel: mv_cesa_ahash_complete: 0 0xc17cbc00 Mai 11 18:29:35.741032 spare kernel: mv_cesa_tdma_process: 1 0xf9813c0 Mai 11 18:29:35.741089 spare kernel: mv_cesa_tdma_process: 0 0 0xc17cbc00 Mai 11 18:29:35.741152 spare kernel: mv_cesa_tdma_process: 1 0 0xcfc0e710 Mai 11 18:29:35.741209 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc17cbc00 Mai 11 18:29:35.741266 spare kernel: mv_cesa_dma_step: 1 0xc6670840 0xf981420 0xf9810c0 Mai 11 18:29:35.857251 spare kernel: mv_cesa_ahash_queue_req: 0 0xc17cbc00 64 1 Mai 11 18:29:35.857343 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 11 18:29:35.857407 spare kernel: mv_cesa_dma_step: 0 0xc17cbc40 0xf9813a0 0xf981400 Mai 11 18:29:35.857467 spare kernel: mv_cesa_tdma_process: 1 0xf9810c0 Mai 11 18:29:35.857526 spare kernel: mv_cesa_ahash_complete: 1 0xc6670800 Mai 11 18:29:35.857585 spare kernel: mv_cesa_tdma_process: 1 0 0xc6670800 Mai 11 18:29:35.857641 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc6670800 Mai 11 18:29:35.857697 spare kernel: mv_cesa_dma_step: 1 0xcfc0e740 0xf9810c0 0xf9813c0 Mai 11 18:29:35.857770 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 11 18:29:35.857829 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 11 18:29:35.857885 spare kernel: mv_cesa_tdma_process: 0 0xf981400 Mai 11 18:29:35.857941 spare kernel: mv_cesa_tdma_process: 1 0xf9813c0 Mai 11 18:29:35.857997 spare kernel: mv_cesa_ahash_complete: 0 0xc17cbc00 Mai 11 18:29:35.858053 spare kernel: mv_cesa_tdma_process: 1 0 0xcfc0e710 Mai 11 18:29:35.858108 spare kernel: mv_cesa_dma_step: 1 0xcfc0e740 0xf9811a0 0xf981540 Mai 11 18:29:35.858167 spare kernel: mv_cesa_tdma_process: 0 0 0xc17cbc00 Mai 11 18:29:35.858224 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 11 18:29:35.858280 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf9813c0 0xf981480 Mai 11 18:29:35.858340 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc17cbc00 Mai 11 18:29:35.858402 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:35.858461 spare kernel: mv_cesa_tdma_process: 0 0xf981480 Mai 11 18:29:35.858518 spare kernel: mv_cesa_tdma_process: 1 0xf981540 Mai 11 18:29:35.858576 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:35.858631 spare kernel: mv_cesa_tdma_process: 1 0 0xcfc0e710 Mai 11 18:29:35.858690 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981480 0xf9813c0 Mai 11 18:29:35.858750 spare kernel: mv_cesa_dma_step: 1 0xcf8ec040 0xf981540 0xf9811a0 Mai 11 18:29:35.858809 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:35.858866 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:35.858922 spare kernel: mv_cesa_tdma_process: 0 0xf9813c0 Mai 11 18:29:35.858988 spare kernel: mv_cesa_tdma_process: 1 0xf9811a0 Mai 11 18:29:35.859047 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:35.859106 spare kernel: mv_cesa_tdma_process: 1 0 0xcf8ec010 Mai 11 18:29:35.859165 spare kernel: mv_cesa_ahash_queue_req: 0 0xc6670800 26 1 Mai 11 18:29:35.895382 spare kernel: mv_cesa_dma_step: 1 0xcfc0e740 0xf9811a0 0xf981400 Mai 11 18:29:35.895455 spare kernel: mv_cesa_dma_step: 0 0xc6670840 0xf9813c0 0xf981380 Mai 11 18:29:35.895517 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 11 18:29:35.895573 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 11 18:29:35.895629 spare kernel: mv_cesa_tdma_process: 0 0xf981380 Mai 11 18:29:35.895687 spare kernel: mv_cesa_tdma_process: 1 0xf981400 Mai 11 18:29:35.895743 spare kernel: mv_cesa_ahash_complete: 0 0xc6670800 Mai 11 18:29:35.895807 spare kernel: mv_cesa_tdma_process: 1 0 0xcfc0e710 Mai 11 18:29:35.895864 spare kernel: mv_cesa_tdma_process: 0 0 0xc6670800 Mai 11 18:29:35.933441 spare kernel: mv_cesa_dma_step: 1 0xcf8ec040 0xf9811a0 0xf9815a0 Mai 11 18:29:35.933514 spare kernel: mv_cesa_dma_step: 0 0xcfc0e740 0xf981400 0xf981300 Mai 11 18:29:35.933577 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc6670800 Mai 11 18:29:35.933634 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 11 18:29:35.933693 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:35.933750 spare kernel: mv_cesa_tdma_process: 0 0xf981300 Mai 11 18:29:35.933809 spare kernel: mv_cesa_tdma_process: 1 0xf9815a0 Mai 11 18:29:35.933865 spare kernel: mv_cesa_tdma_process: 0 0 0xcfc0e710 Mai 11 18:29:35.933930 spare kernel: mv_cesa_tdma_process: 1 0 0xcf8ec010 Mai 11 18:29:35.933987 spare kernel: mv_cesa_ahash_queue_req: 0 0xc6670800 26 1 Mai 11 18:29:35.961562 spare kernel: mv_cesa_dma_step: 1 0xcfc0e740 0xf9815a0 0xf981520 Mai 11 18:29:35.961642 spare kernel: mv_cesa_dma_step: 0 0xc6670840 0xf981300 0xf981480 Mai 11 18:29:35.961708 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 11 18:29:35.961766 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 11 18:29:35.961827 spare kernel: mv_cesa_tdma_process: 0 0xf981480 Mai 11 18:29:35.961886 spare kernel: mv_cesa_ahash_complete: 0 0xc6670800 Mai 11 18:29:35.961944 spare kernel: mv_cesa_tdma_process: 0 0 0xc6670800 Mai 11 18:29:35.962001 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc6670800 Mai 11 18:29:35.962059 spare kernel: mv_cesa_tdma_process: 1 0xf981520 Mai 11 18:29:35.962127 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981480 0xf981320 Mai 11 18:29:35.962191 spare kernel: mv_cesa_tdma_process: 1 0 0xcfc0e710 Mai 11 18:29:35.998744 spare kernel: mv_cesa_dma_step: 1 0xcf8ec040 0xf981520 0xf9811a0 Mai 11 18:29:35.998824 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:35.998883 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:35.998942 spare kernel: mv_cesa_tdma_process: 0 0xf981320 Mai 11 18:29:35.999002 spare kernel: mv_cesa_tdma_process: 1 0xf9811a0 Mai 11 18:29:35.999059 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:35.999115 spare kernel: mv_cesa_tdma_process: 1 0 0xcf8ec010 Mai 11 18:29:35.999172 spare kernel: mv_cesa_ahash_queue_req: 0 0xc17cbc00 32 0 Mai 11 18:29:36.035945 spare kernel: mv_cesa_dma_step: 1 0xcfc0e740 0xf9811a0 0xf9813e0 Mai 11 18:29:36.036025 spare kernel: mv_cesa_dma_step: 0 0xc17cbc40 0xf981320 0xf981540 Mai 11 18:29:36.036088 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 11 18:29:36.036145 spare kernel: mv_cesa_tdma_process: 0 0xf981540 Mai 11 18:29:36.036204 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 11 18:29:36.036261 spare kernel: mv_cesa_ahash_complete: 0 0xc17cbc00 Mai 11 18:29:36.036321 spare kernel: mv_cesa_tdma_process: 1 0xf9813e0 Mai 11 18:29:36.036379 spare kernel: mv_cesa_tdma_process: 0 0 0xc17cbc00 Mai 11 18:29:36.036438 spare kernel: mv_cesa_tdma_process: 1 0 0xcfc0e710 Mai 11 18:29:36.036494 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc17cbc00 Mai 11 18:29:36.120938 spare kernel: mv_cesa_dma_step: 0 0xcfc0e740 0xf9813e0 0xf981380 Mai 11 18:29:36.121018 spare kernel: mv_cesa_ahash_queue_req: 1 0xc6670800 0 1 Mai 11 18:29:36.121080 spare kernel: mv_cesa_dma_step: 1 0xcfe66240 0xf981320 0xf9814e0 Mai 11 18:29:36.121141 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 11 18:29:36.121198 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:36.121254 spare kernel: mv_cesa_tdma_process: 0 0xf981380 Mai 11 18:29:36.121311 spare kernel: mv_cesa_tdma_process: 1 0xf9814e0 Mai 11 18:29:36.121368 spare kernel: mv_cesa_tdma_process: 1 0 0xcfe66210 Mai 11 18:29:36.121426 spare kernel: mv_cesa_tdma_process: 0 0 0xcfc0e710 Mai 11 18:29:36.121482 spare kernel: mv_cesa_dma_step: 1 0xc6670840 0xf981540 0xf981300 Mai 11 18:29:36.121540 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf981380 0xf9813e0 Mai 11 18:29:36.121602 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 11 18:29:36.121665 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:36.121724 spare kernel: mv_cesa_tdma_process: 1 0xf981300 Mai 11 18:29:36.121782 spare kernel: mv_cesa_ahash_complete: 1 0xc6670800 Mai 11 18:29:36.121839 spare kernel: mv_cesa_tdma_process: 0 0xf9813e0 Mai 11 18:29:36.121897 spare kernel: mv_cesa_tdma_process: 1 0 0xc6670800 Mai 11 18:29:36.121954 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:36.122010 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc6670800 Mai 11 18:29:36.122066 spare kernel: mv_cesa_ahash_queue_req: 0 0xc17cbc00 0 1 Mai 11 18:29:36.130543 spare kernel: mv_cesa_dma_step: 0 0xcfc0e740 0xf981300 0xf981380 Mai 11 18:29:36.130612 spare kernel: mv_cesa_ahash_queue_req: 1 0xc6670800 0 1 Mai 11 18:29:36.204912 spare kernel: mv_cesa_dma_step: 1 0xcfe66240 0xf9813a0 0xf9812a0 Mai 11 18:29:36.204992 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 11 18:29:36.205051 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:36.205109 spare kernel: mv_cesa_tdma_process: 0 0xf981380 Mai 11 18:29:36.205165 spare kernel: mv_cesa_tdma_process: 1 0xf9812a0 Mai 11 18:29:36.205223 spare kernel: mv_cesa_tdma_process: 0 0 0xcfc0e710 Mai 11 18:29:36.205281 spare kernel: mv_cesa_dma_step: 0 0xc17cbc40 0xf9813e0 0xf9810c0 Mai 11 18:29:36.205342 spare kernel: mv_cesa_tdma_process: 1 0 0xcfe66210 Mai 11 18:29:36.205398 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 11 18:29:36.205454 spare kernel: mv_cesa_dma_step: 1 0xc6670840 0xf9814e0 0xf9815a0 Mai 11 18:29:36.205513 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 11 18:29:36.205568 spare kernel: mv_cesa_tdma_process: 0 0xf9810c0 Mai 11 18:29:36.205631 spare kernel: mv_cesa_tdma_process: 1 0xf9815a0 Mai 11 18:29:36.205691 spare kernel: mv_cesa_ahash_complete: 1 0xc6670800 Mai 11 18:29:36.205748 spare kernel: mv_cesa_ahash_complete: 0 0xc17cbc00 Mai 11 18:29:36.205804 spare kernel: mv_cesa_tdma_process: 1 0 0xc6670800 Mai 11 18:29:36.205861 spare kernel: mv_cesa_tdma_process: 0 0 0xc17cbc00 Mai 11 18:29:36.205918 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc6670800 Mai 11 18:29:36.205974 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc17cbc00 Mai 11 18:29:36.213914 spare kernel: mv_cesa_dma_step: 0 0xcfc0e740 0xf9815a0 0xf9812a0 Mai 11 18:29:36.213983 spare kernel: mv_cesa_dma_step: 1 0xcf8ec040 0xf9810c0 0xf981100 Mai 11 18:29:36.302434 spare kernel: mv_cesa_ahash_queue_req: 1 0xc6670800 62 1 Mai 11 18:29:36.302519 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 11 18:29:36.302590 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:36.302650 spare kernel: mv_cesa_tdma_process: 0 0xf9812a0 Mai 11 18:29:36.302709 spare kernel: mv_cesa_tdma_process: 1 0xf981100 Mai 11 18:29:36.302770 spare kernel: mv_cesa_tdma_process: 0 0 0xcfc0e710 Mai 11 18:29:36.302831 spare kernel: mv_cesa_tdma_process: 1 0 0xcf8ec010 Mai 11 18:29:36.302890 spare kernel: mv_cesa_ahash_queue_req: 0 0xc17cbc00 64 1 Mai 11 18:29:36.302949 spare kernel: mv_cesa_dma_step: 1 0xcfe66240 0xf981320 0xf9813a0 Mai 11 18:29:36.303013 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:36.303071 spare kernel: mv_cesa_dma_step: 0 0xc17cbc40 0xf9812a0 0xf981300 Mai 11 18:29:36.303134 spare kernel: mv_cesa_tdma_process: 1 0xf9813a0 Mai 11 18:29:36.303191 spare kernel: mv_cesa_tdma_process: 1 0 0xcfe66210 Mai 11 18:29:36.303256 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 11 18:29:36.303313 spare kernel: mv_cesa_dma_step: 1 0xc6670840 0xf981380 0xf981360 Mai 11 18:29:36.303374 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 11 18:29:36.303431 spare kernel: mv_cesa_tdma_process: 0 0xf981300 Mai 11 18:29:36.303490 spare kernel: mv_cesa_tdma_process: 1 0xf981360 Mai 11 18:29:36.303549 spare kernel: mv_cesa_ahash_complete: 1 0xc6670800 Mai 11 18:29:36.303609 spare kernel: mv_cesa_ahash_complete: 0 0xc17cbc00 Mai 11 18:29:36.303669 spare kernel: mv_cesa_tdma_process: 1 0 0xc6670800 Mai 11 18:29:36.303731 spare kernel: mv_cesa_tdma_process: 0 0 0xc17cbc00 Mai 11 18:29:36.303789 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc6670800 Mai 11 18:29:36.377653 spare kernel: mv_cesa_dma_step: 1 0xcfc0e740 0xf981340 0xf981100 Mai 11 18:29:36.377743 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981360 0xf9813a0 Mai 11 18:29:36.377809 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc17cbc00 Mai 11 18:29:36.377868 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:36.377925 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 11 18:29:36.377983 spare kernel: mv_cesa_tdma_process: 0 0xf9813a0 Mai 11 18:29:36.378039 spare kernel: mv_cesa_tdma_process: 1 0xf981100 Mai 11 18:29:36.378096 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:36.378152 spare kernel: mv_cesa_tdma_process: 1 0 0xcfc0e710 Mai 11 18:29:36.378209 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf9813a0 0xf9815a0 Mai 11 18:29:36.378269 spare kernel: mv_cesa_dma_step: 1 0xcfe66240 0xf981100 0xf981340 Mai 11 18:29:36.378329 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:36.378392 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:36.378449 spare kernel: mv_cesa_tdma_process: 0 0xf9815a0 Mai 11 18:29:36.378506 spare kernel: mv_cesa_tdma_process: 1 0xf981340 Mai 11 18:29:36.378563 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:36.378620 spare kernel: mv_cesa_tdma_process: 1 0 0xcfe66210 Mai 11 18:29:36.378678 spare kernel: mv_cesa_ahash_queue_req: 0 0xc17cbc00 64 1 Mai 11 18:29:36.434826 spare kernel: mv_cesa_ahash_queue_req: 1 0xc6670800 62 1 Mai 11 18:29:36.434897 spare kernel: mv_cesa_dma_step: 0 0xc17cbc40 0xf9815a0 0xf981540 Mai 11 18:29:36.434961 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 11 18:29:36.435017 spare kernel: mv_cesa_dma_step: 1 0xc6670840 0xf981340 0xf981320 Mai 11 18:29:36.435079 spare kernel: mv_cesa_tdma_process: 0 0xf981540 Mai 11 18:29:36.435145 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 11 18:29:36.435204 spare kernel: mv_cesa_ahash_complete: 0 0xc17cbc00 Mai 11 18:29:36.435261 spare kernel: mv_cesa_tdma_process: 1 0xf981320 Mai 11 18:29:36.435321 spare kernel: mv_cesa_tdma_process: 0 0 0xc17cbc00 Mai 11 18:29:36.435378 spare kernel: mv_cesa_ahash_complete: 1 0xc6670800 Mai 11 18:29:36.435434 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc17cbc00 Mai 11 18:29:36.435492 spare kernel: mv_cesa_tdma_process: 1 0 0xc6670800 Mai 11 18:29:36.435550 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf981540 0xf981100 Mai 11 18:29:36.435610 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc6670800 Mai 11 18:29:36.461548 spare kernel: mv_cesa_dma_step: 1 0xcfe66240 0xf981320 0xf981380 Mai 11 18:29:36.461617 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:36.461682 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:36.461740 spare kernel: mv_cesa_tdma_process: 0 0xf981100 Mai 11 18:29:36.461797 spare kernel: mv_cesa_tdma_process: 1 0xf981380 Mai 11 18:29:36.461855 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:36.461911 spare kernel: mv_cesa_tdma_process: 1 0 0xcfe66210 Mai 11 18:29:36.554948 spare kernel: mv_cesa_ahash_queue_req: 1 0xc6670800 0 1 Mai 11 18:29:36.555020 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981380 0xf981320 Mai 11 18:29:36.555082 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:36.555139 spare kernel: mv_cesa_tdma_process: 0 0xf981320 Mai 11 18:29:36.555196 spare kernel: mv_cesa_dma_step: 1 0xc6670840 0xf9813a0 0xf9814e0 Mai 11 18:29:36.555256 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:36.555312 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 11 18:29:36.555375 spare kernel: mv_cesa_dma_step: 0 0xcfc0e740 0xf981320 0xf981380 Mai 11 18:29:36.555439 spare kernel: mv_cesa_tdma_process: 1 0xf9814e0 Mai 11 18:29:36.555496 spare kernel: mv_cesa_ahash_queue_req: 1 0xc17cbc00 22 0 Mai 11 18:29:36.555557 spare kernel: mv_cesa_ahash_complete: 1 0xc6670800 Mai 11 18:29:36.555614 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 11 18:29:36.555670 spare kernel: mv_cesa_tdma_process: 1 0 0xc6670800 Mai 11 18:29:36.555727 spare kernel: mv_cesa_dma_step: 1 0xc17cbc40 0xf981100 0xf981040 Mai 11 18:29:36.555786 spare kernel: mv_cesa_tdma_process: 0 0xf981380 Mai 11 18:29:36.555844 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc6670800 Mai 11 18:29:36.555901 spare kernel: mv_cesa_tdma_process: 0 0 0xcfc0e710 Mai 11 18:29:36.555961 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 11 18:29:36.556023 spare kernel: mv_cesa_dma_step: 0 0xcfc0e740 0xf981380 0xf9813c0 Mai 11 18:29:36.556086 spare kernel: mv_cesa_tdma_process: 1 0xf981040 Mai 11 18:29:36.556147 spare kernel: mv_cesa_ahash_complete: 1 0xc17cbc00 Mai 11 18:29:36.556204 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 11 18:29:36.556260 spare kernel: mv_cesa_tdma_process: 1 0 0xc17cbc00 Mai 11 18:29:36.556318 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc17cbc00 Mai 11 18:29:36.556375 spare kernel: mv_cesa_tdma_process: 0 0xf9813c0 Mai 11 18:29:36.612202 spare kernel: mv_cesa_ahash_queue_req: 1 0xc6670800 62 1 Mai 11 18:29:36.612269 spare kernel: mv_cesa_tdma_process: 0 0 0xcfc0e710 Mai 11 18:29:36.612327 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf9813c0 0xf981380 Mai 11 18:29:36.612395 spare kernel: mv_cesa_dma_step: 1 0xc6670840 0xf981040 0xf9815a0 Mai 11 18:29:36.612457 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:36.612521 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 11 18:29:36.612579 spare kernel: mv_cesa_tdma_process: 0 0xf981380 Mai 11 18:29:36.612638 spare kernel: mv_cesa_tdma_process: 1 0xf9815a0 Mai 11 18:29:36.612696 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:36.612751 spare kernel: mv_cesa_ahash_complete: 1 0xc6670800 Mai 11 18:29:36.612809 spare kernel: mv_cesa_ahash_queue_req: 0 0xc17cbc00 0 1 Mai 11 18:29:36.612865 spare kernel: mv_cesa_tdma_process: 1 0 0xc6670800 Mai 11 18:29:36.612922 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc6670800 Mai 11 18:29:36.612979 spare kernel: mv_cesa_dma_step: 0 0xc17cbc40 0xf981380 0xf981400 Mai 11 18:29:36.668414 spare kernel: mv_cesa_ahash_queue_req: 1 0xc6670800 0 1 Mai 11 18:29:36.668492 spare kernel: mv_cesa_int: 0 0x4ea1 0x80 Mai 11 18:29:36.668562 spare kernel: mv_cesa_dma_step: 1 0xc6670840 0xf9813c0 0xf9813a0 Mai 11 18:29:36.668626 spare kernel: mv_cesa_tdma_process: 0 0xf981400 Mai 11 18:29:36.668687 spare kernel: mv_cesa_int: 1 0x4ea1 0x80 Mai 11 18:29:36.668745 spare kernel: mv_cesa_ahash_complete: 0 0xc17cbc00 Mai 11 18:29:36.668801 spare kernel: mv_cesa_tdma_process: 0 0 0xc17cbc00 Mai 11 18:29:36.668859 spare kernel: mv_cesa_tdma_process: 1 0xf9813a0 Mai 11 18:29:36.668916 spare kernel: mv_cesa_dma_step: 0 0xcfc0e740 0xf9815a0 0xf9814e0 Mai 11 18:29:36.668981 spare kernel: mv_cesa_ahash_complete: 1 0xc6670800 Mai 11 18:29:36.669039 spare kernel: mv_cesa_ahash_req_cleanup: 0 0xc17cbc00 Mai 11 18:29:36.669096 spare kernel: mv_cesa_tdma_process: 1 0 0xc6670800 Mai 11 18:29:36.669164 spare kernel: mv_cesa_int: 0 0x4ea8 0x80 Mai 11 18:29:36.669224 spare kernel: mv_cesa_ahash_req_cleanup: 1 0xc6670800 Mai 11 18:29:36.736571 spare kernel: alg: ahash: mv-md5 test failed (wrong result) on test vector 5, cfg="init+update+update+final two even splits" Mai 11 18:29:36.736663 spare kernel: mv_cesa_tdma_process: 0 0xf9814e0 Mai 11 18:29:36.736728 spare kernel: mv_cesa_tdma_process: 0 0 0xcfc0e710 Mai 11 18:29:36.736786 spare kernel: alg: self-tests for md5 using mv-md5 failed (rc=-22) Mai 11 18:29:36.736848 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf9814e0 0xf981100 Mai 11 18:29:36.736908 spare kernel: ------------[ cut here ]------------ Mai 11 18:29:36.736967 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:36.737024 spare kernel: WARNING: CPU: 1 PID: 386 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614 Mai 11 18:29:36.737098 spare kernel: mv_cesa_tdma_process: 0 0xf981100 Mai 11 18:29:36.737157 spare kernel: alg: self-tests for md5 using mv-md5 failed (rc=-22) Mai 11 18:29:36.737217 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:36.737274 spare kernel: Modules linked in: marvell_cesa Mai 11 18:29:36.737335 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf981100 0xf981040 Mai 11 18:29:36.737397 spare kernel: libdes libaes Mai 11 18:29:36.737455 spare kernel: CPU: 1 UID: 0 PID: 386 Comm: cryptomgr_test Tainted: G W 6.15.0-rc5+ #7 NONE Mai 11 18:29:36.737516 spare kernel: Tainted: [W]=WARN Mai 11 18:29:36.737575 spare kernel: Hardware name: Marvell Armada 380/385 (Device Tree) Mai 11 18:29:36.737634 spare kernel: Call trace: Mai 11 18:29:36.737698 spare kernel: unwind_backtrace from show_stack+0x10/0x14 Mai 11 18:29:36.737757 spare kernel: show_stack from dump_stack_lvl+0x50/0x64 Mai 11 18:29:36.737814 spare kernel: dump_stack_lvl from __warn+0x7c/0xd4 Mai 11 18:29:36.737872 spare kernel: __warn from warn_slowpath_fmt+0x110/0x16c Mai 11 18:29:36.737929 spare kernel: warn_slowpath_fmt from alg_test+0x5f0/0x614 Mai 11 18:29:36.737985 spare kernel: alg_test from cryptomgr_test+0x18/0x38 Mai 11 18:29:36.738042 spare kernel: cryptomgr_test from kthread+0xe8/0x204 Mai 11 18:29:36.738098 spare kernel: kthread from ret_from_fork+0x14/0x28 Mai 11 18:29:36.738155 spare kernel: Exception stack(0xf0a71fb0 to 0xf0a71ff8) Mai 11 18:29:36.738215 spare kernel: 1fa0: 00000000 00000000 00000000 00000000 Mai 11 18:29:36.738275 spare kernel: 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Mai 11 18:29:36.738336 spare kernel: 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 Mai 11 18:29:36.738402 spare kernel: ---[ end trace 0000000000000000 ]--- Mai 11 18:29:36.738461 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:36.800175 spare kernel: mv_cesa_dma_step: 1 0xcfc0e740 0xf981320 0xf9812a0 Mai 11 18:29:36.800252 spare kernel: mv_cesa_tdma_process: 0 0xf981040 Mai 11 18:29:36.800316 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 11 18:29:36.800375 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:36.800433 spare kernel: mv_cesa_tdma_process: 1 0xf9812a0 Mai 11 18:29:36.800490 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981040 0xf981420 Mai 11 18:29:36.800566 spare kernel: mv_cesa_tdma_process: 1 0 0xcfc0e710 Mai 11 18:29:36.800624 spare kernel: mv_cesa_dma_step: 1 0xcfc0e740 0xf9812a0 0xf9813c0 Mai 11 18:29:36.800693 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:36.800751 spare kernel: mv_cesa_int: 1 0x4ea8 0x80 Mai 11 18:29:36.800809 spare kernel: mv_cesa_tdma_process: 0 0xf981420 Mai 11 18:29:36.800869 spare kernel: mv_cesa_tdma_process: 1 0xf9813c0 Mai 11 18:29:36.800925 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:36.800982 spare kernel: mv_cesa_tdma_process: 1 0 0xcfc0e710 Mai 11 18:29:36.801038 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf981420 0xf981360 Mai 11 18:29:36.846933 spare kernel: alg: ahash: mv-hmac-md5 setkey failed on test vector 0; expected_error=0, actual_error=-80, flags=0x1 Mai 11 18:29:36.848465 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:36.852633 spare kernel: alg: self-tests for hmac(md5) using mv-hmac-md5 failed (rc=-80) Mai 11 18:29:36.852728 spare kernel: mv_cesa_tdma_process: 0 0xf981360 Mai 11 18:29:36.852792 spare kernel: ------------[ cut here ]------------ Mai 11 18:29:36.852856 spare kernel: WARNING: CPU: 1 PID: 390 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614 Mai 11 18:29:36.852931 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:36.852990 spare kernel: alg: self-tests for hmac(md5) using mv-hmac-md5 failed (rc=-80) Mai 11 18:29:36.853049 spare kernel: Modules linked in: marvell_cesa libdes libaes Mai 11 18:29:36.853108 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981360 0xf981340 Mai 11 18:29:36.853173 spare kernel: Mai 11 18:29:36.853234 spare kernel: CPU: 1 UID: 0 PID: 390 Comm: cryptomgr_test Tainted: G W 6.15.0-rc5+ #7 NONE Mai 11 18:29:36.853295 spare kernel: Tainted: [W]=WARN Mai 11 18:29:36.853356 spare kernel: Hardware name: Marvell Armada 380/385 (Device Tree) Mai 11 18:29:36.853430 spare kernel: Call trace: Mai 11 18:29:36.853488 spare kernel: unwind_backtrace from show_stack+0x10/0x14 Mai 11 18:29:36.853548 spare kernel: show_stack from dump_stack_lvl+0x50/0x64 Mai 11 18:29:36.853612 spare kernel: dump_stack_lvl from __warn+0x7c/0xd4 Mai 11 18:29:36.853672 spare kernel: __warn from warn_slowpath_fmt+0x110/0x16c Mai 11 18:29:36.853733 spare kernel: warn_slowpath_fmt from alg_test+0x5f0/0x614 Mai 11 18:29:36.853792 spare kernel: alg_test from cryptomgr_test+0x18/0x38 Mai 11 18:29:36.853851 spare kernel: cryptomgr_test from kthread+0xe8/0x204 Mai 11 18:29:36.853910 spare kernel: kthread from ret_from_fork+0x14/0x28 Mai 11 18:29:36.853968 spare kernel: Exception stack(0xf0a95fb0 to 0xf0a95ff8) Mai 11 18:29:36.854027 spare kernel: 5fa0: 00000000 00000000 00000000 00000000 Mai 11 18:29:36.854092 spare kernel: 5fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Mai 11 18:29:36.854153 spare kernel: 5fe0: 00000000 00000000 00000000 00000000 00000013 00000000 Mai 11 18:29:36.854213 spare kernel: ---[ end trace 0000000000000000 ]--- Mai 11 18:29:36.854272 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:36.881252 spare kernel: mv_cesa_dma_step: 1 0xcf8ec040 0xf981380 0xf9814e0 Mai 11 18:29:36.881341 spare kernel: mv_cesa_tdma_process: 0 0xf981340 Mai 11 18:29:36.881406 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:36.881467 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:36.881526 spare kernel: mv_cesa_tdma_process: 1 0xf9814e0 Mai 11 18:29:36.881595 spare kernel: alg: ahash: mv-sha1 test failed (wrong result) on test vector 4, cfg="import/export" Mai 11 18:29:36.881658 spare kernel: mv_cesa_tdma_process: 1 0 0xcf8ec010 Mai 11 18:29:36.917233 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf9814e0 0xf981380 Mai 11 18:29:36.917313 spare kernel: alg: self-tests for sha1 using mv-sha1 failed (rc=-22) Mai 11 18:29:36.917376 spare kernel: ------------[ cut here ]------------ Mai 11 18:29:36.917437 spare kernel: WARNING: CPU: 0 PID: 387 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614 Mai 11 18:29:36.917520 spare kernel: mv_cesa_dma_step: 1 0xcfe66240 0xf981340 0xf9815a0 Mai 11 18:29:36.917581 spare kernel: alg: self-tests for sha1 using mv-sha1 failed (rc=-22) Mai 11 18:29:36.917640 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:36.917698 spare kernel: Modules linked in: Mai 11 18:29:36.917756 spare kernel: mv_cesa_tdma_process: 1 0xf9815a0 Mai 11 18:29:36.917814 spare kernel: mv_cesa_tdma_process: 1 0 0xcfe66210 Mai 11 18:29:36.997921 spare kernel: marvell_cesa Mai 11 18:29:36.998011 spare kernel: mv_cesa_dma_step: 1 0xcfe66240 0xf9815a0 0xf981400 Mai 11 18:29:36.998078 spare kernel: libdes libaes Mai 11 18:29:36.998139 spare kernel: CPU: 0 UID: 0 PID: 387 Comm: cryptomgr_test Tainted: G W 6.15.0-rc5+ #7 NONE Mai 11 18:29:36.998204 spare kernel: Tainted: [W]=WARN Mai 11 18:29:36.998264 spare kernel: Hardware name: Marvell Armada 380/385 (Device Tree) Mai 11 18:29:36.998323 spare kernel: Call trace: Mai 11 18:29:36.998381 spare kernel: unwind_backtrace from show_stack+0x10/0x14 Mai 11 18:29:36.998439 spare kernel: show_stack from dump_stack_lvl+0x50/0x64 Mai 11 18:29:36.998497 spare kernel: dump_stack_lvl from __warn+0x7c/0xd4 Mai 11 18:29:36.998565 spare kernel: __warn from warn_slowpath_fmt+0x110/0x16c Mai 11 18:29:36.998625 spare kernel: warn_slowpath_fmt from alg_test+0x5f0/0x614 Mai 11 18:29:36.998686 spare kernel: alg_test from cryptomgr_test+0x18/0x38 Mai 11 18:29:36.998748 spare kernel: cryptomgr_test from kthread+0xe8/0x204 Mai 11 18:29:36.998806 spare kernel: kthread from ret_from_fork+0x14/0x28 Mai 11 18:29:36.998864 spare kernel: Exception stack(0xf0a81fb0 to 0xf0a81ff8) Mai 11 18:29:36.998923 spare kernel: 1fa0: 00000000 00000000 00000000 00000000 Mai 11 18:29:36.998985 spare kernel: 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Mai 11 18:29:36.999047 spare kernel: 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 Mai 11 18:29:36.999112 spare kernel: ---[ end trace 0000000000000000 ]--- Mai 11 18:29:36.999174 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:36.999231 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:36.999288 spare kernel: mv_cesa_tdma_process: 1 0xf981400 Mai 11 18:29:36.999348 spare kernel: mv_cesa_tdma_process: 1 0 0xcfe66210 Mai 11 18:29:36.999405 spare kernel: mv_cesa_dma_step: 1 0xcfe66240 0xf981400 0xf9815a0 Mai 11 18:29:36.999465 spare kernel: mv_cesa_tdma_process: 0 0xf981380 Mai 11 18:29:36.999524 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:36.999583 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:36.999641 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf981380 0xf9814e0 Mai 11 18:29:36.999701 spare kernel: mv_cesa_tdma_process: 1 0xf9815a0 Mai 11 18:29:36.999764 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:36.999821 spare kernel: mv_cesa_tdma_process: 1 0 0xcfe66210 Mai 11 18:29:36.999877 spare kernel: mv_cesa_tdma_process: 0 0xf9814e0 Mai 11 18:29:36.999936 spare kernel: mv_cesa_dma_step: 1 0xcfe66240 0xf9815a0 0xf981400 Mai 11 18:29:36.999994 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:37.000052 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:37.034343 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf9814e0 0xf981380 Mai 11 18:29:37.034418 spare kernel: mv_cesa_tdma_process: 1 0xf981400 Mai 11 18:29:37.034479 spare kernel: mv_cesa_tdma_process: 1 0 0xcfe66210 Mai 11 18:29:37.034537 spare kernel: mv_cesa_dma_step: 1 0xcfe66240 0xf981400 0xf9815a0 Mai 11 18:29:37.034596 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:37.034663 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:37.034722 spare kernel: mv_cesa_tdma_process: 0 0xf981380 Mai 11 18:29:37.034780 spare kernel: mv_cesa_tdma_process: 1 0xf9815a0 Mai 11 18:29:37.034835 spare kernel: mv_cesa_tdma_process: 1 0 0xcfe66210 Mai 11 18:29:37.034890 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:37.034945 spare kernel: alg: ahash: mv-hmac-sha1 setkey failed on test vector 0; expected_error=0, actual_error=-80, flags=0x1 Mai 11 18:29:37.072918 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf981380 0xf9813a0 Mai 11 18:29:37.072990 spare kernel: alg: self-tests for hmac(sha1) using mv-hmac-sha1 failed (rc=-80) Mai 11 18:29:37.073053 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:37.073119 spare kernel: ------------[ cut here ]------------ Mai 11 18:29:37.073177 spare kernel: WARNING: CPU: 1 PID: 393 at crypto/testmgr.c:5871 alg_test+0x5f0/0x614 Mai 11 18:29:37.073237 spare kernel: mv_cesa_tdma_process: 0 0xf9813a0 Mai 11 18:29:37.073296 spare kernel: alg: self-tests for hmac(sha1) using mv-hmac-sha1 failed (rc=-80) Mai 11 18:29:37.073354 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:37.100166 spare kernel: Modules linked in: marvell_cesa Mai 11 18:29:37.100244 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf9813a0 0xf981540 Mai 11 18:29:37.100310 spare kernel: libdes libaes Mai 11 18:29:37.100371 spare kernel: CPU: 1 UID: 0 PID: 393 Comm: cryptomgr_test Tainted: G W 6.15.0-rc5+ #7 NONE Mai 11 18:29:37.100435 spare kernel: Tainted: [W]=WARN Mai 11 18:29:37.100501 spare kernel: Hardware name: Marvell Armada 380/385 (Device Tree) Mai 11 18:29:37.100570 spare kernel: Call trace: Mai 11 18:29:37.100630 spare kernel: unwind_backtrace from show_stack+0x10/0x14 Mai 11 18:29:37.100688 spare kernel: show_stack from dump_stack_lvl+0x50/0x64 Mai 11 18:29:37.100744 spare kernel: dump_stack_lvl from __warn+0x7c/0xd4 Mai 11 18:29:37.100803 spare kernel: __warn from warn_slowpath_fmt+0x110/0x16c Mai 11 18:29:37.100860 spare kernel: warn_slowpath_fmt from alg_test+0x5f0/0x614 Mai 11 18:29:37.100918 spare kernel: alg_test from cryptomgr_test+0x18/0x38 Mai 11 18:29:37.100976 spare kernel: cryptomgr_test from kthread+0xe8/0x204 Mai 11 18:29:37.101034 spare kernel: kthread from ret_from_fork+0x14/0x28 Mai 11 18:29:37.101091 spare kernel: Exception stack(0xf0ae5fb0 to 0xf0ae5ff8) Mai 11 18:29:37.101154 spare kernel: 5fa0: 00000000 00000000 00000000 00000000 Mai 11 18:29:37.101240 spare kernel: 5fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Mai 11 18:29:37.101306 spare kernel: 5fe0: 00000000 00000000 00000000 00000000 00000013 00000000 Mai 11 18:29:37.101367 spare kernel: ---[ end trace 0000000000000000 ]--- Mai 11 18:29:37.101423 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:37.101482 spare kernel: mv_cesa_dma_step: 1 0xcfe66240 0xf981380 0xf9811a0 Mai 11 18:29:37.101542 spare kernel: mv_cesa_tdma_process: 0 0xf981540 Mai 11 18:29:37.101602 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:37.101663 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:37.118772 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf981540 0xf981360 Mai 11 18:29:37.118851 spare kernel: mv_cesa_tdma_process: 1 0xf9811a0 Mai 11 18:29:37.118915 spare kernel: mv_cesa_tdma_process: 1 0 0xcfe66210 Mai 11 18:29:37.118982 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:37.119039 spare kernel: mv_cesa_dma_step: 1 0xcfe66240 0xf9811a0 0xf981100 Mai 11 18:29:37.119099 spare kernel: mv_cesa_tdma_process: 0 0xf981360 Mai 11 18:29:37.119156 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:37.148380 spare kernel: mv_cesa_dma_step: 0 0xcf8ec040 0xf981360 0xf981040 Mai 11 18:29:37.148451 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:37.148519 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:37.148577 spare kernel: mv_cesa_tdma_process: 1 0xf981100 Mai 11 18:29:37.148637 spare kernel: mv_cesa_tdma_process: 1 0 0xcfe66210 Mai 11 18:29:37.148692 spare kernel: mv_cesa_tdma_process: 0 0xf981040 Mai 11 18:29:37.148751 spare kernel: mv_cesa_dma_step: 1 0xcfe66240 0xf981100 0xf981400 Mai 11 18:29:37.148818 spare kernel: mv_cesa_tdma_process: 0 0 0xcf8ec010 Mai 11 18:29:40.311819 spare kernel: mv_cesa_int: 1 0x4eb2 0x80 Mai 11 18:29:40.311935 spare kernel: mv_cesa_tdma_process: 1 0xf981400 Mai 11 18:29:40.316187 spare kernel: mv_cesa_tdma_process: 1 0 0xcfe66210 Mai 11 18:29:40.339524 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981400 0xf9815a0 Mai 11 18:29:40.339602 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.339662 spare kernel: mv_cesa_tdma_process: 0 0xf9815a0 Mai 11 18:29:40.339722 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.339780 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf9815a0 0xf981420 Mai 11 18:29:40.353556 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.353646 spare kernel: mv_cesa_tdma_process: 0 0xf981420 Mai 11 18:29:40.353713 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.364058 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981420 0xf981040 Mai 11 18:29:40.364129 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.372200 spare kernel: mv_cesa_tdma_process: 0 0xf981040 Mai 11 18:29:40.372265 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.382710 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981040 0xf981420 Mai 11 18:29:40.382778 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.390850 spare kernel: mv_cesa_tdma_process: 0 0xf981420 Mai 11 18:29:40.390915 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.404528 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981420 0xf981040 Mai 11 18:29:40.404604 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.409508 spare kernel: mv_cesa_tdma_process: 0 0xf981040 Mai 11 18:29:40.409570 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.420015 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981040 0xf981420 Mai 11 18:29:40.420081 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.428154 spare kernel: mv_cesa_tdma_process: 0 0xf981420 Mai 11 18:29:40.428218 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.438662 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981420 0xf981040 Mai 11 18:29:40.438728 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.446800 spare kernel: mv_cesa_tdma_process: 0 0xf981040 Mai 11 18:29:40.446864 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.460527 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981040 0xf9815a0 Mai 11 18:29:40.460603 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.465457 spare kernel: mv_cesa_tdma_process: 0 0xf9815a0 Mai 11 18:29:40.465520 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.475963 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf9815a0 0xf981100 Mai 11 18:29:40.476031 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.484111 spare kernel: mv_cesa_tdma_process: 0 0xf981100 Mai 11 18:29:40.484177 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.494622 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981100 0xf981400 Mai 11 18:29:40.494692 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.502764 spare kernel: mv_cesa_tdma_process: 0 0xf981400 Mai 11 18:29:40.502839 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.516527 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981400 0xf981380 Mai 11 18:29:40.516596 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.521422 spare kernel: mv_cesa_tdma_process: 0 0xf981380 Mai 11 18:29:40.521484 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.531935 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981380 0xf981040 Mai 11 18:29:40.532002 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.540074 spare kernel: mv_cesa_tdma_process: 0 0xf981040 Mai 11 18:29:40.540144 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.550582 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981040 0xf981380 Mai 11 18:29:40.550650 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.558721 spare kernel: mv_cesa_tdma_process: 0 0xf981380 Mai 11 18:29:40.558784 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.572527 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981380 0xf981040 Mai 11 18:29:40.572601 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.577377 spare kernel: mv_cesa_tdma_process: 0 0xf981040 Mai 11 18:29:40.577451 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.584526 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981040 0xf981380 Mai 11 18:29:40.596035 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.596107 spare kernel: mv_cesa_tdma_process: 0 0xf981380 Mai 11 18:29:40.596167 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.604527 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981380 0xf981040 Mai 11 18:29:40.614683 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.614748 spare kernel: mv_cesa_tdma_process: 0 0xf981040 Mai 11 18:29:40.614807 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.620525 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981040 0xf981400 Mai 11 18:29:40.633330 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.633394 spare kernel: mv_cesa_tdma_process: 0 0xf981400 Mai 11 18:29:40.633454 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.643925 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981400 0xf9815a0 Mai 11 18:29:40.644008 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.652051 spare kernel: mv_cesa_tdma_process: 0 0xf9815a0 Mai 11 18:29:40.652119 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.660529 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf9815a0 0xf981100 Mai 11 18:29:40.666358 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.666425 spare kernel: mv_cesa_tdma_process: 0 0xf981100 Mai 11 18:29:40.675378 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.675447 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981100 0xf981420 Mai 11 18:29:40.689391 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.689458 spare kernel: mv_cesa_tdma_process: 0 0xf981420 Mai 11 18:29:40.689517 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.694027 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981420 0xf981040 Mai 11 18:29:40.708045 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.708111 spare kernel: mv_cesa_tdma_process: 0 0xf981040 Mai 11 18:29:40.708169 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.716528 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981040 0xf981420 Mai 11 18:29:40.726696 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.726762 spare kernel: mv_cesa_tdma_process: 0 0xf981420 Mai 11 18:29:40.726822 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.732525 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981420 0xf981040 Mai 11 18:29:40.745342 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.745409 spare kernel: mv_cesa_tdma_process: 0 0xf981040 Mai 11 18:29:40.745469 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.752527 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981040 0xf981420 Mai 11 18:29:40.763991 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.764058 spare kernel: mv_cesa_tdma_process: 0 0xf981420 Mai 11 18:29:40.764121 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.768628 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981420 0xf981040 Mai 11 18:29:40.788524 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.788592 spare kernel: mv_cesa_tdma_process: 0 0xf981040 Mai 11 18:29:40.788651 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.788708 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981040 0xf981100 Mai 11 18:29:40.805917 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.805983 spare kernel: mv_cesa_tdma_process: 0 0xf981100 Mai 11 18:29:40.806042 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.806098 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981100 0xf981400 Mai 11 18:29:40.824564 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.824629 spare kernel: mv_cesa_tdma_process: 0 0xf981400 Mai 11 18:29:40.824687 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.824745 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981400 0xf9815a0 Mai 11 18:29:40.843209 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.843283 spare kernel: mv_cesa_tdma_process: 0 0xf9815a0 Mai 11 18:29:40.843344 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.843404 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf9815a0 0xf981380 Mai 11 18:29:40.861854 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.861929 spare kernel: mv_cesa_tdma_process: 0 0xf981380 Mai 11 18:29:40.861992 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.862057 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981380 0xf981040 Mai 11 18:29:40.880502 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.880575 spare kernel: mv_cesa_tdma_process: 0 0xf981040 Mai 11 18:29:40.880635 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.880692 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981040 0xf981380 Mai 11 18:29:40.899151 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.899219 spare kernel: mv_cesa_tdma_process: 0 0xf981380 Mai 11 18:29:40.899277 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.899334 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981380 0xf981040 Mai 11 18:29:40.917794 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.917860 spare kernel: mv_cesa_tdma_process: 0 0xf981040 Mai 11 18:29:40.917919 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.917983 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981040 0xf981380 Mai 11 18:29:40.936435 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.936500 spare kernel: mv_cesa_tdma_process: 0 0xf981380 Mai 11 18:29:40.936570 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.936626 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981380 0xf981040 Mai 11 18:29:40.955079 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.955144 spare kernel: mv_cesa_tdma_process: 0 0xf981040 Mai 11 18:29:40.955202 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.955258 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981040 0xf9815a0 Mai 11 18:29:40.973722 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.973788 spare kernel: mv_cesa_tdma_process: 0 0xf9815a0 Mai 11 18:29:40.973847 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.973911 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf9815a0 0xf981100 Mai 11 18:29:40.992366 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:40.992432 spare kernel: mv_cesa_tdma_process: 0 0xf981100 Mai 11 18:29:40.992491 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:40.992557 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981100 0xf981400 Mai 11 18:29:41.011015 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:41.011080 spare kernel: mv_cesa_tdma_process: 0 0xf981400 Mai 11 18:29:41.011138 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:41.011195 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981400 0xf981420 Mai 11 18:29:41.029658 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:41.029723 spare kernel: mv_cesa_tdma_process: 0 0xf981420 Mai 11 18:29:41.029788 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:41.029847 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981420 0xf981040 Mai 11 18:29:41.048301 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:41.048367 spare kernel: mv_cesa_tdma_process: 0 0xf981040 Mai 11 18:29:41.048427 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:41.048486 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981040 0xf981420 Mai 11 18:29:41.066949 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:41.067014 spare kernel: mv_cesa_tdma_process: 0 0xf981420 Mai 11 18:29:41.067072 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:41.067128 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981420 0xf981040 Mai 11 18:29:41.085595 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:41.085668 spare kernel: mv_cesa_tdma_process: 0 0xf981040 Mai 11 18:29:41.085726 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:41.085783 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981040 0xf981420 Mai 11 18:29:41.104237 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:41.104304 spare kernel: mv_cesa_tdma_process: 0 0xf981420 Mai 11 18:29:41.104362 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:41.104417 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981420 0xf981040 Mai 11 18:29:41.122882 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:41.122953 spare kernel: mv_cesa_tdma_process: 0 0xf981040 Mai 11 18:29:41.123017 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:41.123075 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981040 0xf981400 Mai 11 18:29:41.141529 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:41.141610 spare kernel: mv_cesa_tdma_process: 0 0xf981400 Mai 11 18:29:41.141671 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:41.141728 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981400 0xf9815a0 Mai 11 18:29:41.160173 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:41.160239 spare kernel: mv_cesa_tdma_process: 0 0xf9815a0 Mai 11 18:29:41.160300 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:41.160356 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf9815a0 0xf981100 Mai 11 18:29:41.178820 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:41.178886 spare kernel: mv_cesa_tdma_process: 0 0xf981100 Mai 11 18:29:41.178945 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210 Mai 11 18:29:41.179002 spare kernel: mv_cesa_dma_step: 0 0xcfe66240 0xf981100 0xf981380 Mai 11 18:29:41.197465 spare kernel: mv_cesa_int: 0 0x4eb2 0x80 Mai 11 18:29:41.197575 spare kernel: mv_cesa_tdma_process: 0 0xf981380 Mai 11 18:29:41.197640 spare kernel: mv_cesa_tdma_process: 0 0 0xcfe66210
On Sun, May 11, 2025 at 06:39:43PM +0200, Klaus Kudielka wrote:
>
> Here the log after modprobe, with the new printk patch:
Thanks. I'm starting to get the feeling that the partial hash
is corrupted.
Please apply this patch on top of the printk patch to confirm this.
Cheers,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
--
diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c
index 6815eddc9068..230501fe843b 100644
--- a/drivers/crypto/marvell/cesa/hash.c
+++ b/drivers/crypto/marvell/cesa/hash.c
@@ -374,6 +374,12 @@ static void mv_cesa_ahash_complete(struct crypto_async_request *req)
memcpy(ahashreq->result, data, digsize);
} else {
+ struct {
+ u32 digest[8];
+ u64 len;
+ } state;
+
+ memcpy(state.digest, creq->state, digsize);
for (i = 0; i < digsize / 4; i++)
creq->state[i] = readl_relaxed(engine->regs +
CESA_IVDIG(i));
@@ -393,6 +399,21 @@ static void mv_cesa_ahash_complete(struct crypto_async_request *req)
for (i = 0; i < digsize / 4; i++)
result[i] = cpu_to_be32(creq->state[i]);
}
+ } else {
+ HASH_FBREQ_ON_STACK(fbreq, ahashreq);
+
+ crypto_ahash_import_core(fbreq, &state);
+ crypto_ahash_update(fbreq);
+ crypto_ahash_export_core(fbreq, &state);
+ if (memcmp(state.digest, creq->state, digsize)) {
+ pr_err("mv_cesa_ahash_complete partial hash mismatch\n");
+ print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET,
+ 16, 1,
+ state.digest, digsize, false);
+ print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET,
+ 16, 1,
+ creq->state, digsize, false);
+ }
}
}
On Tue, 2025-05-13 at 17:20 +0800, Herbert Xu wrote:
> On Sun, May 11, 2025 at 06:39:43PM +0200, Klaus Kudielka wrote:
> >
> > Here the log after modprobe, with the new printk patch:
>
> Thanks. I'm starting to get the feeling that the partial hash
> is corrupted.
>
> Please apply this patch on top of the printk patch to confirm this.
>
> Cheers,
drivers/crypto/marvell/cesa/hash.c: In function ‘mv_cesa_ahash_complete’:
drivers/crypto/marvell/cesa/hash.c:403:25: error: implicit declaration of function ‘HASH_FBREQ_ON_STACK’; did you mean ‘SHASH_DESC_ON_STACK’? [-Wimplicit-function-declaration]
403 | HASH_FBREQ_ON_STACK(fbreq, ahashreq);
| ^~~~~~~~~~~~~~~~~~~
| SHASH_DESC_ON_STACK
drivers/crypto/marvell/cesa/hash.c:403:45: error: ‘fbreq’ undeclared (first use in this function)
403 | HASH_FBREQ_ON_STACK(fbreq, ahashreq);
| ^~~~~
drivers/crypto/marvell/cesa/hash.c:403:45: note: each undeclared identifier is reported only once for each function it appears in
drivers/crypto/marvell/cesa/hash.c:405:25: error: implicit declaration of function ‘crypto_ahash_import_core’; did you mean ‘crypto_ahash_import’? [-Wimplicit-function-declaration]
405 | crypto_ahash_import_core(fbreq, &state);
| ^~~~~~~~~~~~~~~~~~~~~~~~
| crypto_ahash_import
CC [M] drivers/crypto/marvell/cesa/tdma.o
drivers/crypto/marvell/cesa/hash.c:407:25: error: implicit declaration of function ‘crypto_ahash_export_core’; did you mean ‘crypto_ahash_export’? [-Wimplicit-function-declaration]
407 | crypto_ahash_export_core(fbreq, &state);
| ^~~~~~~~~~~~~~~~~~~~~~~~
| crypto_ahash_export
make[9]: *** [scripts/Makefile.build:203: drivers/crypto/marvell/cesa/hash.o] Error 1
On Wed, May 14, 2025 at 07:12:52AM +0200, Klaus Kudielka wrote: > > drivers/crypto/marvell/cesa/hash.c: In function ‘mv_cesa_ahash_complete’: > drivers/crypto/marvell/cesa/hash.c:403:25: error: implicit declaration of function ‘HASH_FBREQ_ON_STACK’; did you mean ‘SHASH_DESC_ON_STACK’? [-Wimplicit-function-declaration] > 403 | HASH_FBREQ_ON_STACK(fbreq, ahashreq); > | ^~~~~~~~~~~~~~~~~~~ > | SHASH_DESC_ON_STACK > drivers/crypto/marvell/cesa/hash.c:403:45: error: ‘fbreq’ undeclared (first use in this function) > 403 | HASH_FBREQ_ON_STACK(fbreq, ahashreq); > | ^~~~~ > drivers/crypto/marvell/cesa/hash.c:403:45: note: each undeclared identifier is reported only once for each function it appears in > drivers/crypto/marvell/cesa/hash.c:405:25: error: implicit declaration of function ‘crypto_ahash_import_core’; did you mean ‘crypto_ahash_import’? [-Wimplicit-function-declaration] > 405 | crypto_ahash_import_core(fbreq, &state); > | ^~~~~~~~~~~~~~~~~~~~~~~~ > | crypto_ahash_import > CC [M] drivers/crypto/marvell/cesa/tdma.o > drivers/crypto/marvell/cesa/hash.c:407:25: error: implicit declaration of function ‘crypto_ahash_export_core’; did you mean ‘crypto_ahash_export’? [-Wimplicit-function-declaration] > 407 | crypto_ahash_export_core(fbreq, &state); > | ^~~~~~~~~~~~~~~~~~~~~~~~ > | crypto_ahash_export > make[9]: *** [scripts/Makefile.build:203: drivers/crypto/marvell/cesa/hash.o] Error 1 Sorry, should've mentioned that this goes on top of the current cryptodev tree: https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git/log/ Cheers, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On Wed, 2025-05-14 at 13:14 +0800, Herbert Xu wrote: > > Sorry, should've mentioned that this goes on top of the current > cryptodev tree: > > https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git/log/ > Okay, so now I have two printk patches on top of the current cryptodev tree. I have enabled CRYPTO_SELFTESTS - Three successful reboot / modprobe marvell-cesa. All self-tests passed. - But the whole self-tests sequence now take approx. 2 minutes, instead of 15 seconds with plain v6.15-rc5 - And the journal gets huge. 24k lines. I am attaching a gzipped version, hope this works. Best regards, Klaus
On Thu, May 15, 2025 at 07:53:03PM +0200, Klaus Kudielka wrote: > > Okay, so now I have two printk patches on top of the current cryptodev tree. > > I have enabled CRYPTO_SELFTESTS > > - Three successful reboot / modprobe marvell-cesa. All self-tests passed. > - But the whole self-tests sequence now take approx. 2 minutes, instead of 15 seconds with plain v6.15-rc5 > - And the journal gets huge. 24k lines. I am attaching a gzipped version, hope this works. Something doesn't look right. There are zero ahash lines in your dmesg. IOW all the output was from skcipher tests alone. That could explain why ahash appears to be working. What does /proc/crypto show after boot-up? Do the cesa ahash algorithms show up as tested in there? Cheers, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On Fri, 2025-05-16 at 12:12 +0800, Herbert Xu wrote: > > Something doesn't look right. There are zero ahash lines in your > dmesg. IOW all the output was from skcipher tests alone. > > That could explain why ahash appears to be working. > > What does /proc/crypto show after boot-up? Do the cesa ahash > algorithms show up as tested in there? > > Cheers, Plain cryptodev tree, marvell-cesa as module. Directly after boot, only the builtin crc32c-generic shows up. After loading the module, the marvell-cesa ahash show up with "selftest : passed". But whether they REALLY were tested, I can't say. # cat /proc/crypto name : crc32c driver : crc32c-generic module : kernel priority : 100 refcnt : 1 selftest : passed internal : no type : shash blocksize : 1 digestsize : 4 # modprobe marvell-cesa # cat /proc/crypto name : hmac(sha256) driver : mv-hmac-sha256 module : marvell_cesa priority : 0 refcnt : 1 selftest : passed internal : no type : ahash async : yes blocksize : 64 digestsize : 32 name : hmac(sha1) driver : mv-hmac-sha1 module : marvell_cesa priority : 0 refcnt : 1 selftest : passed internal : no type : ahash async : yes blocksize : 64 digestsize : 20 name : hmac(md5) driver : mv-hmac-md5 module : marvell_cesa priority : 0 refcnt : 1 selftest : passed internal : no type : ahash async : yes blocksize : 64 digestsize : 16 name : sha256 driver : mv-sha256 module : marvell_cesa priority : 0 refcnt : 1 selftest : passed internal : no type : ahash async : yes blocksize : 64 digestsize : 32 name : sha1 driver : mv-sha1 module : marvell_cesa priority : 0 refcnt : 1 selftest : passed internal : no type : ahash async : yes blocksize : 64 digestsize : 20 name : md5 driver : mv-md5 module : marvell_cesa priority : 0 refcnt : 1 selftest : passed internal : no type : ahash async : yes blocksize : 64 digestsize : 16 name : cbc(aes) driver : mv-cbc-aes module : marvell_cesa priority : 300 refcnt : 1 selftest : passed internal : no type : skcipher async : yes blocksize : 16 min keysize : 16 max keysize : 32 ivsize : 16 chunksize : 16 walksize : 16 statesize : 0 name : ecb(aes) driver : mv-ecb-aes module : marvell_cesa priority : 300 refcnt : 1 selftest : passed internal : no type : skcipher async : yes blocksize : 16 min keysize : 16 max keysize : 32 ivsize : 0 chunksize : 16 walksize : 16 statesize : 0 name : cbc(des3_ede) driver : mv-cbc-des3-ede module : marvell_cesa priority : 300 refcnt : 1 selftest : passed internal : no type : skcipher async : yes blocksize : 8 min keysize : 24 max keysize : 24 ivsize : 8 chunksize : 8 walksize : 8 statesize : 0 name : ecb(des3_ede) driver : mv-ecb-des3-ede module : marvell_cesa priority : 300 refcnt : 1 selftest : passed internal : no type : skcipher async : yes blocksize : 8 min keysize : 24 max keysize : 24 ivsize : 0 chunksize : 8 walksize : 8 statesize : 0 name : cbc(des) driver : mv-cbc-des module : marvell_cesa priority : 300 refcnt : 1 selftest : passed internal : no type : skcipher async : yes blocksize : 8 min keysize : 8 max keysize : 8 ivsize : 8 chunksize : 8 walksize : 8 statesize : 0 name : ecb(des) driver : mv-ecb-des module : marvell_cesa priority : 300 refcnt : 1 selftest : passed internal : no type : skcipher async : yes blocksize : 8 min keysize : 8 max keysize : 8 ivsize : 0 chunksize : 8 walksize : 8 statesize : 0 name : crc32c driver : crc32c-generic module : kernel priority : 100 refcnt : 1 selftest : passed internal : no type : shash blocksize : 1 digestsize : 4 # dmesg | tail [ 4.883366] mv88e6085 f1072004.mdio-mii:10 lan2: configuring for phy/gmii link mode [ 4.884517] br0: port 3(lan4) entered blocking state [ 4.884527] br0: port 3(lan4) entered forwarding state [ 88.867746] marvell-cesa f1090000.crypto: CESA device successfully registered [ 89.034292] alg: skcipher: skipping comparison tests for mv-cbc-des because cbc(des-generic) is unavailable [ 89.045265] alg: skcipher: skipping comparison tests for mv-cbc-des3-ede because cbc(des3_ede-generic) is unavailable [ 89.052456] alg: skcipher: skipping comparison tests for mv-cbc-aes because cbc(aes-generic) is unavailable [ 89.099763] alg: skcipher: skipping comparison tests for mv-ecb-aes because ecb(aes-generic) is unavailable [ 89.099819] alg: skcipher: skipping comparison tests for mv-ecb-des3-ede because ecb(des3_ede-generic) is unavailable [ 89.099908] alg: skcipher: skipping comparison tests for mv-ecb-des because ecb(des-generic) is unavailable
Hello,
Plain v6.16-rc1 with marvell-cesa as module and CRYPTO_SELFTESTS enabled.
Identical behaviour as reported previously with the cryptodev tree (see below).
According to /proc/crypto, all marvell-cesa selftests (including ahash) appear to pass reliably again.
If we can trust the information in /proc/crypto, I would suggest to revert commit
e845d2399a00f866f287e0cefbd4fc7d8ef0d2f7 ("crypto: marvell/cesa - Disable hash algorithms")
Best regards, Klaus
On Fri, 2025-05-16 at 19:36 +0200, Klaus Kudielka wrote:
> On Fri, 2025-05-16 at 12:12 +0800, Herbert Xu wrote:
> >
> > Something doesn't look right. There are zero ahash lines in your
> > dmesg. IOW all the output was from skcipher tests alone.
> >
> > That could explain why ahash appears to be working.
> >
> > What does /proc/crypto show after boot-up? Do the cesa ahash
> > algorithms show up as tested in there?
> >
> > Cheers,
>
> Plain cryptodev tree, marvell-cesa as module.
> Directly after boot, only the builtin crc32c-generic shows up.
> After loading the module, the marvell-cesa ahash show up with "selftest : passed".
> But whether they REALLY were tested, I can't say.
>
> # cat /proc/crypto
> name : crc32c
> driver : crc32c-generic
> module : kernel
> priority : 100
> refcnt : 1
> selftest : passed
> internal : no
> type : shash
> blocksize : 1
> digestsize : 4
>
> # modprobe marvell-cesa
> # cat /proc/crypto
> name : hmac(sha256)
> driver : mv-hmac-sha256
> module : marvell_cesa
> priority : 0
> refcnt : 1
> selftest : passed
> internal : no
> type : ahash
> async : yes
> blocksize : 64
> digestsize : 32
>
> name : hmac(sha1)
> driver : mv-hmac-sha1
> module : marvell_cesa
> priority : 0
> refcnt : 1
> selftest : passed
> internal : no
> type : ahash
> async : yes
> blocksize : 64
> digestsize : 20
>
> name : hmac(md5)
> driver : mv-hmac-md5
> module : marvell_cesa
> priority : 0
> refcnt : 1
> selftest : passed
> internal : no
> type : ahash
> async : yes
> blocksize : 64
> digestsize : 16
>
> name : sha256
> driver : mv-sha256
> module : marvell_cesa
> priority : 0
> refcnt : 1
> selftest : passed
> internal : no
> type : ahash
> async : yes
> blocksize : 64
> digestsize : 32
>
> name : sha1
> driver : mv-sha1
> module : marvell_cesa
> priority : 0
> refcnt : 1
> selftest : passed
> internal : no
> type : ahash
> async : yes
> blocksize : 64
> digestsize : 20
>
> name : md5
> driver : mv-md5
> module : marvell_cesa
> priority : 0
> refcnt : 1
> selftest : passed
> internal : no
> type : ahash
> async : yes
> blocksize : 64
> digestsize : 16
>
> name : cbc(aes)
> driver : mv-cbc-aes
> module : marvell_cesa
> priority : 300
> refcnt : 1
> selftest : passed
> internal : no
> type : skcipher
> async : yes
> blocksize : 16
> min keysize : 16
> max keysize : 32
> ivsize : 16
> chunksize : 16
> walksize : 16
> statesize : 0
>
> name : ecb(aes)
> driver : mv-ecb-aes
> module : marvell_cesa
> priority : 300
> refcnt : 1
> selftest : passed
> internal : no
> type : skcipher
> async : yes
> blocksize : 16
> min keysize : 16
> max keysize : 32
> ivsize : 0
> chunksize : 16
> walksize : 16
> statesize : 0
>
> name : cbc(des3_ede)
> driver : mv-cbc-des3-ede
> module : marvell_cesa
> priority : 300
> refcnt : 1
> selftest : passed
> internal : no
> type : skcipher
> async : yes
> blocksize : 8
> min keysize : 24
> max keysize : 24
> ivsize : 8
> chunksize : 8
> walksize : 8
> statesize : 0
>
> name : ecb(des3_ede)
> driver : mv-ecb-des3-ede
> module : marvell_cesa
> priority : 300
> refcnt : 1
> selftest : passed
> internal : no
> type : skcipher
> async : yes
> blocksize : 8
> min keysize : 24
> max keysize : 24
> ivsize : 0
> chunksize : 8
> walksize : 8
> statesize : 0
>
> name : cbc(des)
> driver : mv-cbc-des
> module : marvell_cesa
> priority : 300
> refcnt : 1
> selftest : passed
> internal : no
> type : skcipher
> async : yes
> blocksize : 8
> min keysize : 8
> max keysize : 8
> ivsize : 8
> chunksize : 8
> walksize : 8
> statesize : 0
>
> name : ecb(des)
> driver : mv-ecb-des
> module : marvell_cesa
> priority : 300
> refcnt : 1
> selftest : passed
> internal : no
> type : skcipher
> async : yes
> blocksize : 8
> min keysize : 8
> max keysize : 8
> ivsize : 0
> chunksize : 8
> walksize : 8
> statesize : 0
>
> name : crc32c
> driver : crc32c-generic
> module : kernel
> priority : 100
> refcnt : 1
> selftest : passed
> internal : no
> type : shash
> blocksize : 1
> digestsize : 4
>
> # dmesg | tail
> [ 4.883366] mv88e6085 f1072004.mdio-mii:10 lan2: configuring for phy/gmii link mode
> [ 4.884517] br0: port 3(lan4) entered blocking state
> [ 4.884527] br0: port 3(lan4) entered forwarding state
> [ 88.867746] marvell-cesa f1090000.crypto: CESA device successfully registered
> [ 89.034292] alg: skcipher: skipping comparison tests for mv-cbc-des because cbc(des-generic) is unavailable
> [ 89.045265] alg: skcipher: skipping comparison tests for mv-cbc-des3-ede because cbc(des3_ede-generic) is unavailable
> [ 89.052456] alg: skcipher: skipping comparison tests for mv-cbc-aes because cbc(aes-generic) is unavailable
> [ 89.099763] alg: skcipher: skipping comparison tests for mv-ecb-aes because ecb(aes-generic) is unavailable
> [ 89.099819] alg: skcipher: skipping comparison tests for mv-ecb-des3-ede because ecb(des3_ede-generic) is unavailable
> [ 89.099908] alg: skcipher: skipping comparison tests for mv-ecb-des because ecb(des-generic) is unavailable
On Tue, Jun 17, 2025 at 07:32:28AM +0200, Klaus Kudielka wrote:
> Hello,
>
> Plain v6.16-rc1 with marvell-cesa as module and CRYPTO_SELFTESTS enabled.
> Identical behaviour as reported previously with the cryptodev tree (see below).
>
> According to /proc/crypto, all marvell-cesa selftests (including ahash) appear to pass reliably again.
>
> If we can trust the information in /proc/crypto, I would suggest to revert commit
> e845d2399a00f866f287e0cefbd4fc7d8ef0d2f7 ("crypto: marvell/cesa - Disable hash algorithms")
Corentin is still able to reproduce failures reliably. While
I have a patch that seems to reduce the failure rate for him it
is not yet a complete fix. There is also no full explanation of
why my patch even works to the extent that it does (the DMA memory
is supposed to be cache-coherent but perhaps it isn't).
So I think it is still premature at this point. There is also a
known problem with the hmac code where it fails to deal with zero-length
updates correctly.
Cheers,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On Thu, May 15, 2025 at 07:53:03PM +0200, Klaus Kudielka wrote: > On Wed, 2025-05-14 at 13:14 +0800, Herbert Xu wrote: > > > > Sorry, should've mentioned that this goes on top of the current > > cryptodev tree: > > > > https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git/log/ > > > > Okay, so now I have two printk patches on top of the current cryptodev tree. > > I have enabled CRYPTO_SELFTESTS > > - Three successful reboot / modprobe marvell-cesa. All self-tests passed. > - But the whole self-tests sequence now take approx. 2 minutes, instead of 15 seconds with plain v6.15-rc5 > - And the journal gets huge. 24k lines. I am attaching a gzipped version, hope this works. > > Best regards, Klaus CRYPTO_SELFTESTS now enables the full set of crypto self-tests, which for the past 6 years have been needed to be run anyway to properly validate the drivers; just developers often forgot to enable them because they were under a separate kconfig option that had a confusing name. So the longer test time is expected. It's unfortunate that it takes 2 minutes on the platform you're testing (on most platforms it's much faster), but presumably that is still okay since it's just a development option? People shouldn't be expecting to run these tests in production kernels. (But even if they are for some reason, the test time also remains configurable via kernel command-line options.) - Eric
On Thu, 2025-05-15 at 11:21 -0700, Eric Biggers wrote: > > CRYPTO_SELFTESTS now enables the full set of crypto self-tests, which for the > past 6 years have been needed to be run anyway to properly validate the drivers; > just developers often forgot to enable them because they were under a separate > kconfig option that had a confusing name. So the longer test time is expected. > It's unfortunate that it takes 2 minutes on the platform you're testing (on most > platforms it's much faster), but presumably that is still okay since it's just a > development option? People shouldn't be expecting to run these tests in > production kernels. (But even if they are for some reason, the test time also > remains configurable via kernel command-line options.) > > - Eric Probably it was only the massive amount of printk's which slowed the system down. With the plain cryptodev tree I now see: # modprobe marvell-cesa # dmesg | tail [ 4.949108] mv88e6085 f1072004.mdio-mii:10 lan4: Link is Up - 1Gbps/Full - flow control rx/tx [ 4.949199] br0: port 2(lan4) entered blocking state [ 4.949210] br0: port 2(lan4) entered forwarding state [ 46.915547] marvell-cesa f1090000.crypto: CESA device successfully registered [ 47.077931] alg: skcipher: skipping comparison tests for mv-cbc-des3-ede because cbc(des3_ede-generic) is unavailable [ 47.096665] alg: skcipher: skipping comparison tests for mv-cbc-aes because cbc(aes-generic) is unavailable [ 47.103401] alg: skcipher: skipping comparison tests for mv-cbc-des because cbc(des-generic) is unavailable [ 47.121374] alg: skcipher: skipping comparison tests for mv-ecb-des because ecb(des-generic) is unavailable [ 47.133757] alg: skcipher: skipping comparison tests for mv-ecb-des3-ede because ecb(des3_ede-generic) is unavailable [ 47.138474] alg: skcipher: skipping comparison tests for mv-ecb-aes because ecb(aes-generic) is unavailable # grep test /proc/crypto selftest : passed selftest : passed selftest : passed selftest : passed selftest : passed selftest : passed selftest : passed selftest : passed selftest : passed selftest : passed selftest : passed selftest : passed selftest : passed ...and the failing marvell-cesa self-tests seem to have magically disappeared. I now had five successful reboot / modprobe marvell-cesa in a row. Best regards, Klaus
On Thu, May 15, 2025 at 08:45:39PM +0200, Klaus Kudielka wrote: > > ...and the failing marvell-cesa self-tests seem to have magically disappeared. > I now had five successful reboot / modprobe marvell-cesa in a row. It's always unfortunate when a printk patch makes the problem go away :) Correntin, can you still reproduce the failures with the latest cryptodev tree? Thanks, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
Le Fri, May 16, 2025 at 07:25:49AM +0800, Herbert Xu a écrit : > On Thu, May 15, 2025 at 08:45:39PM +0200, Klaus Kudielka wrote: > > > > ...and the failing marvell-cesa self-tests seem to have magically disappeared. > > I now had five successful reboot / modprobe marvell-cesa in a row. > > It's always unfortunate when a printk patch makes the problem > go away :) > > Correntin, can you still reproduce the failures with the latest > cryptodev tree? Yes I have still errors: [ 12.798454] marvell-cesa f1090000.crypto: CESA device successfully registered [ 13.282357] alg: ahash: mv-sha256 test failed (wrong result) on test vector 1, cfg="random: inplace_one_sglist use_final src_divs=[<flush>42.5%@+4054, 57.95%@+4074]" [ 13.286675] alg: ahash: mv-sha1 test failed (wrong result) on test vector "random: psize=47 ksize=0", cfg="random: inplace_one_sglist use_final src_divs=[<reimport,nosimd>8.86%@+4058, 91.14%@+164] iv_offset=91 key_offset=58" [ 13.297245] alg: self-tests for sha256 using mv-sha256 failed (rc=-22) Setting prompt string to ['-+\\[ end trace \\w* \\]-+[^\\n]*\\r', '/ #', '~ #', 'sh-5.1#', 'Login timed out', 'Login incorrect'] [ 13.317153] ------------[ cut here ]------------ [ 13.317157] alg: self-tests for sha1 using mv-sha1 failed (rc=-22) [ 13.323696] WARNING: CPU: 1 PID: 149 at crypto/testmgr.c:5808 alg_test+0x42c/0x654 [ 13.328333] ------------[ cut here ]------------ [ 13.334524] alg: self-tests for sha256 using mv-sha256 failed (rc=-22) [ 13.342146] WARNING: CPU: 0 PID: 148 at crypto/testmgr.c:5808 alg_test+0x42c/0x654 [ 13.346745] Modules linked in: md5 marvell_cesa [ 13.353288] alg: self-tests for sha1 using mv-sha1 failed (rc=-22) [ 13.360875] libdes sfp [ 13.365414] Modules linked in: [ 13.371609] mdio_i2c [ 13.374059] md5 [ 13.377121] CPU: 1 UID: 0 PID: 149 Comm: cryptomgr_test Not tainted 6.15.0-rc5-g1bafd82d9a40 #105 NONE [ 13.377130] Hardware name: Marvell Armada 380/385 (Device Tree) [ 13.377133] Call trace: [ 13.377139] unwind_backtrace from show_stack+0x10/0x14 [ 13.377153] show_stack from dump_stack_lvl+0x54/0x68 [ 13.377164] dump_stack_lvl from __warn+0x80/0x124 [ 13.377177] __warn from warn_slowpath_fmt+0x124/0x18c [ 13.377190] warn_slowpath_fmt from alg_test+0x42c/0x654 [ 13.377201] alg_test from cryptomgr_test+0x18/0x38 [ 13.377208] cryptomgr_test from kthread+0x108/0x234 [ 13.377221] kthread from ret_from_fork+0x14/0x28 [ 13.377231] Exception stack(0xf0b11fb0 to 0xf0b11ff8) [ 13.377236] 1fa0: 00000000 00000000 00000000 00000000 [ 13.377241] 1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 13.377246] 1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 [ 13.377249] ---[ end trace 0000000000000000 ]---
On Fri, May 16, 2025 at 02:41:02PM +0200, Corentin Labbe wrote:
>
> Yes I have still errors:
Great! Please apply my debugging patch and see if it shines any
light on the problem.
Thanks,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
--
diff --git a/drivers/crypto/marvell/cesa/cesa.c b/drivers/crypto/marvell/cesa/cesa.c
index 9c21f5d835d2..fd7f43575cb2 100644
--- a/drivers/crypto/marvell/cesa/cesa.c
+++ b/drivers/crypto/marvell/cesa/cesa.c
@@ -127,6 +127,8 @@ static irqreturn_t mv_cesa_int(int irq, void *priv)
if (!(status & mask))
break;
+ pr_err("mv_cesa_int: %d 0x%x 0x%x\n", engine->id, status, mask);
+
/*
* TODO: avoid clearing the FPGA_INT_STATUS if this not
* relevant on some platforms.
diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c
index 2200bc6a034f..be8471a8ab22 100644
--- a/drivers/crypto/marvell/cesa/hash.c
+++ b/drivers/crypto/marvell/cesa/hash.c
@@ -396,6 +396,8 @@ static void mv_cesa_ahash_complete(struct crypto_async_request *req)
}
atomic_sub(ahashreq->nbytes, &engine->load);
+
+ pr_err("mv_cesa_ahash_complete: %d 0x%lx\n", engine->id, (unsigned long)ahashreq);
}
static void mv_cesa_ahash_prepare(struct crypto_async_request *req,
@@ -417,6 +419,8 @@ static void mv_cesa_ahash_req_cleanup(struct crypto_async_request *req)
struct ahash_request *ahashreq = ahash_request_cast(req);
struct mv_cesa_ahash_req *creq = ahash_request_ctx(ahashreq);
+ pr_err("mv_cesa_ahash_req_cleanup: %d 0x%lx\n", creq->base.engine->id, (unsigned long)ahashreq);
+
if (creq->last_req)
mv_cesa_ahash_last_cleanup(ahashreq);
@@ -783,6 +787,7 @@ static int mv_cesa_ahash_queue_req(struct ahash_request *req)
engine = mv_cesa_select_engine(req->nbytes);
mv_cesa_ahash_prepare(&req->base, engine);
+ pr_err("mv_cesa_ahash_queue_req: %d 0x%lx %d %d\n", engine->id, (unsigned long)req, req->nbytes, creq->last_req);
ret = mv_cesa_queue_req(&req->base, &creq->base);
if (mv_cesa_req_needs_cleanup(&req->base, ret))
diff --git a/drivers/crypto/marvell/cesa/tdma.c b/drivers/crypto/marvell/cesa/tdma.c
index 9b5fd957dde2..59be742c5a1c 100644
--- a/drivers/crypto/marvell/cesa/tdma.c
+++ b/drivers/crypto/marvell/cesa/tdma.c
@@ -47,6 +47,8 @@ void mv_cesa_dma_step(struct mv_cesa_req *dreq)
engine->chain_hw.last = dreq->chain.last;
spin_unlock_bh(&engine->lock);
+ pr_err("mv_cesa_dma_step: %d 0x%lx 0x%lx 0x%lx\n", engine->id, (unsigned long)dreq, (unsigned long)dreq->chain.first->cur_dma, (unsigned long)dreq->chain.last->cur_dma);
+
writel_relaxed(0, engine->regs + CESA_SA_CFG);
mv_cesa_set_int_mask(engine, CESA_SA_INT_ACC0_IDMA_DONE);
@@ -137,6 +139,7 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
int res = 0;
tdma_cur = readl(engine->regs + CESA_TDMA_CUR);
+ pr_err("mv_cesa_tdma_process: %d 0x%lx\n", engine->id, (unsigned long)tdma_cur);
for (tdma = engine->chain_hw.first; tdma; tdma = next) {
spin_lock_bh(&engine->lock);
@@ -186,6 +189,8 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
break;
}
+ pr_err("mv_cesa_tdma_process: %d %d 0x%lx\n", engine->id, res, (unsigned long)req);
+
/*
* Save the last request in error to engine->req, so that the core
* knows which request was faulty
diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c
index 6815eddc9068..230501fe843b 100644
--- a/drivers/crypto/marvell/cesa/hash.c
+++ b/drivers/crypto/marvell/cesa/hash.c
@@ -374,6 +374,12 @@ static void mv_cesa_ahash_complete(struct crypto_async_request *req)
memcpy(ahashreq->result, data, digsize);
} else {
+ struct {
+ u32 digest[8];
+ u64 len;
+ } state;
+
+ memcpy(state.digest, creq->state, digsize);
for (i = 0; i < digsize / 4; i++)
creq->state[i] = readl_relaxed(engine->regs +
CESA_IVDIG(i));
@@ -393,6 +399,21 @@ static void mv_cesa_ahash_complete(struct crypto_async_request *req)
for (i = 0; i < digsize / 4; i++)
result[i] = cpu_to_be32(creq->state[i]);
}
+ } else {
+ HASH_FBREQ_ON_STACK(fbreq, ahashreq);
+
+ crypto_ahash_import_core(fbreq, &state);
+ crypto_ahash_update(fbreq);
+ crypto_ahash_export_core(fbreq, &state);
+ if (memcmp(state.digest, creq->state, digsize)) {
+ pr_err("mv_cesa_ahash_complete partial hash mismatch\n");
+ print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET,
+ 16, 1,
+ state.digest, digsize, false);
+ print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET,
+ 16, 1,
+ creq->state, digsize, false);
+ }
}
}
Le Fri, May 16, 2025 at 08:45:11PM +0800, Herbert Xu a écrit : > On Fri, May 16, 2025 at 02:41:02PM +0200, Corentin Labbe wrote: > > > > Yes I have still errors: > > Great! Please apply my debugging patch and see if it shines any > light on the problem. > Hello Your patch didnt apply cleanly on cryptodev/master in tdma.c I have fixed at hand and the result is: http://kernel.montjoie.ovh/478852.log Regards
On Sat, May 17, 2025 at 01:24:44PM +0200, Corentin Labbe wrote: > > Your patch didnt apply cleanly on cryptodev/master in tdma.c > I have fixed at hand and the result is: > http://kernel.montjoie.ovh/478852.log Hah my debug patch was broken. It didn't take into account the partial block when recalculating the hash with the fallback. However, this seems to suggest that my hunch was incorrect. The partial hash wasn't being corrupted and it's actually the final calculation that was wrong. This could be good news. Because if it is a hardware bug causing this, then the final calculation can be easily worked around by turning the final hash into a partial update. Let me crank out a debugging patch for that. Thanks, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On Sun, May 18, 2025 at 03:58:58PM +0800, Herbert Xu wrote: > > Hah my debug patch was broken. It didn't take into account the > partial block when recalculating the hash with the fallback. > > However, this seems to suggest that my hunch was incorrect. The > partial hash wasn't being corrupted and it's actually the final > calculation that was wrong. > > This could be good news. Because if it is a hardware bug causing > this, then the final calculation can be easily worked around by > turning the final hash into a partial update. Further investigation shows that it's not so simple. While one hash (md5) was definitely a final hash, the sha ones aren't. Indeed the sha256 hash was definitely corrupted at the partial stage and correctly identified by my printk. So we'll have to look elsewhere for a solution. One thing that may or may not be a coincidence is that all the failed tests involve a partial block of data somewhere along the line. I might just be grasping at straws but perhaps the partial block is the key? Can you please try this patch to see if it makes a difference? Thanks, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt -- diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c index 6815eddc9068..7a50b31d94b3 100644 --- a/drivers/crypto/marvell/cesa/hash.c +++ b/drivers/crypto/marvell/cesa/hash.c @@ -532,6 +532,7 @@ mv_cesa_ahash_dma_add_cache(struct mv_cesa_tdma_chain *chain, return ret; memcpy(ahashdreq->cache, creq->cache, creq->cache_ptr); + wmb(); return mv_cesa_dma_add_data_transfer(chain, CESA_SA_DATA_SRAM_OFFSET,
On Wed, May 21, 2025 at 01:06:43PM +0800, Herbert Xu wrote: > > Can you please try this patch to see if it makes a difference? Actually, please try this one instead. Thanks, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt -- diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c index 6815eddc9068..8a9ea83372c9 100644 --- a/drivers/crypto/marvell/cesa/hash.c +++ b/drivers/crypto/marvell/cesa/hash.c @@ -15,6 +15,7 @@ #include <crypto/sha2.h> #include <linux/device.h> #include <linux/dma-mapping.h> +#include <linux/dma-map-ops.h> #include "cesa.h" @@ -532,6 +533,7 @@ mv_cesa_ahash_dma_add_cache(struct mv_cesa_tdma_chain *chain, return ret; memcpy(ahashdreq->cache, creq->cache, creq->cache_ptr); + arch_sync_dma_for_device(ahashdreq->cache_dma, creq->cache_ptr, DMA_TO_DEVICE); return mv_cesa_dma_add_data_transfer(chain, CESA_SA_DATA_SRAM_OFFSET,
Le Wed, May 21, 2025 at 05:16:50PM +0800, Herbert Xu a écrit : > On Wed, May 21, 2025 at 01:06:43PM +0800, Herbert Xu wrote: > > > > Can you please try this patch to see if it makes a difference? > > Actually, please try this one instead. > > Thanks, > -- > Email: Herbert Xu <herbert@gondor.apana.org.au> > Home Page: http://gondor.apana.org.au/~herbert/ > PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt > -- > diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c > index 6815eddc9068..8a9ea83372c9 100644 > --- a/drivers/crypto/marvell/cesa/hash.c > +++ b/drivers/crypto/marvell/cesa/hash.c > @@ -15,6 +15,7 @@ > #include <crypto/sha2.h> > #include <linux/device.h> > #include <linux/dma-mapping.h> > +#include <linux/dma-map-ops.h> > > #include "cesa.h" > > @@ -532,6 +533,7 @@ mv_cesa_ahash_dma_add_cache(struct mv_cesa_tdma_chain *chain, > return ret; > > memcpy(ahashdreq->cache, creq->cache, creq->cache_ptr); > + arch_sync_dma_for_device(ahashdreq->cache_dma, creq->cache_ptr, DMA_TO_DEVICE); > > return mv_cesa_dma_add_data_transfer(chain, > CESA_SA_DATA_SRAM_OFFSET, It fails to build with: ERROR: modpost: "arch_sync_dma_for_device" [drivers/crypto/marvell/cesa/marvell-cesa.ko] undefined!
On Wed, May 21, 2025 at 12:45:18PM +0200, Corentin Labbe wrote:
>
> It fails to build with:
> ERROR: modpost: "arch_sync_dma_for_device" [drivers/crypto/marvell/cesa/marvell-cesa.ko] undefined!
OK, what about this patch?
Thanks,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
--
diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c
index 6815eddc9068..5c46cd267789 100644
--- a/drivers/crypto/marvell/cesa/hash.c
+++ b/drivers/crypto/marvell/cesa/hash.c
@@ -49,8 +49,7 @@ mv_cesa_ahash_req_iter_next_op(struct mv_cesa_ahash_dma_iter *iter)
static inline int
mv_cesa_ahash_dma_alloc_cache(struct mv_cesa_ahash_dma_req *req, gfp_t flags)
{
- req->cache = dma_pool_alloc(cesa_dev->dma->cache_pool, flags,
- &req->cache_dma);
+ req->cache = kmalloc(CESA_MAX_HASH_BLOCK_SIZE, flags);
if (!req->cache)
return -ENOMEM;
@@ -63,8 +62,8 @@ mv_cesa_ahash_dma_free_cache(struct mv_cesa_ahash_dma_req *req)
if (!req->cache)
return;
- dma_pool_free(cesa_dev->dma->cache_pool, req->cache,
- req->cache_dma);
+ dma_unmap_single(cesa_dev->dev, req->cache_dma, CESA_MAX_HASH_BLOCK_SIZE, DMA_TO_DEVICE);
+ kfree(req->cache);
}
static int mv_cesa_ahash_dma_alloc_padding(struct mv_cesa_ahash_dma_req *req,
@@ -533,6 +532,13 @@ mv_cesa_ahash_dma_add_cache(struct mv_cesa_tdma_chain *chain,
memcpy(ahashdreq->cache, creq->cache, creq->cache_ptr);
+ ahashdreq->cache_dma = dma_map_single(cesa_dev->dev, ahashdreq->cache, CESA_MAX_HASH_BLOCK_SIZE, DMA_TO_DEVICE);
+ if (dma_mapping_error(cesa_dev->dev, ahashdreq->cache_dma)) {
+ dev_err(cesa_dev->dev, "dma_map_single failed\n");
+ kfree(ahashdreq->cache);
+ return -ENOMEM;
+ }
+
return mv_cesa_dma_add_data_transfer(chain,
CESA_SA_DATA_SRAM_OFFSET,
ahashdreq->cache_dma,
Le Wed, May 21, 2025 at 06:56:12PM +0800, Herbert Xu a écrit :
> On Wed, May 21, 2025 at 12:45:18PM +0200, Corentin Labbe wrote:
> >
> > It fails to build with:
> > ERROR: modpost: "arch_sync_dma_for_device" [drivers/crypto/marvell/cesa/marvell-cesa.ko] undefined!
>
> OK, what about this patch?
>
> Thanks,
> --
> Email: Herbert Xu <herbert@gondor.apana.org.au>
> Home Page: http://gondor.apana.org.au/~herbert/
> PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
> --
> diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c
> index 6815eddc9068..5c46cd267789 100644
> --- a/drivers/crypto/marvell/cesa/hash.c
> +++ b/drivers/crypto/marvell/cesa/hash.c
> @@ -49,8 +49,7 @@ mv_cesa_ahash_req_iter_next_op(struct mv_cesa_ahash_dma_iter *iter)
> static inline int
> mv_cesa_ahash_dma_alloc_cache(struct mv_cesa_ahash_dma_req *req, gfp_t flags)
> {
> - req->cache = dma_pool_alloc(cesa_dev->dma->cache_pool, flags,
> - &req->cache_dma);
> + req->cache = kmalloc(CESA_MAX_HASH_BLOCK_SIZE, flags);
> if (!req->cache)
> return -ENOMEM;
>
> @@ -63,8 +62,8 @@ mv_cesa_ahash_dma_free_cache(struct mv_cesa_ahash_dma_req *req)
> if (!req->cache)
> return;
>
> - dma_pool_free(cesa_dev->dma->cache_pool, req->cache,
> - req->cache_dma);
> + dma_unmap_single(cesa_dev->dev, req->cache_dma, CESA_MAX_HASH_BLOCK_SIZE, DMA_TO_DEVICE);
> + kfree(req->cache);
> }
>
> static int mv_cesa_ahash_dma_alloc_padding(struct mv_cesa_ahash_dma_req *req,
> @@ -533,6 +532,13 @@ mv_cesa_ahash_dma_add_cache(struct mv_cesa_tdma_chain *chain,
>
> memcpy(ahashdreq->cache, creq->cache, creq->cache_ptr);
>
> + ahashdreq->cache_dma = dma_map_single(cesa_dev->dev, ahashdreq->cache, CESA_MAX_HASH_BLOCK_SIZE, DMA_TO_DEVICE);
> + if (dma_mapping_error(cesa_dev->dev, ahashdreq->cache_dma)) {
> + dev_err(cesa_dev->dev, "dma_map_single failed\n");
> + kfree(ahashdreq->cache);
> + return -ENOMEM;
> + }
> +
> return mv_cesa_dma_add_data_transfer(chain,
> CESA_SA_DATA_SRAM_OFFSET,
> ahashdreq->cache_dma,
Hello
It still fail:
http://kernel.montjoie.ovh/479319.log
but I have still all old patch of you stacked, perhaps could you do a branch somewhere to be sure ?
current state is: http://kernel.montjoie.ovh/cesa.diff
Regards
On Wed, May 21, 2025 at 03:58:47PM +0200, Corentin Labbe wrote:
>
> It still fail:
> http://kernel.montjoie.ovh/479319.log
I think we've made progress. All the simple hashes have passed
and now we're only failing on hmac. So it looks it was the
coherent memory being incoherent.
Adding the mvebu maintainers to see if they can shed any light
on why memory returned by dma_alloc_coherent results in DMA
corruption but kmalloc + dma_map_single works correctly.
Also adding Christophe Hellwig as he was the last person to touch
mach-mvebu/coherency.c.
The code in question is in drivers/crypto/marvell/cesa/hash.c
mv_cesa_ahash_dma_add_cache:
/* This just calls dma_pool_alloc. */
ret = mv_cesa_ahash_dma_alloc_cache(ahashdreq, flags);
if (ret)
return ret;
memcpy(ahashdreq->cache, creq->cache, creq->cache_ptr);
/* Pass ahashdreq->cache_dma to hardware. */
At this point it appears that the DMA memory is corrupted and the
hardware returns a bogus hash. We have tried replacing dma_pool_alloc
with kmalloc + dma_map_single and it works correctly.
Corentin, could you also try the wmb patch and see if that works
without the dma_map_single patch?
https://lore.kernel.org/linux-crypto/aC1fY6IP-8MzVIbx@gondor.apana.org.au/
> but I have still all old patch of you stacked, perhaps could you do a branch somewhere to be sure ?
> current state is: http://kernel.montjoie.ovh/cesa.diff
You can drop everything except the last patch + the printk
patches.
So here is the latest debugging patch with dma_map_single on top
of cryptodev. Note that the partial hash mismatch code is buggy
but it doesn't matter because it still prints enough info for us
to interpret.
Thanks,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
--
diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c
index 6815eddc9068..5c46cd267789 100644
--- a/drivers/crypto/marvell/cesa/hash.c
+++ b/drivers/crypto/marvell/cesa/hash.c
@@ -49,8 +49,7 @@ mv_cesa_ahash_req_iter_next_op(struct mv_cesa_ahash_dma_iter *iter)
static inline int
mv_cesa_ahash_dma_alloc_cache(struct mv_cesa_ahash_dma_req *req, gfp_t flags)
{
- req->cache = dma_pool_alloc(cesa_dev->dma->cache_pool, flags,
- &req->cache_dma);
+ req->cache = kmalloc(CESA_MAX_HASH_BLOCK_SIZE, flags);
if (!req->cache)
return -ENOMEM;
@@ -63,8 +62,8 @@ mv_cesa_ahash_dma_free_cache(struct mv_cesa_ahash_dma_req *req)
if (!req->cache)
return;
- dma_pool_free(cesa_dev->dma->cache_pool, req->cache,
- req->cache_dma);
+ dma_unmap_single(cesa_dev->dev, req->cache_dma, CESA_MAX_HASH_BLOCK_SIZE, DMA_TO_DEVICE);
+ kfree(req->cache);
}
static int mv_cesa_ahash_dma_alloc_padding(struct mv_cesa_ahash_dma_req *req,
@@ -533,6 +532,13 @@ mv_cesa_ahash_dma_add_cache(struct mv_cesa_tdma_chain *chain,
memcpy(ahashdreq->cache, creq->cache, creq->cache_ptr);
+ ahashdreq->cache_dma = dma_map_single(cesa_dev->dev, ahashdreq->cache, CESA_MAX_HASH_BLOCK_SIZE, DMA_TO_DEVICE);
+ if (dma_mapping_error(cesa_dev->dev, ahashdreq->cache_dma)) {
+ dev_err(cesa_dev->dev, "dma_map_single failed\n");
+ kfree(ahashdreq->cache);
+ return -ENOMEM;
+ }
+
return mv_cesa_dma_add_data_transfer(chain,
CESA_SA_DATA_SRAM_OFFSET,
ahashdreq->cache_dma,
diff --git a/drivers/crypto/marvell/cesa/cesa.c b/drivers/crypto/marvell/cesa/cesa.c
index 9c21f5d835d2..fd7f43575cb2 100644
--- a/drivers/crypto/marvell/cesa/cesa.c
+++ b/drivers/crypto/marvell/cesa/cesa.c
@@ -127,6 +127,8 @@ static irqreturn_t mv_cesa_int(int irq, void *priv)
if (!(status & mask))
break;
+ pr_err("mv_cesa_int: %d 0x%x 0x%x\n", engine->id, status, mask);
+
/*
* TODO: avoid clearing the FPGA_INT_STATUS if this not
* relevant on some platforms.
diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c
index 6815eddc9068..ff0735aaed7d 100644
--- a/drivers/crypto/marvell/cesa/hash.c
+++ b/drivers/crypto/marvell/cesa/hash.c
@@ -397,6 +397,8 @@ static void mv_cesa_ahash_complete(struct crypto_async_request *req)
}
atomic_sub(ahashreq->nbytes, &engine->load);
+
+ pr_err("mv_cesa_ahash_complete: %d 0x%lx\n", engine->id, (unsigned long)ahashreq);
}
static void mv_cesa_ahash_prepare(struct crypto_async_request *req,
@@ -418,6 +420,8 @@ static void mv_cesa_ahash_req_cleanup(struct crypto_async_request *req)
struct ahash_request *ahashreq = ahash_request_cast(req);
struct mv_cesa_ahash_req *creq = ahash_request_ctx(ahashreq);
+ pr_err("mv_cesa_ahash_req_cleanup: %d 0x%lx\n", creq->base.engine->id, (unsigned long)ahashreq);
+
if (creq->last_req)
mv_cesa_ahash_last_cleanup(ahashreq);
@@ -796,6 +800,7 @@ static int mv_cesa_ahash_queue_req(struct ahash_request *req)
engine = mv_cesa_select_engine(req->nbytes);
mv_cesa_ahash_prepare(&req->base, engine);
+ pr_err("mv_cesa_ahash_queue_req: %d 0x%lx %d %d\n", engine->id, (unsigned long)req, req->nbytes, creq->last_req);
ret = mv_cesa_queue_req(&req->base, &creq->base);
if (mv_cesa_req_needs_cleanup(&req->base, ret))
diff --git a/drivers/crypto/marvell/cesa/tdma.c b/drivers/crypto/marvell/cesa/tdma.c
index 243305354420..55860b480dd6 100644
--- a/drivers/crypto/marvell/cesa/tdma.c
+++ b/drivers/crypto/marvell/cesa/tdma.c
@@ -47,6 +47,8 @@ void mv_cesa_dma_step(struct mv_cesa_req *dreq)
engine->chain_hw.last = dreq->chain.last;
spin_unlock_bh(&engine->lock);
+ pr_err("mv_cesa_dma_step: %d 0x%lx 0x%lx 0x%lx\n", engine->id, (unsigned long)dreq, (unsigned long)dreq->chain.first->cur_dma, (unsigned long)dreq->chain.last->cur_dma);
+
writel_relaxed(0, engine->regs + CESA_SA_CFG);
mv_cesa_set_int_mask(engine, CESA_SA_INT_ACC0_IDMA_DONE);
@@ -137,6 +139,7 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
int res = 0;
tdma_cur = readl(engine->regs + CESA_TDMA_CUR);
+ pr_err("mv_cesa_tdma_process: %d 0x%lx\n", engine->id, (unsigned long)tdma_cur);
for (tdma = engine->chain_hw.first; tdma; tdma = next) {
spin_lock_bh(&engine->lock);
@@ -186,6 +189,8 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
break;
}
+ pr_err("mv_cesa_tdma_process: %d %d 0x%lx\n", engine->id, res, (unsigned long)req);
+
/*
* Save the last request in error to engine->req, so that the core
* knows which request was faulty
diff --git a/crypto/asymmetric_keys/pkcs7_verify.c b/crypto/asymmetric_keys/pkcs7_verify.c
index f0d4ff3c20a8..53f71391a2c5 100644
--- a/crypto/asymmetric_keys/pkcs7_verify.c
+++ b/crypto/asymmetric_keys/pkcs7_verify.c
@@ -23,9 +23,7 @@ static int pkcs7_digest(struct pkcs7_message *pkcs7,
struct pkcs7_signed_info *sinfo)
{
struct public_key_signature *sig = sinfo->sig;
- struct crypto_shash *tfm;
- struct shash_desc *desc;
- size_t desc_size;
+ struct crypto_ahash *tfm;
int ret;
kenter(",%u,%s", sinfo->index, sinfo->sig->hash_algo);
@@ -40,27 +38,23 @@ static int pkcs7_digest(struct pkcs7_message *pkcs7,
/* Allocate the hashing algorithm we're going to need and find out how
* big the hash operational data will be.
*/
- tfm = crypto_alloc_shash(sinfo->sig->hash_algo, 0, 0);
+ tfm = crypto_alloc_ahash(sinfo->sig->hash_algo, 0, CRYPTO_ALG_ASYNC);
if (IS_ERR(tfm))
return (PTR_ERR(tfm) == -ENOENT) ? -ENOPKG : PTR_ERR(tfm);
- desc_size = crypto_shash_descsize(tfm) + sizeof(*desc);
- sig->digest_size = crypto_shash_digestsize(tfm);
+ sig->digest_size = crypto_ahash_digestsize(tfm);
ret = -ENOMEM;
sig->digest = kmalloc(sig->digest_size, GFP_KERNEL);
if (!sig->digest)
goto error_no_desc;
- desc = kzalloc(desc_size, GFP_KERNEL);
- if (!desc)
- goto error_no_desc;
-
- desc->tfm = tfm;
+ HASH_REQUEST_ON_STACK(req, tfm);
+ ahash_request_set_flags(req, CRYPTO_TFM_REQ_MAY_SLEEP, NULL, NULL);
/* Digest the message [RFC2315 9.3] */
- ret = crypto_shash_digest(desc, pkcs7->data, pkcs7->data_len,
- sig->digest);
+ ahash_request_set_virt(req, pkcs7->data, sig->digest, pkcs7->data_len);
+ ret = crypto_ahash_digest(req);
if (ret < 0)
goto error;
pr_devel("MsgDigest = [%*ph]\n", 8, sig->digest);
@@ -100,24 +94,26 @@ static int pkcs7_digest(struct pkcs7_message *pkcs7,
*/
memset(sig->digest, 0, sig->digest_size);
- ret = crypto_shash_init(desc);
+ ret = crypto_ahash_init(req);
if (ret < 0)
goto error;
tag = ASN1_CONS_BIT | ASN1_SET;
- ret = crypto_shash_update(desc, &tag, 1);
+ ahash_request_set_virt(req, &tag, NULL, 1);
+ ret = crypto_ahash_update(req);
if (ret < 0)
goto error;
- ret = crypto_shash_finup(desc, sinfo->authattrs,
- sinfo->authattrs_len, sig->digest);
+ ahash_request_set_virt(req, sinfo->authattrs, sig->digest,
+ sinfo->authattrs_len);
+ ret = crypto_ahash_finup(req);
if (ret < 0)
goto error;
pr_devel("AADigest = [%*ph]\n", 8, sig->digest);
}
error:
- kfree(desc);
+ ahash_request_free(req);
error_no_desc:
- crypto_free_shash(tfm);
+ crypto_free_ahash(tfm);
kleave(" = %d", ret);
return ret;
}On Thu, May 22, 2025 at 11:01:36AM +0800, Herbert Xu wrote: > > I think we've made progress. All the simple hashes have passed > and now we're only failing on hmac. So it looks it was the > coherent memory being incoherent. I've analysed the hmac errors and the good news is that they all appear to be caused by a genuine bug in the driver. When the final update is zero-length which the hardware can't handle, the driver fallback code is broken for hmac. I'm working on a fix. Cheers, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On Thu, May 22, 2025 at 11:01:36AM +0800, Herbert Xu wrote:
>
> So here is the latest debugging patch with dma_map_single on top
> of cryptodev. Note that the partial hash mismatch code is buggy
> but it doesn't matter because it still prints enough info for us
> to interpret.
Oops, I screwed up that patch. Here is the corrected version.
Thanks,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
--
diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c
index 6815eddc9068..5c46cd267789 100644
--- a/drivers/crypto/marvell/cesa/hash.c
+++ b/drivers/crypto/marvell/cesa/hash.c
@@ -49,8 +49,7 @@ mv_cesa_ahash_req_iter_next_op(struct mv_cesa_ahash_dma_iter *iter)
static inline int
mv_cesa_ahash_dma_alloc_cache(struct mv_cesa_ahash_dma_req *req, gfp_t flags)
{
- req->cache = dma_pool_alloc(cesa_dev->dma->cache_pool, flags,
- &req->cache_dma);
+ req->cache = kmalloc(CESA_MAX_HASH_BLOCK_SIZE, flags);
if (!req->cache)
return -ENOMEM;
@@ -63,8 +62,8 @@ mv_cesa_ahash_dma_free_cache(struct mv_cesa_ahash_dma_req *req)
if (!req->cache)
return;
- dma_pool_free(cesa_dev->dma->cache_pool, req->cache,
- req->cache_dma);
+ dma_unmap_single(cesa_dev->dev, req->cache_dma, CESA_MAX_HASH_BLOCK_SIZE, DMA_TO_DEVICE);
+ kfree(req->cache);
}
static int mv_cesa_ahash_dma_alloc_padding(struct mv_cesa_ahash_dma_req *req,
@@ -533,6 +532,13 @@ mv_cesa_ahash_dma_add_cache(struct mv_cesa_tdma_chain *chain,
memcpy(ahashdreq->cache, creq->cache, creq->cache_ptr);
+ ahashdreq->cache_dma = dma_map_single(cesa_dev->dev, ahashdreq->cache, CESA_MAX_HASH_BLOCK_SIZE, DMA_TO_DEVICE);
+ if (dma_mapping_error(cesa_dev->dev, ahashdreq->cache_dma)) {
+ dev_err(cesa_dev->dev, "dma_map_single failed\n");
+ kfree(ahashdreq->cache);
+ return -ENOMEM;
+ }
+
return mv_cesa_dma_add_data_transfer(chain,
CESA_SA_DATA_SRAM_OFFSET,
ahashdreq->cache_dma,
diff --git a/drivers/crypto/marvell/cesa/cesa.c b/drivers/crypto/marvell/cesa/cesa.c
index 9c21f5d835d2..fd7f43575cb2 100644
--- a/drivers/crypto/marvell/cesa/cesa.c
+++ b/drivers/crypto/marvell/cesa/cesa.c
@@ -127,6 +127,8 @@ static irqreturn_t mv_cesa_int(int irq, void *priv)
if (!(status & mask))
break;
+ pr_err("mv_cesa_int: %d 0x%x 0x%x\n", engine->id, status, mask);
+
/*
* TODO: avoid clearing the FPGA_INT_STATUS if this not
* relevant on some platforms.
diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c
index 6815eddc9068..ff0735aaed7d 100644
--- a/drivers/crypto/marvell/cesa/hash.c
+++ b/drivers/crypto/marvell/cesa/hash.c
@@ -397,6 +397,8 @@ static void mv_cesa_ahash_complete(struct crypto_async_request *req)
}
atomic_sub(ahashreq->nbytes, &engine->load);
+
+ pr_err("mv_cesa_ahash_complete: %d 0x%lx\n", engine->id, (unsigned long)ahashreq);
}
static void mv_cesa_ahash_prepare(struct crypto_async_request *req,
@@ -418,6 +420,8 @@ static void mv_cesa_ahash_req_cleanup(struct crypto_async_request *req)
struct ahash_request *ahashreq = ahash_request_cast(req);
struct mv_cesa_ahash_req *creq = ahash_request_ctx(ahashreq);
+ pr_err("mv_cesa_ahash_req_cleanup: %d 0x%lx\n", creq->base.engine->id, (unsigned long)ahashreq);
+
if (creq->last_req)
mv_cesa_ahash_last_cleanup(ahashreq);
@@ -796,6 +800,7 @@ static int mv_cesa_ahash_queue_req(struct ahash_request *req)
engine = mv_cesa_select_engine(req->nbytes);
mv_cesa_ahash_prepare(&req->base, engine);
+ pr_err("mv_cesa_ahash_queue_req: %d 0x%lx %d %d\n", engine->id, (unsigned long)req, req->nbytes, creq->last_req);
ret = mv_cesa_queue_req(&req->base, &creq->base);
if (mv_cesa_req_needs_cleanup(&req->base, ret))
diff --git a/drivers/crypto/marvell/cesa/tdma.c b/drivers/crypto/marvell/cesa/tdma.c
index 243305354420..55860b480dd6 100644
--- a/drivers/crypto/marvell/cesa/tdma.c
+++ b/drivers/crypto/marvell/cesa/tdma.c
@@ -47,6 +47,8 @@ void mv_cesa_dma_step(struct mv_cesa_req *dreq)
engine->chain_hw.last = dreq->chain.last;
spin_unlock_bh(&engine->lock);
+ pr_err("mv_cesa_dma_step: %d 0x%lx 0x%lx 0x%lx\n", engine->id, (unsigned long)dreq, (unsigned long)dreq->chain.first->cur_dma, (unsigned long)dreq->chain.last->cur_dma);
+
writel_relaxed(0, engine->regs + CESA_SA_CFG);
mv_cesa_set_int_mask(engine, CESA_SA_INT_ACC0_IDMA_DONE);
@@ -137,6 +139,7 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
int res = 0;
tdma_cur = readl(engine->regs + CESA_TDMA_CUR);
+ pr_err("mv_cesa_tdma_process: %d 0x%lx\n", engine->id, (unsigned long)tdma_cur);
for (tdma = engine->chain_hw.first; tdma; tdma = next) {
spin_lock_bh(&engine->lock);
@@ -186,6 +189,8 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
break;
}
+ pr_err("mv_cesa_tdma_process: %d %d 0x%lx\n", engine->id, res, (unsigned long)req);
+
/*
* Save the last request in error to engine->req, so that the core
* knows which request was faulty
diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c
index 6815eddc9068..230501fe843b 100644
--- a/drivers/crypto/marvell/cesa/hash.c
+++ b/drivers/crypto/marvell/cesa/hash.c
@@ -374,6 +374,12 @@ static void mv_cesa_ahash_complete(struct crypto_async_request *req)
memcpy(ahashreq->result, data, digsize);
} else {
+ struct {
+ u32 digest[8];
+ u64 len;
+ } state;
+
+ memcpy(state.digest, creq->state, digsize);
for (i = 0; i < digsize / 4; i++)
creq->state[i] = readl_relaxed(engine->regs +
CESA_IVDIG(i));
@@ -393,6 +399,21 @@ static void mv_cesa_ahash_complete(struct crypto_async_request *req)
for (i = 0; i < digsize / 4; i++)
result[i] = cpu_to_be32(creq->state[i]);
}
+ } else {
+ HASH_FBREQ_ON_STACK(fbreq, ahashreq);
+
+ crypto_ahash_import_core(fbreq, &state);
+ crypto_ahash_update(fbreq);
+ crypto_ahash_export_core(fbreq, &state);
+ if (memcmp(state.digest, creq->state, digsize)) {
+ pr_err("mv_cesa_ahash_complete partial hash mismatch\n");
+ print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET,
+ 16, 1,
+ state.digest, digsize, false);
+ print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET,
+ 16, 1,
+ creq->state, digsize, false);
+ }
}
}
Le Thu, May 22, 2025 at 03:38:20PM +0800, Herbert Xu a écrit : > On Thu, May 22, 2025 at 11:01:36AM +0800, Herbert Xu wrote: > > > > So here is the latest debugging patch with dma_map_single on top > > of cryptodev. Note that the partial hash mismatch code is buggy > > but it doesn't matter because it still prints enough info for us > > to interpret. > > Oops, I screwed up that patch. Here is the corrected version. > Hello Here is the result: http://kernel.montjoie.ovh/479404.log I have built by adding also your "crypto: marvell/cesa - Fix engine load inaccuracy" Thanks Regards
On Thu, May 22, 2025 at 10:07:54PM +0200, Corentin Labbe wrote:
>
> Here is the result:
> http://kernel.montjoie.ovh/479404.log
>
> I have built by adding also your "crypto: marvell/cesa - Fix engine load inaccuracy"
Please try this patch on top of the current mainline tree.
I've force-enabled the software finalisation code and switched it
over to kmalloc + dma_map_single.
Thanks,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
--
diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c
index 6815eddc9068..e5b1d6a9add5 100644
--- a/drivers/crypto/marvell/cesa/hash.c
+++ b/drivers/crypto/marvell/cesa/hash.c
@@ -49,8 +49,7 @@ mv_cesa_ahash_req_iter_next_op(struct mv_cesa_ahash_dma_iter *iter)
static inline int
mv_cesa_ahash_dma_alloc_cache(struct mv_cesa_ahash_dma_req *req, gfp_t flags)
{
- req->cache = dma_pool_alloc(cesa_dev->dma->cache_pool, flags,
- &req->cache_dma);
+ req->cache = kmalloc(CESA_MAX_HASH_BLOCK_SIZE, flags);
if (!req->cache)
return -ENOMEM;
@@ -63,18 +62,14 @@ mv_cesa_ahash_dma_free_cache(struct mv_cesa_ahash_dma_req *req)
if (!req->cache)
return;
- dma_pool_free(cesa_dev->dma->cache_pool, req->cache,
- req->cache_dma);
+ dma_unmap_single(cesa_dev->dev, req->cache_dma, CESA_MAX_HASH_BLOCK_SIZE, DMA_TO_DEVICE);
+ kfree(req->cache);
}
static int mv_cesa_ahash_dma_alloc_padding(struct mv_cesa_ahash_dma_req *req,
gfp_t flags)
{
- if (req->padding)
- return 0;
-
- req->padding = dma_pool_alloc(cesa_dev->dma->padding_pool, flags,
- &req->padding_dma);
+ req->padding = kmalloc(72, flags);
if (!req->padding)
return -ENOMEM;
@@ -86,9 +81,8 @@ static void mv_cesa_ahash_dma_free_padding(struct mv_cesa_ahash_dma_req *req)
if (!req->padding)
return;
- dma_pool_free(cesa_dev->dma->padding_pool, req->padding,
- req->padding_dma);
- req->padding = NULL;
+ dma_unmap_single(cesa_dev->dev, req->padding_dma, 72, DMA_TO_DEVICE);
+ kfree(req->padding);
}
static inline void mv_cesa_ahash_dma_last_cleanup(struct ahash_request *req)
@@ -533,6 +527,13 @@ mv_cesa_ahash_dma_add_cache(struct mv_cesa_tdma_chain *chain,
memcpy(ahashdreq->cache, creq->cache, creq->cache_ptr);
+ ahashdreq->cache_dma = dma_map_single(cesa_dev->dev, ahashdreq->cache, CESA_MAX_HASH_BLOCK_SIZE, DMA_TO_DEVICE);
+ if (dma_mapping_error(cesa_dev->dev, ahashdreq->cache_dma)) {
+ dev_err(cesa_dev->dev, "dma_map_single failed\n");
+ kfree(ahashdreq->cache);
+ return -ENOMEM;
+ }
+
return mv_cesa_dma_add_data_transfer(chain,
CESA_SA_DATA_SRAM_OFFSET,
ahashdreq->cache_dma,
@@ -556,7 +557,7 @@ mv_cesa_ahash_dma_last_req(struct mv_cesa_tdma_chain *chain,
* If the transfer is smaller than our maximum length, and we have
* some data outstanding, we can ask the engine to finish the hash.
*/
- if (creq->len <= CESA_SA_DESC_MAC_SRC_TOTAL_LEN_MAX && frag_len) {
+ if (0 && creq->len <= CESA_SA_DESC_MAC_SRC_TOTAL_LEN_MAX && frag_len) {
op = mv_cesa_dma_add_frag(chain, &creq->op_tmpl, frag_len,
flags);
if (IS_ERR(op))
@@ -588,6 +589,13 @@ mv_cesa_ahash_dma_last_req(struct mv_cesa_tdma_chain *chain,
trailerlen = mv_cesa_ahash_pad_req(creq, ahashdreq->padding);
+ ahashdreq->padding_dma = dma_map_single(cesa_dev->dev, ahashdreq->padding, 72, DMA_TO_DEVICE);
+ if (dma_mapping_error(cesa_dev->dev, ahashdreq->padding_dma)) {
+ dev_err(cesa_dev->dev, "dma_map_single failed\n");
+ kfree(ahashdreq->padding);
+ return ERR_PTR(-ENOMEM);
+ }
+
len = min(CESA_SA_SRAM_PAYLOAD_SIZE - frag_len, trailerlen);
if (len) {
ret = mv_cesa_dma_add_data_transfer(chain,
diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c
index 6815eddc9068..230501fe843b 100644
--- a/drivers/crypto/marvell/cesa/hash.c
+++ b/drivers/crypto/marvell/cesa/hash.c
@@ -374,6 +374,12 @@ static void mv_cesa_ahash_complete(struct crypto_async_request *req)
memcpy(ahashreq->result, data, digsize);
} else {
+ struct {
+ u32 digest[8];
+ u64 len;
+ } state;
+
+ memcpy(state.digest, creq->state, digsize);
for (i = 0; i < digsize / 4; i++)
creq->state[i] = readl_relaxed(engine->regs +
CESA_IVDIG(i));
@@ -393,6 +399,21 @@ static void mv_cesa_ahash_complete(struct crypto_async_request *req)
for (i = 0; i < digsize / 4; i++)
result[i] = cpu_to_be32(creq->state[i]);
}
+ } else {
+ HASH_FBREQ_ON_STACK(fbreq, ahashreq);
+
+ crypto_ahash_import_core(fbreq, &state);
+ crypto_ahash_update(fbreq);
+ crypto_ahash_export_core(fbreq, &state);
+ if (memcmp(state.digest, creq->state, digsize)) {
+ pr_err("mv_cesa_ahash_complete partial hash mismatch\n");
+ print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET,
+ 16, 1,
+ state.digest, digsize, false);
+ print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET,
+ 16, 1,
+ creq->state, digsize, false);
+ }
}
}
diff --git a/drivers/crypto/marvell/cesa/cesa.c b/drivers/crypto/marvell/cesa/cesa.c
index 9c21f5d835d2..fd7f43575cb2 100644
--- a/drivers/crypto/marvell/cesa/cesa.c
+++ b/drivers/crypto/marvell/cesa/cesa.c
@@ -127,6 +127,8 @@ static irqreturn_t mv_cesa_int(int irq, void *priv)
if (!(status & mask))
break;
+ pr_err("mv_cesa_int: %d 0x%x 0x%x\n", engine->id, status, mask);
+
/*
* TODO: avoid clearing the FPGA_INT_STATUS if this not
* relevant on some platforms.
diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c
index 6815eddc9068..ff0735aaed7d 100644
--- a/drivers/crypto/marvell/cesa/hash.c
+++ b/drivers/crypto/marvell/cesa/hash.c
@@ -397,6 +397,8 @@ static void mv_cesa_ahash_complete(struct crypto_async_request *req)
}
atomic_sub(ahashreq->nbytes, &engine->load);
+
+ pr_err("mv_cesa_ahash_complete: %d 0x%lx\n", engine->id, (unsigned long)ahashreq);
}
static void mv_cesa_ahash_prepare(struct crypto_async_request *req,
@@ -418,6 +420,8 @@ static void mv_cesa_ahash_req_cleanup(struct crypto_async_request *req)
struct ahash_request *ahashreq = ahash_request_cast(req);
struct mv_cesa_ahash_req *creq = ahash_request_ctx(ahashreq);
+ pr_err("mv_cesa_ahash_req_cleanup: %d 0x%lx\n", creq->base.engine->id, (unsigned long)ahashreq);
+
if (creq->last_req)
mv_cesa_ahash_last_cleanup(ahashreq);
@@ -796,6 +800,7 @@ static int mv_cesa_ahash_queue_req(struct ahash_request *req)
engine = mv_cesa_select_engine(req->nbytes);
mv_cesa_ahash_prepare(&req->base, engine);
+ pr_err("mv_cesa_ahash_queue_req: %d 0x%lx %d %d\n", engine->id, (unsigned long)req, req->nbytes, creq->last_req);
ret = mv_cesa_queue_req(&req->base, &creq->base);
if (mv_cesa_req_needs_cleanup(&req->base, ret))
diff --git a/drivers/crypto/marvell/cesa/tdma.c b/drivers/crypto/marvell/cesa/tdma.c
index 243305354420..55860b480dd6 100644
--- a/drivers/crypto/marvell/cesa/tdma.c
+++ b/drivers/crypto/marvell/cesa/tdma.c
@@ -47,6 +47,8 @@ void mv_cesa_dma_step(struct mv_cesa_req *dreq)
engine->chain_hw.last = dreq->chain.last;
spin_unlock_bh(&engine->lock);
+ pr_err("mv_cesa_dma_step: %d 0x%lx 0x%lx 0x%lx\n", engine->id, (unsigned long)dreq, (unsigned long)dreq->chain.first->cur_dma, (unsigned long)dreq->chain.last->cur_dma);
+
writel_relaxed(0, engine->regs + CESA_SA_CFG);
mv_cesa_set_int_mask(engine, CESA_SA_INT_ACC0_IDMA_DONE);
@@ -137,6 +139,7 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
int res = 0;
tdma_cur = readl(engine->regs + CESA_TDMA_CUR);
+ pr_err("mv_cesa_tdma_process: %d 0x%lx\n", engine->id, (unsigned long)tdma_cur);
for (tdma = engine->chain_hw.first; tdma; tdma = next) {
spin_lock_bh(&engine->lock);
@@ -186,6 +189,8 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
break;
}
+ pr_err("mv_cesa_tdma_process: %d %d 0x%lx\n", engine->id, res, (unsigned long)req);
+
/*
* Save the last request in error to engine->req, so that the core
* knows which request was faulty
Le Wed, May 28, 2025 at 05:58:13PM +0800, Herbert Xu a écrit : > On Thu, May 22, 2025 at 10:07:54PM +0200, Corentin Labbe wrote: > > > > Here is the result: > > http://kernel.montjoie.ovh/479404.log > > > > I have built by adding also your "crypto: marvell/cesa - Fix engine load inaccuracy" > > Please try this patch on top of the current mainline tree. > > I've force-enabled the software finalisation code and switched it > over to kmalloc + dma_map_single. > > Thanks, > -- Hello I have tried on top of torvalds/master 90b83efa6701656e02c86e7df2cb1765ea602d07 https://kernel.montjoie.ovh/479785.log Regards
On Thu, May 22, 2025 at 10:07:54PM +0200, Corentin Labbe wrote: > > Here is the result: > http://kernel.montjoie.ovh/479404.log So the corruptions have come back, although somewhat less than before as one algorithm managed to pass all the tests. At least we've proven that adding the printk's makes the errors a lot more frequent :) > I have built by adding also your "crypto: marvell/cesa - Fix engine load inaccuracy" That shouldn't affect things either way. So now all the corruptions are all on the final hash. Can you boot this a few times to see if the errors are always the same? I'm particularly interested to see if we've managed to crush the errors on the partial hashes or was it just pure luck. Intriguingly the one error that went away (sha256) was actually a partial hash corruption, and sha256 now passes all the tests. Thanks, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On Wed, May 21, 2025, at 11:16, Herbert Xu wrote:
> On Wed, May 21, 2025 at 01:06:43PM +0800, Herbert Xu wrote:
>>
>> Can you please try this patch to see if it makes a difference?
>
> Actually, please try this one instead.
>
>
> memcpy(ahashdreq->cache, creq->cache, creq->cache_ptr);
> + arch_sync_dma_for_device(ahashdreq->cache_dma, creq->cache_ptr,
> DMA_TO_DEVICE);
>
> return mv_cesa_dma_add_data_transfer(chain,
> CESA_SA_DATA_SRAM_OFFSET,
I did not see the entire background of the discussion, but would
point out that this is not supposed to work at all:
- arch_sync_dma_for_device() is not callable from drivers,
on a streaming mapping one would instead have to call
dma_sync_single_for_device() with the correct device.
- in the mainline kernel, the memory comes from a coherent
dma pool, and the devices that the driver binds (Marvell
Armada 32-bit) do not have cache-coherent DMA, so the
buffer itself is in an uncached page and you must never
do cache management operations on it.
If the allocation is changed from a coherent dma pool to
a dma_alloc_noncoherent() call, then the
dma_sync_single_for_device() would indeed be the correct
interface for passing the buffer to the device, but for
a coherent buffer, a simple 'dma_wmb()' as you suggested
earlier would be the right interface.
Depending on the size of the data, the streaming mapping
would likely be significantly faster than the coherent
dma pool object.
Arnd
On Wed, May 21, 2025 at 11:58:49AM +0200, Arnd Bergmann wrote: > > I did not see the entire background of the discussion, but would > point out that this is not supposed to work at all: We're trying to find out why this driver fails under concurrent load. It works perfectly if you do one request at a time, but when you hit it with load coming from both CPUs, it ends up corrupting the data. My suscipicion right now is DMA corruption. One common thread seems to be that if you only use dma_map_sg it works, but if dma_alloc_coherent memory is used then it is corrupted (this isn't proven yet, it's just what the printk patch was showing). Cheers, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On Wed, May 21, 2025, at 12:24, Herbert Xu wrote:
> On Wed, May 21, 2025 at 11:58:49AM +0200, Arnd Bergmann wrote:
>>
>> I did not see the entire background of the discussion, but would
>> point out that this is not supposed to work at all:
>
> We're trying to find out why this driver fails under concurrent
> load. It works perfectly if you do one request at a time, but
> when you hit it with load coming from both CPUs, it ends up
> corrupting the data.
Ok. Which SoC exactly is this on? Armada XP or Armada 385?
> My suscipicion right now is DMA corruption. One common thread
> seems to be that if you only use dma_map_sg it works, but if
> dma_alloc_coherent memory is used then it is corrupted (this
> isn't proven yet, it's just what the printk patch was showing).
I see. Just a few more ideas what it could be in case it's not
what you suspect:
- the SRAM gets mapped into kernel space using ioremap(), which
on Armada 375/38x uses MT_UNCACHED rather than MT_DEVICE as
a workaround for a possible deadlock on actual MMIO registers.
It's possible that the SRAM should be mapped using a different
map flag to ensure it's actually consistent. If a store is
posted to the SRAM, it may still be in flight at the time that
the DMA master looks at it.
- I see a lot of chaining of DMA descriptors, but no dma_wmb()
or spinlock. A dma_wmb() or stronger (wmb, dma_mb, mb)
is probably required between writing to a coherent descriptor
and making it visible from another one. A spinlock is
of course needed if you have multiple CPUs adding data
into a shared linked list (I think this one is not shared
but haven't confirmed that).
Arnd
Le Wed, May 21, 2025 at 01:36:06PM +0200, Arnd Bergmann a écrit : > On Wed, May 21, 2025, at 12:24, Herbert Xu wrote: > > On Wed, May 21, 2025 at 11:58:49AM +0200, Arnd Bergmann wrote: > >> > >> I did not see the entire background of the discussion, but would > >> point out that this is not supposed to work at all: > > > > We're trying to find out why this driver fails under concurrent > > load. It works perfectly if you do one request at a time, but > > when you hit it with load coming from both CPUs, it ends up > > corrupting the data. > > Ok. Which SoC exactly is this on? Armada XP or Armada 385? > It is armada-388-clearfog-pro
On Wed, May 21, 2025 at 01:36:06PM +0200, Arnd Bergmann wrote: > > Ok. Which SoC exactly is this on? Armada XP or Armada 385? I have no idea :) Corentin, can you tell Arnd what you're using for the tests? > I see. Just a few more ideas what it could be in case it's not > what you suspect: It appears to be proven now. After replacing the coherent memroy with kmalloc + dma_map_single, it actually works reliably to pass all the crypto fuzz tests (hmac is still failing but I think that's a different issue). Maybe I'm misreading the code, but I thought that dma_map_single on this machine should actually be a no-op because the device is marked as coherent? Arnd, Christophe? But it's clearly making a difference. My suspicion arose because the fully linear hash digests where all data came from the user were never failing. It was only failing when some of the data was coming from the bounce buffer within the driver. That bounce buffer was setup with dma_map_pool (each being 64 bytes long). > - the SRAM gets mapped into kernel space using ioremap(), which > on Armada 375/38x uses MT_UNCACHED rather than MT_DEVICE as > a workaround for a possible deadlock on actual MMIO registers. > It's possible that the SRAM should be mapped using a different > map flag to ensure it's actually consistent. If a store is > posted to the SRAM, it may still be in flight at the time that > the DMA master looks at it. AFAICS we're not touching the SRAM directly. Everything is mediated with the tdma unit on the cesa device. So the cesa tdma unit is copying the data to and from the SRAM with DMA. > - I see a lot of chaining of DMA descriptors, but no dma_wmb() > or spinlock. A dma_wmb() or stronger (wmb, dma_mb, mb) > is probably required between writing to a coherent descriptor > and making it visible from another one. A spinlock is > of course needed if you have multiple CPUs adding data > into a shared linked list (I think this one is not shared > but haven't confirmed that). Yes that chaining is definitely broken. However, I don't think it's causing the corruption. We've already tried disabling the chaining and it makes no difference whatsoever. In any case the tip of cryptodev now disables the broken chaining so it should no longer be an issue going forward. Thanks, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
Le Sat, May 10, 2025 at 06:43:33PM +0800, Herbert Xu a écrit : > On Sat, May 10, 2025 at 11:38:16AM +0200, Klaus Kudielka wrote: > > > > Patch applied on top. > > On the first attempt all self-tests passed, but on the second and third unfortunately not. > > This patch fixes the extra zero-length TDMA descriptor, which even > if it doesn't fix the problem, is obviously the right thing to do. > Hello I have tried all your cumulated patchs and got: http://kernel.montjoie.ovh/478197.log This is the git diff result to be sure I didnt miss a patch: http://kernel.montjoie.ovh/cesa.debug.diff Regards
On Sat, May 10, 2025 at 01:14:22PM +0200, Corentin Labbe wrote: > > I have tried all your cumulated patchs and got: http://kernel.montjoie.ovh/478197.log Please try this patch. Thanks, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt -- diff --git a/drivers/crypto/marvell/cesa/tdma.c b/drivers/crypto/marvell/cesa/tdma.c index 9b5fd957dde2..12169d5d22f7 100644 --- a/drivers/crypto/marvell/cesa/tdma.c +++ b/drivers/crypto/marvell/cesa/tdma.c @@ -50,6 +50,8 @@ void mv_cesa_dma_step(struct mv_cesa_req *dreq) writel_relaxed(0, engine->regs + CESA_SA_CFG); mv_cesa_set_int_mask(engine, CESA_SA_INT_ACC0_IDMA_DONE); + writel_relaxed(dreq->chain.first->cur_dma, + engine->regs + CESA_TDMA_NEXT_ADDR); writel_relaxed(CESA_TDMA_DST_BURST_128B | CESA_TDMA_SRC_BURST_128B | CESA_TDMA_NO_BYTE_SWAP | CESA_TDMA_EN, engine->regs + CESA_TDMA_CONTROL); @@ -57,8 +59,6 @@ void mv_cesa_dma_step(struct mv_cesa_req *dreq) writel_relaxed(CESA_SA_CFG_ACT_CH0_IDMA | CESA_SA_CFG_MULTI_PKT | CESA_SA_CFG_CH0_W_IDMA | CESA_SA_CFG_PARA_DIS, engine->regs + CESA_SA_CFG); - writel_relaxed(dreq->chain.first->cur_dma, - engine->regs + CESA_TDMA_NEXT_ADDR); WARN_ON(readl(engine->regs + CESA_SA_CMD) & CESA_SA_CMD_EN_CESA_SA_ACCL0); writel(CESA_SA_CMD_EN_CESA_SA_ACCL0, engine->regs + CESA_SA_CMD);
On Sat, May 10, 2025 at 01:14:22PM +0200, Corentin Labbe wrote: > > This is the git diff result to be sure I didnt miss a patch: http://kernel.montjoie.ovh/cesa.debug.diff Thanks! I think we have a smoking gun: [ 45.700298] mv_cesa_dma_step: 1 0xc7011440 0x9256040 "0x9256020" [ 45.706141] mv_cesa_ahash_req_cleanup: 0 0xc93b9c00 [ 45.711996] mv_cesa_int: 1 0x4ea1 0x80 [ 45.716875] mv_cesa_int: 0 0x4ea1 0x80 [ 45.720627] mv_cesa_tdma_process: 1 "0x9256020" [ 45.724380] mv_cesa_tdma_process: 0 0x9256140 [ 45.728757] mv_cesa_ahash_complete: 1 0xc7011400 [ 45.733112] mv_cesa_ahash_complete: 0 0xc7011200 [ 45.737741] mv_cesa_tdma_process: 1 0 0xc7011400 [ 45.742364] mv_cesa_tdma_process: 0 0 0xc7011200 [ 45.746994] mv_cesa_ahash_req_cleanup: 1 0xc7011400 [ 45.751614] mv_cesa_ahash_req_cleanup: 0 0xc7011200 [ 45.756635] mv_cesa_ahash_queue_req: 0 0xc93b9c00 [ 45.766104] mv_cesa_dma_step: 0 0xc93b9c40 "0x9256020" 0x9256000 [ 45.771972] alg: ahash: mv-sha1 test failed (wrong result) on test vector 3, cfg="init+update+update+final two even splits" The descriptor 0x9256020 was just freed by engine 1, and it's still the current pointer of engine 1. It was then immediately reused by engine 0 starting a new chain. It's conceivable that engine 1 then somehow starts executing on it at the same time. Cheers, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
Le Thu, May 08, 2025 at 01:22:16PM +0800, Herbert Xu a écrit : > v3 simplifies it a little bit: > > ---8<--- > This driver tries to chain requests together before submitting them > to hardware in order to reduce completion interrupts. > > However, it even extends chains that have already been submitted > to hardware. This is dangerous because there is no way of knowing > whether the hardware has already read the DMA memory in question > or not. > > Fix this by splitting the chain list into two. One for submitted > requests and one for requests that have not yet been submitted. > Only extend the latter. > The board do not panic anymore, but have still selftest errors: See the full boot log at kernel.montjoie.ovh/477935.log Regards
On Thu, May 08, 2025 at 02:53:43PM +0200, Corentin Labbe wrote: > > The board do not panic anymore, but have still selftest errors: > See the full boot log at kernel.montjoie.ovh/477935.log Do you have a boot log without this patch to compare? You seem to be getting skcipher failures as well as hash failures while the original report only had hash failures. Thanks, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
Le Thu, May 08, 2025 at 09:10:13PM +0800, Herbert Xu a écrit : > On Thu, May 08, 2025 at 02:53:43PM +0200, Corentin Labbe wrote: > > > > The board do not panic anymore, but have still selftest errors: > > See the full boot log at kernel.montjoie.ovh/477935.log > > Do you have a boot log without this patch to compare? You seem > to be getting skcipher failures as well as hash failures while > the original report only had hash failures. > 6.14.4 boot log at http://kernel.montjoie.ovh/477911.log
On Thu, May 08, 2025 at 03:43:07PM +0200, Corentin Labbe wrote: > Le Thu, May 08, 2025 at 09:10:13PM +0800, Herbert Xu a écrit : > > > Do you have a boot log without this patch to compare? You seem > > to be getting skcipher failures as well as hash failures while > > the original report only had hash failures. > > > > 6.14.4 boot log at http://kernel.montjoie.ovh/477911.log OK so it looks like on your machine the skcipher ENOMEM failures were always there. Let me stare at this a bit more. Thanks, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On Thu, May 08, 2025 at 03:43:07PM +0200, Corentin Labbe wrote: > > 6.14.4 boot log at http://kernel.montjoie.ovh/477911.log What's interesting is that the skcipher tests are failing during the random tests which means that they'd already passed all the static test vectors. Looking at the driver modprobe code, the skciphers get registered before the ahash algorithms. so their tests would have started sooner. I wonder if the skcipher code is corrupting the ahash state when run concurrently (and chained together). Cheers, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On Fri, May 09, 2025 at 11:19:26AM +0800, Herbert Xu wrote:
>
> I wonder if the skcipher code is corrupting the ahash state when
> run concurrently (and chained together).
Please try this patch to see if the hashes can work without
the skciphers.
Thanks,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
--
commit 5407a2b5cb14526fb3ee95929ede1ef11743ad42
Author: Herbert Xu <herbert@gondor.apana.org.au>
Date: Wed May 7 16:06:18 2025 +0800
crypto: marvell/cesa - Do not chain submitted requests
This driver tries to chain requests together before submitting them
to hardware in order to reduce completion interrupts.
However, it even extends chains that have already been submitted
to hardware. This is dangerous because there is no way of knowing
whether the hardware has already read the DMA memory in question
or not.
Fix this by splitting the chain list into two. One for submitted
requests and one for requests that have not yet been submitted.
Only extend the latter.
Reported-by: Klaus Kudielka <klaus.kudielka@gmail.com>
Fixes: 85030c5168f1 ("crypto: marvell - Add support for chaining crypto requests in TDMA mode")
Cc: <stable@vger.kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
diff --git a/drivers/crypto/marvell/cesa/cesa.c b/drivers/crypto/marvell/cesa/cesa.c
index fa08f10e6f3f..9c21f5d835d2 100644
--- a/drivers/crypto/marvell/cesa/cesa.c
+++ b/drivers/crypto/marvell/cesa/cesa.c
@@ -94,7 +94,7 @@ static int mv_cesa_std_process(struct mv_cesa_engine *engine, u32 status)
static int mv_cesa_int_process(struct mv_cesa_engine *engine, u32 status)
{
- if (engine->chain.first && engine->chain.last)
+ if (engine->chain_hw.first && engine->chain_hw.last)
return mv_cesa_tdma_process(engine, status);
return mv_cesa_std_process(engine, status);
diff --git a/drivers/crypto/marvell/cesa/cesa.h b/drivers/crypto/marvell/cesa/cesa.h
index d215a6bed6bc..50ca1039fdaa 100644
--- a/drivers/crypto/marvell/cesa/cesa.h
+++ b/drivers/crypto/marvell/cesa/cesa.h
@@ -440,8 +440,10 @@ struct mv_cesa_dev {
* SRAM
* @queue: fifo of the pending crypto requests
* @load: engine load counter, useful for load balancing
- * @chain: list of the current tdma descriptors being processed
- * by this engine.
+ * @chain_hw: list of the current tdma descriptors being processed
+ * by the hardware.
+ * @chain_sw: list of the current tdma descriptors that will be
+ * submitted to the hardware.
* @complete_queue: fifo of the processed requests by the engine
*
* Structure storing CESA engine information.
@@ -463,7 +465,8 @@ struct mv_cesa_engine {
struct gen_pool *pool;
struct crypto_queue queue;
atomic_t load;
- struct mv_cesa_tdma_chain chain;
+ struct mv_cesa_tdma_chain chain_hw;
+ struct mv_cesa_tdma_chain chain_sw;
struct list_head complete_queue;
int irq;
};
diff --git a/drivers/crypto/marvell/cesa/tdma.c b/drivers/crypto/marvell/cesa/tdma.c
index 388a06e180d6..243305354420 100644
--- a/drivers/crypto/marvell/cesa/tdma.c
+++ b/drivers/crypto/marvell/cesa/tdma.c
@@ -38,6 +38,15 @@ void mv_cesa_dma_step(struct mv_cesa_req *dreq)
{
struct mv_cesa_engine *engine = dreq->engine;
+ spin_lock_bh(&engine->lock);
+ if (engine->chain_sw.first == dreq->chain.first) {
+ engine->chain_sw.first = NULL;
+ engine->chain_sw.last = NULL;
+ }
+ engine->chain_hw.first = dreq->chain.first;
+ engine->chain_hw.last = dreq->chain.last;
+ spin_unlock_bh(&engine->lock);
+
writel_relaxed(0, engine->regs + CESA_SA_CFG);
mv_cesa_set_int_mask(engine, CESA_SA_INT_ACC0_IDMA_DONE);
@@ -96,25 +105,27 @@ void mv_cesa_dma_prepare(struct mv_cesa_req *dreq,
void mv_cesa_tdma_chain(struct mv_cesa_engine *engine,
struct mv_cesa_req *dreq)
{
- if (engine->chain.first == NULL && engine->chain.last == NULL) {
- engine->chain.first = dreq->chain.first;
- engine->chain.last = dreq->chain.last;
- } else {
- struct mv_cesa_tdma_desc *last;
+ struct mv_cesa_tdma_desc *last = engine->chain_sw.last;
- last = engine->chain.last;
+ /*
+ * Break the DMA chain if the request being queued needs the IV
+ * regs to be set before lauching the request.
+ */
+ if (!last || dreq->chain.first->flags & CESA_TDMA_SET_STATE)
+ engine->chain_sw.first = dreq->chain.first;
+ else {
last->next = dreq->chain.first;
- engine->chain.last = dreq->chain.last;
-
- /*
- * Break the DMA chain if the CESA_TDMA_BREAK_CHAIN is set on
- * the last element of the current chain, or if the request
- * being queued needs the IV regs to be set before lauching
- * the request.
- */
- if (!(last->flags & CESA_TDMA_BREAK_CHAIN) &&
- !(dreq->chain.first->flags & CESA_TDMA_SET_STATE))
- last->next_dma = cpu_to_le32(dreq->chain.first->cur_dma);
+ last->next_dma = cpu_to_le32(dreq->chain.first->cur_dma);
+ }
+ last = dreq->chain.last;
+ engine->chain_sw.last = last;
+ /*
+ * Break the DMA chain if the CESA_TDMA_BREAK_CHAIN is set on
+ * the last element of the current chain.
+ */
+ if (last->flags & CESA_TDMA_BREAK_CHAIN) {
+ engine->chain_sw.first = NULL;
+ engine->chain_sw.last = NULL;
}
}
@@ -127,7 +138,7 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
tdma_cur = readl(engine->regs + CESA_TDMA_CUR);
- for (tdma = engine->chain.first; tdma; tdma = next) {
+ for (tdma = engine->chain_hw.first; tdma; tdma = next) {
spin_lock_bh(&engine->lock);
next = tdma->next;
spin_unlock_bh(&engine->lock);
@@ -149,12 +160,12 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)
&backlog);
/* Re-chaining to the next request */
- engine->chain.first = tdma->next;
+ engine->chain_hw.first = tdma->next;
tdma->next = NULL;
/* If this is the last request, clear the chain */
- if (engine->chain.first == NULL)
- engine->chain.last = NULL;
+ if (engine->chain_hw.first == NULL)
+ engine->chain_hw.last = NULL;
spin_unlock_bh(&engine->lock);
ctx = crypto_tfm_ctx(req->tfm);
diff --git a/drivers/crypto/marvell/cesa/cesa.c b/drivers/crypto/marvell/cesa/cesa.c
index 9c21f5d835d2..b9581c21697a 100644
--- a/drivers/crypto/marvell/cesa/cesa.c
+++ b/drivers/crypto/marvell/cesa/cesa.c
@@ -192,11 +192,13 @@ static int mv_cesa_add_algs(struct mv_cesa_dev *cesa)
int ret;
int i, j;
+#if 0
for (i = 0; i < cesa->caps->ncipher_algs; i++) {
ret = crypto_register_skcipher(cesa->caps->cipher_algs[i]);
if (ret)
goto err_unregister_crypto;
}
+#endif
for (i = 0; i < cesa->caps->nahash_algs; i++) {
ret = crypto_register_ahash(cesa->caps->ahash_algs[i]);
@@ -211,9 +213,11 @@ static int mv_cesa_add_algs(struct mv_cesa_dev *cesa)
crypto_unregister_ahash(cesa->caps->ahash_algs[j]);
i = cesa->caps->ncipher_algs;
+#if 0
err_unregister_crypto:
for (j = 0; j < i; j++)
crypto_unregister_skcipher(cesa->caps->cipher_algs[j]);
+#endif
return ret;
}
@@ -225,8 +229,10 @@ static void mv_cesa_remove_algs(struct mv_cesa_dev *cesa)
for (i = 0; i < cesa->caps->nahash_algs; i++)
crypto_unregister_ahash(cesa->caps->ahash_algs[i]);
+#if 0
for (i = 0; i < cesa->caps->ncipher_algs; i++)
crypto_unregister_skcipher(cesa->caps->cipher_algs[i]);
+#endif
}
static struct skcipher_alg *orion_cipher_algs[] = {
Le Fri, May 09, 2025 at 04:11:09PM +0800, Herbert Xu a écrit : > On Fri, May 09, 2025 at 11:19:26AM +0800, Herbert Xu wrote: > > > > I wonder if the skcipher code is corrupting the ahash state when > > run concurrently (and chained together). > > Please try this patch to see if the hashes can work without > the skciphers. > Hello Got http://kernel.montjoie.ovh/478064.log Thanks Regards
On Fri, May 09, 2025 at 01:01:21PM +0200, Corentin Labbe wrote:
>
> Got http://kernel.montjoie.ovh/478064.log
OK it seems to go further, but that might just because the first
few tests get done with no concurrency.
I see some bugs in the driver with regards to zero-length updates,
but I'm at a loss as to why that would only make a difference when
run concurrently.
Please add this patch on top of the previous patch. It disables
chaining altogether between requests.
Thanks,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
--
diff --git a/drivers/crypto/marvell/cesa/tdma.c b/drivers/crypto/marvell/cesa/tdma.c
index 9b5fd957dde2..f4fe2a881f1e 100644
--- a/drivers/crypto/marvell/cesa/tdma.c
+++ b/drivers/crypto/marvell/cesa/tdma.c
@@ -123,7 +123,7 @@ void mv_cesa_tdma_chain(struct mv_cesa_engine *engine,
* Break the DMA chain if the CESA_TDMA_BREAK_CHAIN is set on
* the last element of the current chain.
*/
- if (last->flags & CESA_TDMA_BREAK_CHAIN) {
+ if (1 || (last->flags & CESA_TDMA_BREAK_CHAIN)) {
engine->chain_sw.first = NULL;
engine->chain_sw.last = NULL;
}
On Sat, May 10, 2025 at 09:15:50AM +0800, Herbert Xu wrote: > > I see some bugs in the driver with regards to zero-length updates, > but I'm at a loss as to why that would only make a difference when > run concurrently. In particular, when testmgr does an update+final, it will give a non-NULL SG list to the final call. The buggy code in marvell/cesa will then read that non-NULL SG list during the final call and overwrite the cached bytes with it. However, I still can't see why that would make a difference because it should contain the same data. Cheers, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On Sat, May 10, 2025 at 09:37:58AM +0800, Herbert Xu wrote: > > In particular, when testmgr does an update+final, it will give a > non-NULL SG list to the final call. This ties in with all the test results so far because it appears that all the failed test vectors involve a final call. > The buggy code in marvell/cesa will then read that non-NULL SG list > during the final call and overwrite the cached bytes with it. > However, I still can't see why that would make a difference because > it should contain the same data. I think I can see where it does make a difference. The SG list is never mapped during the final call. So the DMA address is going to be either crap or more likely the address from the previous update call where it was mapped. Now depending on how DMA mapping works on your platform, that may indeed be buggy during concurrent calls only. Cheers, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On Thu, May 08, 2025 at 03:43:07PM +0200, Corentin Labbe wrote:
>
> 6.14.4 boot log at http://kernel.montjoie.ovh/477911.log
This patch may fix the skcipher ENOMEM errors, since they all
seem to come from random test vectors with length 0.
---8<---
Do not access random memory for zero-length skcipher requests.
Just return 0.
Fixes: f63601fd616a ("crypto: marvell/cesa - add a new driver for Marvell's CESA")
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
drivers/crypto/marvell/cesa/cipher.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/crypto/marvell/cesa/cipher.c b/drivers/crypto/marvell/cesa/cipher.c
index 047f3758c1d1..cbf86968d8a2 100644
--- a/drivers/crypto/marvell/cesa/cipher.c
+++ b/drivers/crypto/marvell/cesa/cipher.c
@@ -456,6 +456,9 @@ static int mv_cesa_skcipher_queue_req(struct skcipher_request *req,
struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(req);
struct mv_cesa_engine *engine;
+ if (!req->cryptlen)
+ return 0;
+
ret = mv_cesa_skcipher_req_init(req, tmpl);
if (ret)
return ret;
--
2.39.5
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt© 2016 - 2025 Red Hat, Inc.