.../devicetree/bindings/pwm/pwm-sprd.txt | 40 ----------- .../bindings/pwm/sprd,ums512-pwm.yaml | 66 +++++++++++++++++++ 2 files changed, 66 insertions(+), 40 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pwm/pwm-sprd.txt create mode 100644 Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml
Convert the Spreadtrum/Unisoc UMS512 PWM controller bindings to DT schema.
Adjust filename to match compatible. Drop assigned-* properties as these
should not be needed.
Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com>
---
.../devicetree/bindings/pwm/pwm-sprd.txt | 40 -----------
.../bindings/pwm/sprd,ums512-pwm.yaml | 66 +++++++++++++++++++
2 files changed, 66 insertions(+), 40 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/pwm/pwm-sprd.txt
create mode 100644 Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml
diff --git a/Documentation/devicetree/bindings/pwm/pwm-sprd.txt b/Documentation/devicetree/bindings/pwm/pwm-sprd.txt
deleted file mode 100644
index 87b206fd0618..000000000000
--- a/Documentation/devicetree/bindings/pwm/pwm-sprd.txt
+++ /dev/null
@@ -1,40 +0,0 @@
-Spreadtrum PWM controller
-
-Spreadtrum SoCs PWM controller provides 4 PWM channels.
-
-Required properties:
-- compatible : Should be "sprd,ums512-pwm".
-- reg: Physical base address and length of the controller's registers.
-- clocks: The phandle and specifier referencing the controller's clocks.
-- clock-names: Should contain following entries:
- "pwmn": used to derive the functional clock for PWM channel n (n range: 0 ~ 3).
- "enablen": for PWM channel n enable clock (n range: 0 ~ 3).
-- #pwm-cells: Should be 2. See pwm.yaml in this directory for a description of
- the cells format.
-
-Optional properties:
-- assigned-clocks: Reference to the PWM clock entries.
-- assigned-clock-parents: The phandle of the parent clock of PWM clock.
-
-Example:
- pwms: pwm@32260000 {
- compatible = "sprd,ums512-pwm";
- reg = <0 0x32260000 0 0x10000>;
- clock-names = "pwm0", "enable0",
- "pwm1", "enable1",
- "pwm2", "enable2",
- "pwm3", "enable3";
- clocks = <&aon_clk CLK_PWM0>, <&aonapb_gate CLK_PWM0_EB>,
- <&aon_clk CLK_PWM1>, <&aonapb_gate CLK_PWM1_EB>,
- <&aon_clk CLK_PWM2>, <&aonapb_gate CLK_PWM2_EB>,
- <&aon_clk CLK_PWM3>, <&aonapb_gate CLK_PWM3_EB>;
- assigned-clocks = <&aon_clk CLK_PWM0>,
- <&aon_clk CLK_PWM1>,
- <&aon_clk CLK_PWM2>,
- <&aon_clk CLK_PWM3>;
- assigned-clock-parents = <&ext_26m>,
- <&ext_26m>,
- <&ext_26m>,
- <&ext_26m>;
- #pwm-cells = <2>;
- };
diff --git a/Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml b/Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml
new file mode 100644
index 000000000000..0344c2d99472
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pwm/sprd,ums512-pwm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Spreadtrum/Unisoc UMS512 PWM Controller
+
+maintainers:
+ - Orson Zhai <orsonzhai@gmail.com>
+ - Baolin Wang <baolin.wang7@gmail.com>
+ - Chunyan Zhang <zhang.lyra@gmail.com>
+
+properties:
+ compatible:
+ const: sprd,ums512-pwm
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 8
+
+ clock-names:
+ items:
+ - const: pwm0
+ - const: enable0
+ - const: pwm1
+ - const: enable1
+ - const: pwm2
+ - const: enable2
+ - const: pwm3
+ - const: enable3
+
+ '#pwm-cells':
+ const: 2
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+allOf:
+ - $ref: pwm.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/sprd,ums512-clk.h>
+
+ pwm@32260000 {
+ compatible = "sprd,ums512-pwm";
+ reg = <0x32260000 0x10000>;
+ clocks = <&aon_clk CLK_PWM0>, <&aonapb_gate CLK_PWM0_EB>,
+ <&aon_clk CLK_PWM1>, <&aonapb_gate CLK_PWM1_EB>,
+ <&aon_clk CLK_PWM2>, <&aonapb_gate CLK_PWM2_EB>,
+ <&aon_clk CLK_PWM3>, <&aonapb_gate CLK_PWM3_EB>;
+ clock-names = "pwm0", "enable0",
+ "pwm1", "enable1",
+ "pwm2", "enable2",
+ "pwm3", "enable3";
+ #pwm-cells = <2>;
+ };
+...
--
2.43.0On Wed, 30 Oct 2024 at 17:36, Stanislav Jakubek <stano.jakubek@gmail.com> wrote:
>
> Convert the Spreadtrum/Unisoc UMS512 PWM controller bindings to DT schema.
> Adjust filename to match compatible. Drop assigned-* properties as these
> should not be needed.
>
> Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com>
> ---
> .../devicetree/bindings/pwm/pwm-sprd.txt | 40 -----------
> .../bindings/pwm/sprd,ums512-pwm.yaml | 66 +++++++++++++++++++
> 2 files changed, 66 insertions(+), 40 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/pwm/pwm-sprd.txt
> create mode 100644 Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml
>
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-sprd.txt b/Documentation/devicetree/bindings/pwm/pwm-sprd.txt
> deleted file mode 100644
> index 87b206fd0618..000000000000
> --- a/Documentation/devicetree/bindings/pwm/pwm-sprd.txt
> +++ /dev/null
> @@ -1,40 +0,0 @@
> -Spreadtrum PWM controller
> -
> -Spreadtrum SoCs PWM controller provides 4 PWM channels.
> -
> -Required properties:
> -- compatible : Should be "sprd,ums512-pwm".
> -- reg: Physical base address and length of the controller's registers.
> -- clocks: The phandle and specifier referencing the controller's clocks.
> -- clock-names: Should contain following entries:
> - "pwmn": used to derive the functional clock for PWM channel n (n range: 0 ~ 3).
> - "enablen": for PWM channel n enable clock (n range: 0 ~ 3).
> -- #pwm-cells: Should be 2. See pwm.yaml in this directory for a description of
> - the cells format.
> -
> -Optional properties:
> -- assigned-clocks: Reference to the PWM clock entries.
> -- assigned-clock-parents: The phandle of the parent clock of PWM clock.
> -
> -Example:
> - pwms: pwm@32260000 {
> - compatible = "sprd,ums512-pwm";
> - reg = <0 0x32260000 0 0x10000>;
> - clock-names = "pwm0", "enable0",
> - "pwm1", "enable1",
> - "pwm2", "enable2",
> - "pwm3", "enable3";
> - clocks = <&aon_clk CLK_PWM0>, <&aonapb_gate CLK_PWM0_EB>,
> - <&aon_clk CLK_PWM1>, <&aonapb_gate CLK_PWM1_EB>,
> - <&aon_clk CLK_PWM2>, <&aonapb_gate CLK_PWM2_EB>,
> - <&aon_clk CLK_PWM3>, <&aonapb_gate CLK_PWM3_EB>;
> - assigned-clocks = <&aon_clk CLK_PWM0>,
> - <&aon_clk CLK_PWM1>,
> - <&aon_clk CLK_PWM2>,
> - <&aon_clk CLK_PWM3>;
> - assigned-clock-parents = <&ext_26m>,
> - <&ext_26m>,
> - <&ext_26m>,
> - <&ext_26m>;
> - #pwm-cells = <2>;
> - };
> diff --git a/Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml b/Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml
> new file mode 100644
> index 000000000000..0344c2d99472
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml
> @@ -0,0 +1,66 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pwm/sprd,ums512-pwm.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Spreadtrum/Unisoc UMS512 PWM Controller
> +
> +maintainers:
> + - Orson Zhai <orsonzhai@gmail.com>
> + - Baolin Wang <baolin.wang7@gmail.com>
> + - Chunyan Zhang <zhang.lyra@gmail.com>
I've moved myself to Reviewer in sprd entry of MAINTAINERS, so,
Reviewed-by: Chunyan Zhang <zhang.lyra@gmail.com>
Thanks,
Chunyan
> +
> +properties:
> + compatible:
> + const: sprd,ums512-pwm
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 8
> +
> + clock-names:
> + items:
> + - const: pwm0
> + - const: enable0
> + - const: pwm1
> + - const: enable1
> + - const: pwm2
> + - const: enable2
> + - const: pwm3
> + - const: enable3
> +
> + '#pwm-cells':
> + const: 2
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> +
> +allOf:
> + - $ref: pwm.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/sprd,ums512-clk.h>
> +
> + pwm@32260000 {
> + compatible = "sprd,ums512-pwm";
> + reg = <0x32260000 0x10000>;
> + clocks = <&aon_clk CLK_PWM0>, <&aonapb_gate CLK_PWM0_EB>,
> + <&aon_clk CLK_PWM1>, <&aonapb_gate CLK_PWM1_EB>,
> + <&aon_clk CLK_PWM2>, <&aonapb_gate CLK_PWM2_EB>,
> + <&aon_clk CLK_PWM3>, <&aonapb_gate CLK_PWM3_EB>;
> + clock-names = "pwm0", "enable0",
> + "pwm1", "enable1",
> + "pwm2", "enable2",
> + "pwm3", "enable3";
> + #pwm-cells = <2>;
> + };
> +...
> --
> 2.43.0
>
Hello, thanks for your patch, looks fine for me. On Wed, Oct 30, 2024 at 10:36:36AM +0100, Stanislav Jakubek wrote: > +maintainers: > + - Orson Zhai <orsonzhai@gmail.com> > + - Baolin Wang <baolin.wang7@gmail.com> > + - Chunyan Zhang <zhang.lyra@gmail.com> An Ack from (at least one of) them would be great. I see Baolin Wang in the recipients of this mail, but with a different address. Does the maintainer entry need updating? Best regards Uwe
On 2024/11/4 04:24, Uwe Kleine-König wrote: > Hello, > > thanks for your patch, looks fine for me. > > On Wed, Oct 30, 2024 at 10:36:36AM +0100, Stanislav Jakubek wrote: >> +maintainers: >> + - Orson Zhai <orsonzhai@gmail.com> >> + - Baolin Wang <baolin.wang7@gmail.com> >> + - Chunyan Zhang <zhang.lyra@gmail.com> > > An Ack from (at least one of) them would be great. I see Baolin Wang in Sorry for late reply. Look good to me though I'm not a DT schema expert. So Acked-by: Baolin Wang <baolin.wang@linux.alibaba.com> > the recipients of this mail, but with a different address. Does the > maintainer entry need updating? No need, I have already done the mail mapping:)
Hello, On Mon, Nov 04, 2024 at 10:52:09AM +0800, Baolin Wang wrote: > On 2024/11/4 04:24, Uwe Kleine-König wrote: > > thanks for your patch, looks fine for me. > > > > On Wed, Oct 30, 2024 at 10:36:36AM +0100, Stanislav Jakubek wrote: > > > +maintainers: > > > + - Orson Zhai <orsonzhai@gmail.com> > > > + - Baolin Wang <baolin.wang7@gmail.com> > > > + - Chunyan Zhang <zhang.lyra@gmail.com> > > > > An Ack from (at least one of) them would be great. I see Baolin Wang in > > Sorry for late reply. Look good to me though I'm not a DT schema expert. So > Acked-by: Baolin Wang <baolin.wang@linux.alibaba.com> > > > the recipients of this mail, but with a different address. Does the > > maintainer entry need updating? > > No need, I have already done the mail mapping:) Having an entry in .mailmap doesn't justify adding old/wrong email addresses. If your linux.alibaba.com address is the one that should be used, it should be listed here. Not everyone consults .mailmap before sending mail. If you agree I just substitute your address while applying. Best regards Uwe
On Mon, Nov 04, 2024 at 09:28:34AM +0100, Uwe Kleine-König wrote: > Hello, > > On Mon, Nov 04, 2024 at 10:52:09AM +0800, Baolin Wang wrote: > > On 2024/11/4 04:24, Uwe Kleine-König wrote: > > > thanks for your patch, looks fine for me. > > > > > > On Wed, Oct 30, 2024 at 10:36:36AM +0100, Stanislav Jakubek wrote: > > > > +maintainers: > > > > + - Orson Zhai <orsonzhai@gmail.com> > > > > + - Baolin Wang <baolin.wang7@gmail.com> > > > > + - Chunyan Zhang <zhang.lyra@gmail.com> > > > > > > An Ack from (at least one of) them would be great. I see Baolin Wang in > > > > Sorry for late reply. Look good to me though I'm not a DT schema expert. So > > Acked-by: Baolin Wang <baolin.wang@linux.alibaba.com> > > > > > the recipients of this mail, but with a different address. Does the > > > maintainer entry need updating? > > > > No need, I have already done the mail mapping:) > > Having an entry in .mailmap doesn't justify adding old/wrong email > addresses. If your linux.alibaba.com address is the one that should be > used, it should be listed here. Not everyone consults .mailmap before > sending mail. > > If you agree I just substitute your address while applying. Assuming silent agreement I applied the patch with your address updated to the linux.alibaba.com one. The patch now waits in https://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux.git pwm/for-nexxt for the closing of the merge window. Will put it into next then and include it in my PR for 6.14-rc1. Best regards Uwe
On Wed, 30 Oct 2024 10:36:36 +0100, Stanislav Jakubek wrote: > Convert the Spreadtrum/Unisoc UMS512 PWM controller bindings to DT schema. > Adjust filename to match compatible. Drop assigned-* properties as these > should not be needed. > > Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com> > --- > .../devicetree/bindings/pwm/pwm-sprd.txt | 40 ----------- > .../bindings/pwm/sprd,ums512-pwm.yaml | 66 +++++++++++++++++++ > 2 files changed, 66 insertions(+), 40 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/pwm/pwm-sprd.txt > create mode 100644 Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml > Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Hi all, just noticed this older patch [1] doing the same conversion, so I've also CC'd other people from that patch series. [1] https://lore.kernel.org/lkml/20240125025533.10315-5-Wenhua.Lin@unisoc.com/ Sorry for the noise, Stanislav
On Wed, Oct 30, 2024 at 07:02:34PM +0100, Stanislav Jakubek wrote: > Hi all, > > just noticed this older patch [1] doing the same conversion, so I've also > CC'd other people from that patch series. > > [1] https://lore.kernel.org/lkml/20240125025533.10315-5-Wenhua.Lin@unisoc.com/ Always nice when we take the time to review stuff and it never gets followed up on. :( > > Sorry for the noise, Your version looks fine, so let's take it. I don't expect any follow-up 9 months later. Rob
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