arch/x86/include/asm/intel-family.h | 3 +++ 1 file changed, 3 insertions(+)
Intel is subdividing the mobile segment with additional models
with the same codename. Using the Intel "N" and "P" suffices
for these will be less confusing than trying to map to some
different naming convention.
Signed-off-by: Tony Luck <tony.luck@intel.com>
---
I think the earlier patch for Alderlake "N" got stuck in limbo
trying to resolve whether we should add the "_N" suffix to our list
of acceptable CPU model #define names. Now we have another one "_P".
Can we just take these, and move on?
arch/x86/include/asm/intel-family.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 048b6d5aff50..def6ca121111 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -26,6 +26,7 @@
* _G - parts with extra graphics on
* _X - regular server parts
* _D - micro server parts
+ * _N,_P - other mobile parts
*
* Historical OPTDIFFs:
*
@@ -107,8 +108,10 @@
#define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */
#define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */
+#define INTEL_FAM6_ALDERLAKE_N 0xBE
#define INTEL_FAM6_RAPTORLAKE 0xB7
+#define INTEL_FAM6_RAPTORLAKE_P 0xBA
/* "Small Core" Processors (Atom) */
--
2.35.1On Mon, Apr 11, 2022 at 04:37:03PM -0700, Luck, Tony wrote: > Intel is subdividing the mobile segment with additional models > with the same codename. Using the Intel "N" and "P" suffices > for these will be less confusing than trying to map to some > different naming convention. > > Signed-off-by: Tony Luck <tony.luck@intel.com> > --- > > I think the earlier patch for Alderlake "N" got stuck in limbo > trying to resolve whether we should add the "_N" suffix to our list > of acceptable CPU model #define names. Now we have another one "_P". > > Can we just take these, and move on? Yeah, I suppose so. Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Let's hope our marketing team will stick with these names for a little while atleast :/
On Tue, Apr 19, 2022 at 10:56:03AM +0200, Peter Zijlstra wrote:
> Let's hope our marketing team will stick with these names for a little
> while atleast :/
I'm waiting for the day when they run out of lakes and we and up doing
#define INTEL_FAM6_LAKELAKE 0xff
:-P
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: 3ccce9340326df40ba4462d4d2a1692b6387a68e
Gitweb: https://git.kernel.org/tip/3ccce9340326df40ba4462d4d2a1692b6387a68e
Author: Tony Luck <tony.luck@intel.com>
AuthorDate: Mon, 11 Apr 2022 16:37:03 -07:00
Committer: Borislav Petkov <bp@suse.de>
CommitterDate: Tue, 19 Apr 2022 12:04:51 +02:00
x86/cpu: Add new Alderlake and Raptorlake CPU model numbers
Intel is subdividing the mobile segment with additional models
with the same codename. Using the Intel "N" and "P" suffices
for these will be less confusing than trying to map to some
different naming convention.
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/YlS7n7Xtso9BXZA2@agluck-desk3.sc.intel.com
---
arch/x86/include/asm/intel-family.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index 048b6d5..def6ca1 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -26,6 +26,7 @@
* _G - parts with extra graphics on
* _X - regular server parts
* _D - micro server parts
+ * _N,_P - other mobile parts
*
* Historical OPTDIFFs:
*
@@ -107,8 +108,10 @@
#define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */
#define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */
+#define INTEL_FAM6_ALDERLAKE_N 0xBE
#define INTEL_FAM6_RAPTORLAKE 0xB7
+#define INTEL_FAM6_RAPTORLAKE_P 0xBA
/* "Small Core" Processors (Atom) */© 2016 - 2026 Red Hat, Inc.